bics
/
actlib_dataflow_neuro
12
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

adding mapper io to chip wip

This commit is contained in:
alexmadison 2022-05-09 19:29:18 +02:00
parent 03851e19b7
commit af2c6c665d
1 changed files with 31 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

39
dataflow_neuro/chips.act
View File

@ -601,6 +601,7 @@ defproc texel_dualcore_mapper (bd<N_IN> in, out;
// MAPPER STUFF
bool? mapper_en;
avMx1of2<30> out_sram_wr; // Input packets to go to SRAM (rw word addr)
avMx1of2<8> out_sram_spk; // Spike packets from enc to go to SRAM (core-nrn addr)
avMx1of2<15> in_sram_r; // Readout packets from SRAM (data only)
@ -627,15 +628,15 @@ defproc texel_dualcore_mapper (bd<N_IN> in, out;
// dmx to SRAM
bool to_sram, to_cores;
bool is_to_sram, is_to_cores;
demux<32> sram_dmx(.in = _fork.out2, .supply = supply, .reset_B = _reset_BX);
sram_dmx.cond.d.d[0].t = to_sram;
sram_dmx.cond.d.d[0].f = to_cores;
sram_dmx.cond.d.d[0].t = is_to_sram;
sram_dmx.cond.d.d[0].f = is_to_cores;
AND2_X1 sram_dmx_and(.a = sram_dmx.in.d.d[30].f, .b = sram_dmx.in.d.d[29].t,
.y = to_sram,
.y = is_to_sram,
.vdd = supply.vdd, .vss = supply.vss);
OR3_X1 sram_dmx_or(.a = sram_dmx.in.d.d[30].t, .b = sram_dmx.in.d.d[30].t, .c = sram_dmx.in.d.d[29].f,
.y = to_cores,
.y = is_to_cores,
.vdd = supply.vdd, .vss = supply.vss);
slice_data<32, 0, 29> pre_sram_slice(.in = sram_dmx.out2, .supply = supply);
out_sram_wr.a = pre_sram_slice.out.a;
@ -643,9 +644,18 @@ defproc texel_dualcore_mapper (bd<N_IN> in, out;
(i:29:out_sram_wr.d.d[i] = pre_sram_slice.out.d.d[i];)
out_sram_wr.d.d[29] = pre_sram_slice.in.d.d[31];
// spikes from sram
// requires weird merging because [core, syny, synx] needs to go to [core, ZEROES, syny, synx]
append<14,32,0> sram_spk_in_append(.in = in_sram_spk, .supply = supply);
merge<32> merge_dmx8spk(.in1 = sram_dmx.out1, .reset_B = _reset_BX, .supply = supply);
merge_dmx8spk.in2.a = sram_spk_in_append.out.a;
merge_dmx8spk.in2.v = sram_spk_in_append.out.v;
(i:13: merge_dmx8spk.in2.d.d[i] = sram_spk_in_append.out.d.d[i];)
merge_dmx8spk.in2.d.d[31] = sram_spk_in_append.out.d.d[13];
(i:13..30: merge_dmx8spk.in2.d.d[i] = sram_spk_in_append.out.d.d[i+1];)
// Onwards to core demux
fifo<N_IN,N_BUFFERS> fifo_fork2dmx(.in = sram_dmx.out1, .reset_B = _reset_BX, .supply = supply);
fifo<N_IN,N_BUFFERS> fifo_fork2dmx(.in = merge_dmx8spk.out, .reset_B = _reset_BX, .supply = supply);
demux_bit_msb<N_IN-1> core_dmx(.in = fifo_fork2dmx.out, .reset_B = _reset_BX, .supply = supply);
fifo<N_IN-1,N_BUFFERS> fifo_dmx2core1(.in = core_dmx.out1, .reset_B = _reset_BX, .supply = supply);
fifo<N_IN-1,N_BUFFERS> fifo_dmx2core2(.in = core_dmx.out2, .reset_B = _reset_BX, .supply = supply);
@ -709,15 +719,28 @@ defproc texel_dualcore_mapper (bd<N_IN> in, out;
fifo<N_IN-1,N_BUFFERS> fifo_core1out(.in = core1.out, .reset_B = _reset_BX, .supply = supply);
fifo<N_IN-1,N_BUFFERS> fifo_core2out(.in = core2.out, .reset_B = _reset_BX, .supply = supply);
// Merge cores
append<N_IN-1, 1, 0> append_core1(.in = fifo_core1out.out, .supply = supply);
append<N_IN-1, 1, 1> append_core2(.in = fifo_core2out.out, .supply = supply);
merge<N_IN> merge_core1x2(.in1 = append_core1.out, .in2 = append_core2.out,
.supply = supply, .reset_B = _reset_BX);
// fork after core merge then go to mapper if its a spike
fork<32> postcore_fork(.in = merge_core1x2.out, .reset_B = _reset_BX, .supply = supply);
dropper_static<32, false> sram_dropper(.in = postcore_fork.out1, .cond = mapper_en, .supply = supply);
// Need to have it then drop the spike if its from a register.
// to do: go into a self-acknowledging dmx_td, with the cond being on the register bit.
demux_td<32, false> drop_if_reg(.in = sram_dropper.out, .reset_B = _reset_BX, .supply = supply); // if cond true, go out on data
drop_if_reg.cond.d.d[0] = sram_dropper.out.d.d[30];
drop_if_reg.token.r = drop_if_reg.token.a;
slice_data<32,0,8> slice_to_sram(.in = drop_if_reg.out, .out = out_sram_spk, .supply = supply);
// Merge cores and loopback
merge<N_IN> merge_drop8core(.in1 = merge_core1x2.out, .in2 = fifo_drop2mrg.out,
merge<N_IN> merge_drop8core(.in1 = postcore_fork.out2, .in2 = fifo_drop2mrg.out,
.reset_B = _reset_BX, .supply = supply);
// qdi2bd