added inverters on every 4th synapse targetting line

test/unit_tests/texel_dualcore/test.prsim

@@ -14903,63 +14903,63 @@ assert c.c1_nrn_mon_y[5] 0
 assert c.c1_syn_mon_x[0] 0
 assert c.c1_syn_mon_x[1] 0
 assert c.c1_syn_mon_x[2] 0
-assert c.c1_syn_mon_x[3] 0
+assert c.c1_syn_mon_x[3] 1
 assert c.c1_syn_mon_x[4] 0
 assert c.c1_syn_mon_x[5] 0
 assert c.c1_syn_mon_x[6] 0
-assert c.c1_syn_mon_x[7] 0
+assert c.c1_syn_mon_x[7] 1
 assert c.c1_syn_mon_x[8] 0
 assert c.c1_syn_mon_x[9] 0
 assert c.c1_syn_mon_x[10] 0
-assert c.c1_syn_mon_x[11] 0
+assert c.c1_syn_mon_x[11] 1
 assert c.c1_syn_mon_x[12] 0
 assert c.c1_syn_mon_x[13] 0
 assert c.c1_syn_mon_x[14] 0
-assert c.c1_syn_mon_x[15] 0
+assert c.c1_syn_mon_x[15] 1
 assert c.c1_syn_mon_x[16] 0
 assert c.c1_syn_mon_x[17] 0
 assert c.c1_syn_mon_x[18] 0
-assert c.c1_syn_mon_x[19] 0
+assert c.c1_syn_mon_x[19] 1
 assert c.c1_syn_mon_x[20] 0
 assert c.c1_syn_mon_x[21] 0
 assert c.c1_syn_mon_x[22] 0
-assert c.c1_syn_mon_x[23] 0
+assert c.c1_syn_mon_x[23] 1
 assert c.c1_syn_mon_x[24] 0
 assert c.c1_syn_mon_x[25] 0
 assert c.c1_syn_mon_x[26] 0
-assert c.c1_syn_mon_x[27] 0
+assert c.c1_syn_mon_x[27] 1
 assert c.c1_syn_mon_x[28] 0
 assert c.c1_syn_mon_x[29] 0
 assert c.c1_syn_mon_x[30] 0
-assert c.c1_syn_mon_x[31] 0
+assert c.c1_syn_mon_x[31] 1
 assert c.c1_syn_mon_x[32] 0
 assert c.c1_syn_mon_x[33] 0
 assert c.c1_syn_mon_x[34] 0
-assert c.c1_syn_mon_x[35] 0
+assert c.c1_syn_mon_x[35] 1
 assert c.c1_syn_mon_x[36] 0
 assert c.c1_syn_mon_x[37] 0
 assert c.c1_syn_mon_x[38] 0
-assert c.c1_syn_mon_x[39] 0
+assert c.c1_syn_mon_x[39] 1
 assert c.c1_syn_mon_x[40] 0
 assert c.c1_syn_mon_x[41] 0
 assert c.c1_syn_mon_x[42] 0
-assert c.c1_syn_mon_x[43] 0
+assert c.c1_syn_mon_x[43] 1
 assert c.c1_syn_mon_x[44] 0
 assert c.c1_syn_mon_x[45] 0
 assert c.c1_syn_mon_x[46] 0
-assert c.c1_syn_mon_x[47] 0
+assert c.c1_syn_mon_x[47] 1
 assert c.c1_syn_mon_x[48] 0
 assert c.c1_syn_mon_x[49] 0
 assert c.c1_syn_mon_x[50] 0
-assert c.c1_syn_mon_x[51] 0
+assert c.c1_syn_mon_x[51] 1
 assert c.c1_syn_mon_x[52] 0
 assert c.c1_syn_mon_x[53] 0
 assert c.c1_syn_mon_x[54] 0
-assert c.c1_syn_mon_x[55] 0
+assert c.c1_syn_mon_x[55] 1
 assert c.c1_syn_mon_x[56] 0
 assert c.c1_syn_mon_x[57] 0
 assert c.c1_syn_mon_x[58] 0
-assert c.c1_syn_mon_x[59] 0
+assert c.c1_syn_mon_x[59] 1
 
 
 # disable targetting
@@ -15025,11 +15025,11 @@ assert c.in.a 0
 assert c.c1_syn_mon_x[0] 0
 assert c.c1_syn_mon_x[1] 0
 assert c.c1_syn_mon_x[2] 0
-assert c.c1_syn_mon_x[3] 0
+assert c.c1_syn_mon_x[3] 1
 assert c.c1_syn_mon_x[4] 0
 assert c.c1_syn_mon_x[5] 0
 assert c.c1_syn_mon_x[6] 0
-assert c.c1_syn_mon_x[7] 0
+assert c.c1_syn_mon_x[7] 1
 assert c.c1_syn_mon_x[8] 0
 assert c.c1_syn_mon_x[9] 0
 assert c.c1_syn_mon_x[10] 0
@@ -15060,11 +15060,11 @@ assert c.in.a 1
 assert c.c1_syn_mon_x[0] 0
 assert c.c1_syn_mon_x[1] 0
 assert c.c1_syn_mon_x[2] 0
-assert c.c1_syn_mon_x[3] 0
+assert c.c1_syn_mon_x[3] 1
 assert c.c1_syn_mon_x[4] 0
 assert c.c1_syn_mon_x[5] 1
 assert c.c1_syn_mon_x[6] 0
-assert c.c1_syn_mon_x[7] 0
+assert c.c1_syn_mon_x[7] 1
 assert c.c1_syn_mon_x[8] 0
 assert c.c1_syn_mon_x[9] 0
 assert c.c1_syn_mon_x[10] 0