Merge branch 'dev' into HEAD

This commit is contained in:
Greatorex 2022-03-30 15:09:59 +02:00
commit e09b4a0f7e
35 changed files with 59059 additions and 913 deletions

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@ -26,6 +26,33 @@
namespace tmpl { namespace tmpl {
namespace dataflow_neuro{ namespace dataflow_neuro{
export defcell KEEP_X1 (bool y; bool vdd, vss) {
bool _y;
prs{
y => _y-
[weak=1] _y => y-
}
sizing {
leak_adjust <- 1;
p_n_mode <- 1;
y {-1}; _y{-1}
}
}
export defcell A_1C2N_RB_X1 (bool! y; bool? c1,n1,n2,pr_B, sr_B; bool vdd, vss) {
bool _y;
prs{
(~c1)|~pr_B -> _y+
c1 & n1 & n2 & sr_B -> _y-
_y => y-
}
sizing {
leak_adjust <- 1;
p_n_mode <- 1;
y {-1}; _y{-1}
}
}
export defcell A_1C1P2N_RB_X1 (bool! y; bool? c1,p1,n1,n2,pr_B, sr_B; bool vdd, vss) { export defcell A_1C1P2N_RB_X1 (bool! y; bool? c1,p1,n1,n2,pr_B, sr_B; bool vdd, vss) {
bool _y; bool _y;
prs{ prs{
@ -41,6 +68,22 @@ namespace tmpl {
} }
} }
export defcell A_2C1P1N_RB_X1 (bool! y; bool? c1,c2,p1,n1,pr_B,sr_B; bool vdd, vss) {
bool _y;
prs{
(~p1 & ~c1 & ~c2)|~pr_B -> _y+
c1 & c2 & n1 & sr_B -> _y-
_y => y-
}
sizing {
leak_adjust <- 1;
p_n_mode <- 1;
y {-1}; _y{-1}
}
}
export defcell A_1C1P2N_R_X1 (bool! y; bool? c1,p1,n1,n2,pr_B, sr_B; bool vdd, vss) { export defcell A_1C1P2N_R_X1 (bool! y; bool? c1,p1,n1,n2,pr_B, sr_B; bool vdd, vss) {
prs{ prs{
(~p1 & ~c1)|~pr_B -> y- (~p1 & ~c1)|~pr_B -> y-

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@ -48,6 +48,45 @@ open std::data;
namespace tmpl { namespace tmpl {
namespace dataflow_neuro { namespace dataflow_neuro {
/**
* Dualrail decoder.
* Nc is the number of dualrail input channels.
* Then builds N output AND gates, connecting to the right input wires.
*/
export template<pint Nc, N>
defproc decoder_dualrail (Mx1of2<Nc> in; bool? out[N]; power supply) {
// signal buffers
sigbuf<N> in_tX[Nc];
sigbuf<N> in_fX[Nc];
(i:Nc:
in_tX[i].supply = supply;
in_tX[i].in = in.d[i].t;
in_fX[i].supply = supply;
in_fX[i].in = in.d[i].f;
)
// AND trees
pint bitval;
andtree<Nc> atree[N];
(k:0..N-1:atree[k].supply = supply;)
(i:0..N-1:
(j:0..Nc-1:
bitval = (i & ( 1 << j )) >> j; // Get binary digit of integer i, column j
[bitval = 1 ->
atree[i].in[j] = in_tX[j].out[i];
// atree[i].in[j] = addr_buf.out.d.d[j].t;
[]bitval = 0 ->
atree[i].in[j] = in_fX[j].out[i];
// atree[i].in[j] = addr_buf.out.d.d[j].f;
[]bitval >= 2 -> {false : "fuck"};
]
atree[i].out = out[i];
)
)
}
/** /**
* 2D decoder which uses a configurable delay from the VCtrees to buffer ack. * 2D decoder which uses a configurable delay from the VCtrees to buffer ack.
* Nx is the x size of the decoder array * Nx is the x size of the decoder array
@ -63,9 +102,6 @@ namespace tmpl {
// Buffer to recieve concat(x,y) address packet // Buffer to recieve concat(x,y) address packet
buffer<NxC+NyC> addr_buf(.in = in, .reset_B = reset_B, .supply = supply); buffer<NxC+NyC> addr_buf(.in = in, .reset_B = reset_B, .supply = supply);
// NEED TO BUFFER OUTPUTS FROM BUFFER I RECKON
// Validity trees // Validity trees
vtree<NxC> vtree_x (.supply = supply); vtree<NxC> vtree_x (.supply = supply);
@ -91,39 +127,140 @@ namespace tmpl {
// FOR TESTING PURPOSES // FOR TESTING PURPOSES
// !!!!!!!!!!!!!!!! // !!!!!!!!!!!!!!!!
// AND trees
pint bitval;
andtree<NxC> atree_x[Nx];
(k:0..Nx-1:atree_x[k].supply = supply;)
(i:0..Nx-1:
(j:0..NxC-1:
bitval = (i & ( 1 << j )) >> j; // Get binary digit of integer i, column j
[bitval = 1 ->
atree_x[i].in[j] = addr_buf.out.d.d[j].t;
[]bitval = 0 ->
atree_x[i].in[j] = addr_buf.out.d.d[j].f;
[]bitval >= 2 -> {false : "fuck"};
]
atree_x[i].out = outx[i];
)
)
andtree<NyC> atree_y[Ny]; // Decoder X/Y And trees
(k:0..Ny-1:atree_y[k].supply = supply;) decoder_dualrail<NxC,Nx> d_dr_x(.out = outx, .supply = supply);
(i:0..Ny-1: (i:0..NxC-1:d_dr_x.in.d[i] = addr_buf.out.d.d[i];)
(j:0..NyC-1:
bitval = (i & ( 1 << j )) >> j; // Get binary digit of integer i, column j decoder_dualrail<NyC,Ny> d_dr_y(.out = outy, .supply = supply);
[bitval = 1 -> (i:0..NyC-1:d_dr_y.in.d[i] = addr_buf.out.d.d[i+NxC];)
atree_y[i].in[j] = addr_buf.out.d.d[j+NxC].t;
[]bitval = 0 ->
atree_y[i].in[j] = addr_buf.out.d.d[j+NxC].f;
]
atree_y[i].out = outy[i];
)
)
} }
export template<pint Nx, Ny>
defproc and_grid(bool! out[Nx*Ny]; bool? inx[Nx], iny[Ny]; power supply) {
AND2_X1 ands[Nx*Ny];
(i:0..Nx*Ny-1:ands[i].vss = supply.vss; ands[i].vdd = supply.vdd;)
(x:0..Nx-1:
(y:0..Ny-1:
ands[x + y*Nx].a = inx[x];
ands[x + y*Nx].b = iny[y];
ands[x + y*Nx].y = out[x + y*Nx];
)
)
}
/**
* 2D decoder which uses synapse handshaking using line pulldowns.
* Nx is the x size of the decoder array
* NxC is the number of wires in the x channel.
* but my guess is that we can't do logs...
* the req on a1of1 out is the req to each synapse.
* The ack back from each line should go high when the synapse is charged.
* N_dly is a hard coded delay of the pull down circuit.
* It can be set to 0.
*/
export template<pint NxC, NyC, Nx, Ny, N_dly>
defproc decoder_2d_hs (avMx1of2<NxC+NyC> in; a1of1 out[Nx*Ny]; bool? reset_B; power supply) {
// Buffer to recieve concat(x,y) address packet
buffer<NxC+NyC> addr_buf(.in = in, .reset_B = reset_B, .supply = supply);
// Decoder X/Y And trees
decoder_dualrail<NxC,Nx> d_dr_x(.supply = supply);
(i:0..NxC-1:d_dr_x.in.d[i] = addr_buf.out.d.d[i];)
decoder_dualrail<NyC,Ny> d_dr_y(.supply = supply);
(i:0..NyC-1:d_dr_y.in.d[i] = addr_buf.out.d.d[i+NxC];)
// Validity
vtree<NxC> vtree_x (.supply = supply);
vtree<NyC> vtree_y (.supply = supply);
(i:0..NxC-1:vtree_x.in.d[i].t = addr_buf.out.d.d[i].t;)
(i:0..NxC-1:vtree_x.in.d[i].f = addr_buf.out.d.d[i].f;)
(i:0..NyC-1:vtree_y.in.d[i].t = addr_buf.out.d.d[i+NxC].t;)
(i:0..NyC-1:vtree_y.in.d[i].f = addr_buf.out.d.d[i+NxC].f;)
A_2C_B_X1 C2el(.c1 = vtree_x.out, .c2 = vtree_y.out, .y = addr_buf.out.v,
.vdd = supply.vdd, .vss = supply.vss);
// and grid for reqs into synapses
and_grid<Nx, Ny> _and_grid(.inx = d_dr_x.out, .iny = d_dr_y.out, .supply = supply);
(i:Nx*Ny: out[i].r = _and_grid.out[i];)
// Acknowledge pull down time
// Pull UPs on the reqB lines by synapses (easier to invert).
bool _out_reqsB[Nx], _out_acksB[Nx]; // The vertical output ack lines from each syn.
PULLDOWN2_X4 req_pulldowns[Nx*Ny];
pint index;
(i:Nx:
(j:Ny:
index = i + Nx*j;
req_pulldowns[index].a = out[index].a;
req_pulldowns[index].b = _out_acksB[i];
req_pulldowns[index].y = _out_reqsB[i];
req_pulldowns[index].vss = supply.vss;
req_pulldowns[index].vdd = supply.vdd;
)
)
// ReqB keep cells
KEEP_X1 req_keeps[Nx];
(i:Nx:
req_keeps[i].y = _out_reqsB[i];
req_keeps[i].vdd = supply.vdd;
req_keeps[i].vss = supply.vss;
)
// req-ack buffers
sigbuf<Ny> req_bufs[Nx];
(i:Nx:
req_bufs[i].in = _out_reqsB[i];
req_bufs[i].out[0] = _out_acksB[i]; // DANGER DANGER
req_bufs[i].supply = supply;
)
// Line end pull UPs (triggered once synapse reqs removed)
delay_fifo<N_dly> pu_dlys[Nx];
OR2_X1 pu_ORs[Nx];
PULLUP_X4 pu[Nx]; // TODO probably replace this with variable strength PU
AND2_X1 pu_ANDs[Nx];
(i:Nx:
pu_dlys[i].in = _out_acksB[i];
pu_dlys[i].supply = supply;
pu_ORs[i].a = pu_dlys[i].out;
pu_ORs[i].b = d_dr_x.out[i];
pu_ORs[i].vdd = supply.vdd;
pu_ORs[i].vss = supply.vss;
pu_ANDs[i].a = pu_ORs[i].y;
pu_ANDs[i].b = reset_B; // TODO buffer
pu_ANDs[i].vdd = supply.vdd;
pu_ANDs[i].vss = supply.vss;
pu[i].a = pu_ANDs[i].y;
pu[i].y = _out_reqsB[i];
pu[i].vdd = supply.vdd;
pu[i].vss = supply.vss;
)
// ORtree from all output reqs, back to the buffer ack.
// This is instead of the ack that came from the delayed validity trees,
// in decoder_2d_dly.
ortree<Nx> _ortree(.out = addr_buf.out.a, .supply = supply);
INV_X1 out_req_invs[Nx];
(i:Nx:
out_req_invs[i].a = _out_reqsB[i];
out_req_invs[i].vdd = supply.vdd;
out_req_invs[i].vss = supply.vss;
_ortree.in[i] = out_req_invs[i].y;
)
}
/* /*
@ -224,21 +361,6 @@ namespace tmpl {
} }
export template<pint Nx, Ny>
defproc and_grid(bool! out[Nx*Ny]; bool? inx[Nx], iny[Ny]; power supply) {
AND2_X1 ands[Nx*Ny];
(i:0..Nx*Ny-1:ands[i].vss = supply.vss; ands[i].vdd = supply.vdd;)
(x:0..Nx-1:
(y:0..Ny-1:
ands[x + y*Nx].a = inx[x];
ands[x + y*Nx].b = iny[y];
ands[x + y*Nx].y = out[x + y*Nx];
)
)
}
// Generates the OR-trees required to go from // Generates the OR-trees required to go from
// N one-hot inputs to Nc dual rail binary encoding. // N one-hot inputs to Nc dual rail binary encoding.
export template<pint Nc, N> export template<pint Nc, N>
@ -348,7 +470,7 @@ namespace tmpl {
export template<pint NxC, NyC, Nx, Ny, ACK_STRENGTH> export template<pint NxC, NyC, Nx, Ny, ACK_STRENGTH>
defproc encoder2D(a1of1 x[Nx]; a1of1 y[Ny]; avMx1of2<(NxC + NyC)> out; power supply; bool reset_B) { defproc encoder2D(a1of1 inx[Nx]; a1of1 iny[Ny]; avMx1of2<(NxC + NyC)> out; power supply; bool reset_B) {
// Reset buffers // Reset buffers
pint H = 2*(NxC + NyC); //Reset strength? to be investigated pint H = 2*(NxC + NyC); //Reset strength? to be investigated
bool _reset_BX,_reset_BXX[H]; bool _reset_BX,_reset_BXX[H];
@ -359,10 +481,10 @@ namespace tmpl {
a1of1 _arb_out_x, _arb_out_y; a1of1 _arb_out_x, _arb_out_y;
a1of1 _x_temp[Nx],_y_temp[Ny]; // For wiring the reqs to the arbtrees a1of1 _x_temp[Nx],_y_temp[Ny]; // For wiring the reqs to the arbtrees
(i:Nx: (i:Nx:
_x_temp[i].r = x[i].r; _x_temp[i].r = inx[i].r;
) )
(i:Ny: (i:Ny:
_y_temp[i].r = y[i].r; _y_temp[i].r = iny[i].r;
) )
arbtree<Nx> Xarb(.in = _x_temp,.out = _arb_out_x,.supply = supply); arbtree<Nx> Xarb(.in = _x_temp,.out = _arb_out_x,.supply = supply);
arbtree<Ny> Yarb(.in = _y_temp,.out = _arb_out_y,.supply = supply); arbtree<Ny> Yarb(.in = _y_temp,.out = _arb_out_y,.supply = supply);
@ -372,12 +494,12 @@ namespace tmpl {
sigbuf_1output<ACK_STRENGTH> y_ack_arb[Ny]; sigbuf_1output<ACK_STRENGTH> y_ack_arb[Ny];
(i:Nx: (i:Nx:
x_ack_arb[i].in = _x_temp[i].a; x_ack_arb[i].in = _x_temp[i].a;
x_ack_arb[i].out = x[i].a; x_ack_arb[i].out = inx[i].a;
x_ack_arb[i].supply = supply; x_ack_arb[i].supply = supply;
) )
(i:Ny: (i:Ny:
y_ack_arb[i].in = _y_temp[i].a; y_ack_arb[i].in = _y_temp[i].a;
y_ack_arb[i].out = y[i].a; y_ack_arb[i].out = iny[i].a;
y_ack_arb[i].supply = supply; y_ack_arb[i].supply = supply;
) )
@ -408,7 +530,7 @@ namespace tmpl {
// X_req ORtree // X_req ORtree
bool _x_req_array[Nx], _x_v_B; bool _x_req_array[Nx], _x_v_B;
(i:Nx:_x_req_array[i] = x[i].r;) (i:Nx:_x_req_array[i] = inx[i].r;)
ortree<Nx> x_req_ortree(.in = _x_req_array,.out = _x_v,.supply = supply); //todo BUFF ortree<Nx> x_req_ortree(.in = _x_req_array,.out = _x_v,.supply = supply); //todo BUFF
INV_X1 not_x_req_ortree(.a = _x_v,.y = _x_v_B); INV_X1 not_x_req_ortree(.a = _x_v,.y = _x_v_B);
@ -450,17 +572,17 @@ namespace tmpl {
// Encoders // Encoders
bool x_acks[Nx]; bool x_acks[Nx];
Mx1of2<NxC> x_enc_out; Mx1of2<NxC> x_enc_out;
(i:Nx:x_acks[i] = x[i].a;) (i:Nx:x_acks[i] = inx[i].a;)
dualrail_encoder<NxC, Nx> x_encoder(.in = x_acks, .out = x_enc_out, .supply = supply); dualrail_encoder<NxC, Nx> x_encoder(.in = x_acks, .out = x_enc_out, .supply = supply);
bool y_acks[Nx]; bool y_acks[Ny];
Mx1of2<NyC> y_enc_out; Mx1of2<NyC> y_enc_out;
(i:Ny:y_acks[i] = y[i].a;) (i:Ny:y_acks[i] = iny[i].a;)
dualrail_encoder<NyC, Ny> y_encoder(.in = y_acks, .out = y_enc_out, .supply = supply); dualrail_encoder<NyC, Ny> y_encoder(.in = y_acks, .out = y_enc_out, .supply = supply);
// Valid trees // Valid trees
vtree<NxC> vtree_x(.in = x_enc_out, .out = _in_x_v, .supply = supply); vtree<NxC> vtree_x(.in = x_enc_out, .out = _in_x_v, .supply = supply);
vtree<NxC> vtree_y(.in = y_enc_out, .out = _in_y_v, .supply = supply); vtree<NyC> vtree_y(.in = y_enc_out, .out = _in_y_v, .supply = supply);
// Buffer func thing // Buffer func thing
Mx1of2<NxC + NyC> into_buffer; Mx1of2<NxC + NyC> into_buffer;
@ -474,6 +596,185 @@ namespace tmpl {
/**
* Neuron handshaking.
* Looks for a rising edge on the neuron req.
* Then performs a 2d handshake out outy then outx.
*/
export
defproc nrn_hs_2D(a1of1 in; a1of1 outx; a1of1 outy; power supply; bool reset_B) {
bool _reset_BX;
BUF_X2 reset_buf(.a = reset_B, .y = _reset_BX, .vdd = supply.vdd, .vss = supply.vss);
bool _en, _req;
// A_1C2N_RB_X1 A_ack(.c1 = _en, .n1 = _req, .n2 = in.r, .y = in.a,
// .pr_B = _reset_BX, .sr_B = _reset_BX, .vss = supply.vss, .vdd = supply.vdd);
// Switched it back
// Because had the problem that if the req was not removed in time,
// it would be recounted as a double spike,
// since in.req is still high after the out has been dealt with.
A_2C1N_RB_X1 A_ack(.c1 = _en, .c2 = in.r, .n1 = _req, .y = in.a,
.pr_B = _reset_BX, .sr_B = _reset_BX, .vss = supply.vss, .vdd = supply.vdd);
A_1C1P_X1 A_en(.p1 = _req, .c1 = in.a, .y = _en,
.vss = supply.vss, .vdd = supply.vdd);
bool _y_a_B, _x_a_B;
INV_X2 inv_x(.a = outx.a, .y = _x_a_B, .vss = supply.vss, .vdd = supply.vdd);
INV_X2 inv_y(.a = outy.a, .y = _y_a_B, .vss = supply.vss, .vdd = supply.vdd);
A_2C1P1N_RB_X1 A_req(.p1 = _x_a_B, .c1 = _en, .c2 = _y_a_B, .n1 = in.r, .y = _req,
.pr_B = _reset_BX, .sr_B = _reset_BX, .vdd = supply.vdd, .vss = supply.vss);
// y_req pull up
NAND2_X1 nand_y(.a = _y_a_B, .b = _req, .vdd = supply.vdd, .vss = supply.vss);
PULLUP_X4 pu_y(.a = nand_y.y, .y = outy.r, .vdd = supply.vdd, .vss = supply.vss);
// x_req pull up
NAND3_X1 nand_x(.a = _x_a_B, .b = _req, .c = outy.a, .vdd = supply.vdd, .vss = supply.vss);
PULLUP_X4 pu_x(.a = nand_x.y, .y = outx.r, .vdd = supply.vdd, .vss = supply.vss);
}
export
defproc nrn_line_end_pull_down (bool? in; bool? reset_B; power supply; bool! out)
{
bool _out, __out, nand_out;
BUF_X1 buf1(.a=in, .y=_out, .vdd=supply.vdd,.vss=supply.vss);
BUF_X1 buf2(.a=_out, .y=__out, .vdd=supply.vdd,.vss=supply.vss);
INV_X1 inv(.a = __out, .vdd=supply.vdd,.vss =supply.vss);
NAND2_X1 aenor(.a=inv.y, .b=reset_B, .y = nand_out, .vdd=supply.vdd,.vss=supply.vss);
PULLDOWN_X4 pull_down(.a=nand_out, .y=out);
}
/**
* A 2d grid of neuron handshakers.
* Should then slot into the encoder.
* Each neuron has an a1of1 channel (in), which is tripped when a neuron spikes.
* N_dly is number of delay elements to add to line pull down,
* for the purpose of running ACT sims.
* It should probably be set to 0 though.
*/
export template<pint Nx, Ny, N_dly>
defproc nrn_hs_2D_array(a1of1 in[Nx*Ny]; a1of1 outx[Nx], outy[Ny];
power supply; bool reset_B) {
// Make hella signal buffers
sigbuf<Ny> rsbx(.in = reset_B, .supply = supply);
sigbuf<Nx> rsb[Ny]; // ResetSigBuf
(j:Ny:
rsb[j].in = rsbx.out[j];
rsb[j].supply = supply;
)
// Add buffers on output req lines
a1of1 _outx[Nx], _outy[Ny];
BUF_X4 out_req_buf_x[Nx];
(i:Nx:
out_req_buf_x[i].vss = supply.vss;
out_req_buf_x[i].vdd = supply.vdd;
out_req_buf_x[i].a = _outx[i].r;
out_req_buf_x[i].y = outx[i].r;
)
BUF_X4 out_req_buf_y[Ny];
(i:Ny:
out_req_buf_y[i].vss = supply.vss;
out_req_buf_y[i].vdd = supply.vdd;
out_req_buf_y[i].a = _outy[i].r;
out_req_buf_y[i].y = outy[i].r;
)
// Add buffers on output ack lines
// Note that this should be generalised.
// And probably won't even be done by ACT/innovus anwyay
// TODO: do it properly with sigbufs?
BUF_X4 out_ack_buf_x[Nx];
(i:Nx:
out_ack_buf_x[i].vss = supply.vss;
out_ack_buf_x[i].vdd = supply.vdd;
out_ack_buf_x[i].a = outx[i].a;
out_ack_buf_x[i].y = _outx[i].a;
)
BUF_X4 out_ack_buf_y[Ny];
(i:Ny:
out_ack_buf_y[i].vss = supply.vss;
out_ack_buf_y[i].vdd = supply.vdd;
out_ack_buf_y[i].a = outy[i].a;
out_ack_buf_y[i].y = _outy[i].a;
)
// Create handshake grid
pint index;
nrn_hs_2D neurons[Nx*Ny];
(i:0..Nx-1:
(j:0..Ny-1:
index = i + j*Nx;
neurons[index].supply = supply;
neurons[index].reset_B = rsb[j].out[i];
neurons[index].in = in[index];
neurons[index].outx = _outx[i];
neurons[index].outy = _outy[j];
)
)
// Create delay fifos to emulate the fact that the line pull downs
// are at the end of the line, and thus slow.
// Note that if N_dly = 0, delay fifo is just a pipe.
delay_fifo<N_dly> dly_x[Nx];
delay_fifo<N_dly> dly_y[Ny];
// Create x line req pull downs
nrn_line_end_pull_down pd_x[Nx];
sigbuf<Nx> rsb_pd_x(.in = reset_B, .supply = supply);
(i:0..Nx-1:
dly_x[i].supply = supply;
dly_x[i].in = _outx[i].a;
pd_x[i].in = dly_x[i].out;
pd_x[i].out = _outx[i].r;
pd_x[i].reset_B = rsb_pd_x.out[i];
pd_x[i].supply = supply;
)
// Create y line req pull downs
nrn_line_end_pull_down pd_y[Ny];
sigbuf<Ny> rsb_pd_y(.in = reset_B, .supply = supply);
(j:0..Ny-1:
dly_y[j].supply = supply;
dly_y[j].in = _outy[j].a;
pd_y[j].in = dly_y[j].out;
pd_y[j].out = _outy[j].r;
pd_y[j].reset_B = rsb_pd_y.out[j];
pd_y[j].supply = supply;
)
// Add keeps
KEEP_X1 keep_x[Nx];
(i:Nx:
keep_x[i].vdd = supply.vdd;
keep_x[i].vss = supply.vss;
keep_x[i].y = _outx[i].r;
)
KEEP_X1 keep_y[Ny];
(j:Ny:
keep_y[j].vdd = supply.vdd;
keep_y[j].vss = supply.vss;
keep_y[j].y = _outy[j].r;
)
}
} }
} }

View File

@ -0,0 +1,167 @@
/*************************************************************************
*
* This file is part of ACT dataflow neuro library
*
* Copyright (c) 2022 University of Groningen - Ole Richter
* Copyright (c) 2022 University of Groningen - Michele Mastella
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
* Copyright (c) 2022 University of Groningen - Madison Cotteret
*
*
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
*
* You may redistribute and modify this documentation and make products
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
* for applicable conditions.
*
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
*
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
* these sources, You must maintain the Source Location visible in its
* documentation.
*
**************************************************************************
*/
import "../../dataflow_neuro/cell_lib_async.act";
import "../../dataflow_neuro/cell_lib_std.act";
import "../../dataflow_neuro/treegates.act";
import "../../dataflow_neuro/primitives.act";
import std::channel;
open std::channel;
// import std::func;
open std;
import std::data;
open std::data;
namespace tmpl {
namespace dataflow_neuro {
/**
* Bundled data (non dual rail, with req)
* 2
* quasi delay insensitive channel (dual rail).
* Basically a buffer with a bitwise conversion in front of it.
*/
export template<pint N, N_dly_cfg>
defproc bd2qdi(bd<N> in; avMx1of2<N> out; bool? dly_cfg[N_dly_cfg]; power supply; bool? reset_B) {
// Delay on req_in
bool _req;
delayprog<N_dly_cfg> dly(.in = in.r, .out = _req, .s = dly_cfg, .supply = supply);
// sig buff the reset signal
bool _reset_BX, _reset_BXX[N];
BUF_X4 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
sigbuf<N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX, .supply=supply);
// sig buff the req
bool _reqX, _reqXX[N];
BUF_X4 req_buf(.a=_req, .y=_reqX,.vdd=supply.vdd,.vss=supply.vss);
sigbuf<N> req_bufarray(.in=_reqX, .out=_reqXX, .supply=supply);
// bd2qdi conversion
// Each line goes to a t pin, its not to a f.
bool _inB[N];
INV_X1 input_invs[N];
(i:N:
input_invs[i].a = in.d[i];
input_invs[i].y = _inB[i];
input_invs[i].vss = supply.vss;
input_invs[i].vdd = supply.vdd;
)
// BUFFER
// Basically the buffer_s but with the validity tree ripped out
// and just connected to in_req instead.
// And probably need a delay on the in_ack to ensure en has time to disable
// before the inputs go to another state.
// Actually apparently no: there is a fixed, huge delay, already incurred
// by communicating with pads-> uC -> windows 95 and back again.
// Since the input is never invalid, also need a mechanism
// for the output to become invalid, when an out_ack is received.
//control
bool _en;
A_3C_RB_X4 inack_ctl(.c1=_en,.c2=_reqX,.c3=out.v,.y=in.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
A_1C1P_X1 en_ctl(.c1=in.a,.p1=out.v,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
//function
bool _out_a_BX_t[N],_out_a_BX_f[N],_out_a_B,_en_X_t[N],_en_X_f[N];
A_2C2N_RB_X4 f_buf_func[N];
A_2C2N_RB_X4 t_buf_func[N];
sigbuf<N> en_buf_t(.in=_en, .out=_en_X_t, .supply=supply);
sigbuf<N> en_buf_f(.in=_en, .out=_en_X_f, .supply=supply);
INV_X1 out_a_inv(.a=out.a,.y=_out_a_B, .vss = supply.vss, .vdd = supply.vdd);
sigbuf<N> out_a_B_buf_f(.in=_out_a_B,.out=_out_a_BX_t, .supply=supply);
sigbuf<N> out_a_B_buf_t(.in=_out_a_B,.out=_out_a_BX_f, .supply=supply);
// check if you can also do single var to array connect a=b[N]
// and remove them from the loop
(i:N:
f_buf_func[i].y=out.d.d[i].f;
t_buf_func[i].y=out.d.d[i].t;
f_buf_func[i].c1=_en_X_f[i];
t_buf_func[i].c1=_en_X_t[i];
f_buf_func[i].c2=_out_a_BX_f[i];
t_buf_func[i].c2=_out_a_BX_t[i];
f_buf_func[i].n1=_inB[i];
t_buf_func[i].n1=in.d[i];
f_buf_func[i].n2=_reqXX[i];
t_buf_func[i].n2=_reqXX[i];
f_buf_func[i].vdd=supply.vdd;
t_buf_func[i].vdd=supply.vdd;
f_buf_func[i].vss=supply.vss;
t_buf_func[i].vss=supply.vss;
t_buf_func[i].pr_B = _reset_BXX[i];
t_buf_func[i].sr_B = _reset_BXX[i];
f_buf_func[i].pr_B = _reset_BXX[i];
f_buf_func[i].sr_B = _reset_BXX[i];
)
}
/**
* quasi delay insensitive channel (dual rail).
* 2
* Bundled data (non dual rail, with req)
*/
export template<pint N, N_dly_cfg>
defproc qdi2bd(avMx1of2<N> in; bd<N> out; bool? dly_cfg[N_dly_cfg]; power supply; bool? reset_B) {
// Buffer
buffer<N> buf(.in = in, .supply = supply, .reset_B = reset_B);
buf.out.a = out.a;
// Vtree
vtree<N> out_vtree(.supply = supply);
(i:N:
out_vtree.in.d[i].t = buf.out.d.d[i].t;
out_vtree.in.d[i].f = buf.out.d.d[i].f;
)
buf.out.v = out_vtree.out;
// Delay
delayprog<N_dly_cfg> dly(.in = out_vtree.out, .out = out.r, .s = dly_cfg, .supply = supply);
out_vtree.out = dly.in;
// Wire output data bits to buffer True lines
(i:N:
buf.out.d.d[i].t = out.d[i];
)
}
}
}

View File

@ -165,7 +165,7 @@ namespace tmpl {
fifo_element[i].supply = supply; fifo_element[i].supply = supply;
fifo_element[i].reset_B = _reset_BXX[i]; fifo_element[i].reset_B = _reset_BXX[i];
) )
fifo_element[N-1].out = out; fifo_element[M-1].out = out;
// reset buffers // reset buffers
bool _reset_BX; bool _reset_BX;
@ -685,26 +685,90 @@ namespace tmpl {
(i:((1<<N)-1):dly[i].vss = supply.vss;) (i:((1<<N)-1):dly[i].vss = supply.vss;)
} }
export // Non programmable delays
defproc line_end_pull_up (a1of1 in; bool? reset_B; power supply; bool! out) // N is number of delays to have in series (not log!!).
{ // Is useful for testing purposes.
bool _out, __out, nor_out; // But should probably remove before running innovus etc.
BUF_X4 buf1(.a=in.a, .y=_out, .vdd=supply.vdd,.vss=supply.vss); export template<pint N>
BUF_X4 buf2(.a=_out, .y=__out, .vdd=supply.vdd,.vss=supply.vss); defproc delay_fifo (bool out; bool in; power supply) {
{ N >= 0 : "What?" };
[N >= 1 ->
DLY4_X1 dly[N];
NOR2_X1 aenor(.a=_out, .b=reset_B, .y = nor_out, .vdd=supply.vdd,.vss=supply.vss); dly[0].vdd = supply.vdd;
dly[0].vss = supply.vss;
dly[0].a = in;
PULLUP_X4 pull_up(.a=nor_out, .y=out); (i:1..N-1:
dly[i].vdd = supply.vdd;
dly[i].vss = supply.vss;
dly[i].a = dly[i-1].y;
)
dly[N-1].vdd = supply.vdd;
dly[N-1].vss = supply.vss;
dly[N-1].y = out;
[] N = 1 ->
in = out;
]
} }
defproc line_end_pull_down (a1of1 in; bool? reset_B; power supply; bool! out)
/**
* Appends a hard-coded word "VAL" to an input.
* Works by piping through all sigs, but adding
* some extra sigs when the input is valid.
* N is size of channel to pipe through.
* NVAL is size of word to be put on output.
* VAL is word to be put on output.
* Output looks like
* 0..............N........N+NVAL-1
* --input_data----LSB....MSB
*
*/
export template<pint N, NVAL, VAL>
defproc append (avMx1of2<N> in; avMx1of2<N+NVAL> out; power supply)
{ {
bool _out, __out, nor_out; { N >= 0 : "What?" };
BUF_X4 buf1(.a=in.a, .y=_out, .vdd=supply.vdd,.vss=supply.vss); { NVAL >= 0 : "What?" };
BUF_X4 buf2(.a=_out, .y=__out, .vdd=supply.vdd,.vss=supply.vss); { NVAL < 1<<VAL : "VAL too big!" };
NOR2_X1 aenor(.a=_out, .b=reset_B, .y = nor_out, .vdd=supply.vdd,.vss=supply.vss); // valid tree
vtree<N> in_val(.supply = supply);
(i:N:
in_val.in.d[i].t = in.d.d[i].t;
in_val.in.d[i].f = in.d.d[i].f;
)
// wire through most signals
(i:N:
in.d.d[i].t = out.d.d[i].t;
in.d.d[i].f = out.d.d[i].f;
)
in.a = out.a;
in.v = out.v;
// appender
pint bitval;
sigbuf<NVAL> sb(.in = in_val.out, .supply = supply);
TIELO_X1 tielows[NVAL];
(i:NVAL:tielows[i].vss = supply.vss; tielows[i].vdd = supply.vdd;)
(i:0..NVAL-1:
bitval = (VAL & ( 1 << i )) >> i;
[ bitval = 1 ->
out.d.d[i+N].t = sb.out[i];
out.d.d[i+N].f = tielows[i].y;
[] bitval = 0 ->
out.d.d[i+N].f = sb.out[i];
out.d.d[i+N].t = tielows[i].y;
[] bitval >= 2 -> {false : "fuck"};
]
)
PULLUP_X4 pull_down(.a=nor_out, .y=out);
} }
}} }}

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@ -0,0 +1,53 @@
/*************************************************************************
*
* This file is part of ACT dataflow neuro library.
* It's the testing facility for cell_lib_std.act
*
* Copyright (c) 2022 University of Groningen - Ole Richter
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
* Copyright (c) 2022 University of Groningen - Michele Mastella
* Copyright (c) 2022 University of Groningen - Madison Cotteret
*
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
*
* You may redistribute and modify this documentation and make products
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
* for applicable conditions.
*
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
*
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
* these sources, You must maintain the Source Location visible in its
* documentation.
*
**************************************************************************
*/
import "../../dataflow_neuro/primitives.act";
import globals;
open tmpl::dataflow_neuro;
defproc append_5_3_2(avMx1of2<5> in; avMx1of2<8> out)
{
bool _reset_B;
prs {
Reset => _reset_B-
}
fifo<5,4> fifo_pre(.in = in, .reset_B = _reset_B);
append<5,3,3> app(.in = fifo_pre.out);
fifo<5+3,4> fifo_post(.in = app.out, .out = out, .reset_B = _reset_B);
app.supply.vdd = Vdd;
app.supply.vss = GND;
fifo_pre.supply.vdd = Vdd;
fifo_pre.supply.vss = GND;
fifo_post.supply.vdd = Vdd;
fifo_post.supply.vss = GND;
}
append_5_3_2 b;

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@ -0,0 +1,78 @@
watchall
set b.out.a 0
set b.out.v 0
set Reset 0
set-qdi-channel-neutral "b.in" 5
cycle
system "echo '[] set Reset 1'"
set Reset 1
cycle
system "echo '[] set Reset 0'"
set Reset 0
mode run
cycle
status X
assert-qdi-channel-neutral "b.out" 8
assert b.in.a 0
assert b.in.v 0
system "echo '[] sending in a 31'"
set-qdi-channel-valid "b.in" 5 31
cycle
assert-qdi-channel-valid "b.out" 8 127
assert b.in.a 1
assert b.in.v 1
system "echo '[] removing input'"
set-qdi-channel-neutral "b.in" 5
cycle
assert b.in.a 0
assert b.in.v 0
system "echo '[] sending in a 0'"
set-qdi-channel-valid "b.in" 5 0
cycle
# assert-qdi-channel-valid "b.out" 8 96
assert b.in.a 1
assert b.in.v 1
system "echo '[] removing input'"
set-qdi-channel-neutral "b.in" 5
cycle
assert b.in.a 0
assert b.in.v 0
system "echo '[] receiving out ack/val'"
set b.out.a 1
set b.out.v 1
cycle
assert-qdi-channel-neutral "b.out" 8
system "echo '[] removing out ack/val'"
set b.out.a 0
set b.out.v 0
cycle
assert-qdi-channel-valid "b.out" 8 96
system "echo '[] receiving out ack/val'"
set b.out.a 1
set b.out.v 1
cycle
assert-qdi-channel-neutral "b.out" 8
system "echo '[] removing out ack/val'"
set b.out.a 0
set b.out.v 0
cycle
assert-qdi-channel-neutral "b.out" 8

View File

@ -0,0 +1,615 @@
b.b._out_a_BX_f[0] b.b.dly.dly[5].__y b.b.dly.mu2[0]._s b.b._inB[1] b.b.dly.dly[9].__y b.in.r b.b._inB[4] b.b.dly.dly[6].y b.in.d[1] b.b.dly.dly[3].a b.in.d[4] b.b.dly.dly[11].__y b.b._reqX b.b._en_X_f[0] b.b.dly.dly[13].y b.b.dly.dly[4]._y b.dly_cfg[3] b.in.d[2] b.b.dly.dly[11].y b.b.dly.dly[0].a b.b._en_X_t[0] b.b.dly.mu2[3].b b.dly_cfg[2] b.b._out_a_BX_t[0] b.b._reqXX[0] b.out.v b.b.dly.dly[7].___y b.b._out_a_B b.b._inB[2] b.b._inB[0] b.b.dly._a[1] b.dly_cfg[1] b.b.dly.dly[8].__y b.b.dly.dly[4].___y b.in.d[0] b.b.dly.dly[8]._y b.b.dly.dly[0].__y b.dly_cfg[0] b.b.dly.dly[7].a b.b.req_buf._y b.b.dly.dly[8].y b.b.en_buf_f.buf2._y b.b.dly.dly[10].y b.b.dly.dly[3].___y b.b.dly.mu2[1]._y b.b.dly.dly[5].y b.b.dly._a[2] b.b.dly.dly[6]._y b.b.dly.mu2[3]._s b.b.dly.dly[7].y b.b.en_buf_t.buf2._y b.b._en b.b.dly._a[3] b.b.dly.dly[1].___y b.out.a b.in.d[3] b.b.dly.dly[2]._y b.b.dly.dly[7].__y b.b._req b.b.dly.dly[12].___y b.b.dly.dly[12].y b.b.dly.dly[8].___y b.b.dly.dly[1].a b.b.dly.dly[9].___y b.b.dly.dly[3].y b.b.dly.dly[2].y b.b.dly.dly[14].___y b.b._inB[3] b.b.dly.mu2[0]._y b.b.dly.dly[6].___y b.b.dly.and2[0]._y b.b.dly.dly[3]._y b.b.dly.dly[10].__y b.b.out_a_B_buf_t.buf2._y b.b.dly.mu2[3]._y b.b.req_bufarray.buf2._y b.b.dly.dly[5]._y b.b.dly.mu2[1]._s b.b.dly.dly[4].y b.b.dly.dly[1]._y b.b.dly.and2[3]._y b.b.dly.dly[13].___y b.b.dly.dly[0]._y b.b.dly.dly[11]._y b.b.dly.dly[14].__y b.b.dly.dly[1].__y b.b.dly.mu2[2]._y b.b.dly.and2[1]._y b.b.out_a_B_buf_f.buf2._y b.b.dly.dly[9].y b.b.dly.dly[0].___y b.b.dly.dly[7]._y b.b.dly.dly[13]._y b.b.dly.dly[4].__y b.b.dly.and2[2]._y b.b.dly.dly[12].__y b.b.dly.dly[11].___y b.b.dly.dly[1].y b.b.dly.dly[12]._y b.b.dly.dly[2].__y b.b.dly.dly[14]._y b.b.dly.dly[5].___y b.b.dly.dly[2].___y b.b.dly.dly[0].y b.b.dly.dly[3].__y b.b.dly.mu2[2]._s b.b.dly.dly[13].__y b.b.dly.dly[10].___y b.b.dly.dly[9]._y b.b.dly.dly[6].__y b.b.dly.dly[10]._y
87848 b.out.a : 0
87848 Reset : 0
87848 b.in.r : 0
87848 b.dly_cfg[3] : 1
87848 b.dly_cfg[2] : 1
87848 b.in.d[4] : 0
87848 b.out.v : 0
87848 b.dly_cfg[1] : 1
87848 b.in.d[3] : 1
87848 b.in.d[2] : 0
87848 b.dly_cfg[0] : 1
87848 b.in.d[1] : 0
87848 b.in.d[0] : 1
87849 b.b.dly.mu2[1]._s : 0 [by b.dly_cfg[1]:=1]
87849 b.b._inB[3] : 0 [by b.in.d[3]:=1]
87851 b.b._inB[0] : 0 [by b.in.d[0]:=1]
88130 b.b.dly.mu2[0]._s : 0 [by b.dly_cfg[0]:=1]
88270 b.b._inB[4] : 1 [by b.in.d[4]:=0]
88616 b.b._inB[1] : 1 [by b.in.d[1]:=0]
101697 b.b.dly.and2[0]._y : 1 [by b.in.r:=0]
102191 b.b.dly.mu2[2]._s : 0 [by b.dly_cfg[2]:=1]
108053 b.b._inB[2] : 1 [by b.in.d[2]:=0]
112660 b.b.dly.mu2[3]._s : 0 [by b.dly_cfg[3]:=1]
117628 b._reset_B : 1 [by Reset:=0]
118179 b.b.reset_buf._y : 0 [by b._reset_B:=1]
119250 b.b._reset_BX : 1 [by b.b.reset_buf._y:=0]
120204 b.b.reset_bufarray.buf2._y : 0 [by b.b._reset_BX:=1]
121285 b.b._reset_BXX[0] : 1 [by b.b.reset_bufarray.buf2._y:=0]
121303 b.b.f_buf_func[4]._y : X [by b.b._reset_BXX[0]:=1]
122267 b.b.f_buf_func[2]._y : X [by b.b._reset_BXX[0]:=1]
124138 b.b.dly.dly[0].a : 0 [by b.b.dly.and2[0]._y:=1]
125288 b.b.t_buf_func[3]._y : X [by b.b._reset_BXX[0]:=1]
125298 b.b.t_buf_func[0]._y : X [by b.b._reset_BXX[0]:=1]
125501 b.b.t_buf_func[0].y : X [by b.b.t_buf_func[0]._y:=X]
125790 b.b.t_buf_func[3].y : X [by b.b.t_buf_func[3]._y:=X]
128898 b.b.dly.dly[0]._y : 1 [by b.b.dly.dly[0].a:=0]
130752 b.b.dly.dly[0].__y : 0 [by b.b.dly.dly[0]._y:=1]
130891 b.b.dly.dly[0].___y : 1 [by b.b.dly.dly[0].__y:=0]
136562 b.b._en : 1 [by b.out.v:=0]
136573 b.b.en_buf_t.buf2._y : 0 [by b.b._en:=1]
136631 b.b.en_buf_f.buf2._y : 0 [by b.b._en:=1]
136835 b.b._en_X_f[0] : 1 [by b.b.en_buf_f.buf2._y:=0]
139501 b.b._out_a_B : 1 [by b.out.a:=0]
139502 b.b.out_a_B_buf_f.buf2._y : 0 [by b.b._out_a_B:=1]
139516 b.b.out_a_B_buf_t.buf2._y : 0 [by b.b._out_a_B:=1]
139539 b.b._out_a_BX_t[0] : 1 [by b.b.out_a_B_buf_f.buf2._y:=0]
140255 b.b._out_a_BX_f[0] : 1 [by b.b.out_a_B_buf_t.buf2._y:=0]
143851 b.b.f_buf_func[2].y : X [by b.b.f_buf_func[2]._y:=X]
166204 b.b.f_buf_func[4].y : X [by b.b.f_buf_func[4]._y:=X]
167237 b.b.dly.dly[0].y : 0 [by b.b.dly.dly[0].___y:=1]
167349 b.b.dly.mu2[0]._y : 1 [by b.b.dly.dly[0].y:=0]
175755 b.b.f_buf_func[1]._y : X [by b.b._reset_BXX[0]:=1]
175795 b.b.f_buf_func[1].y : X [by b.b.f_buf_func[1]._y:=X]
188359 b.b._en_X_t[0] : 1 [by b.b.en_buf_t.buf2._y:=0]
214861 b.b.dly._a[1] : 0 [by b.b.dly.mu2[0]._y:=1]
215118 b.b.dly.and2[1]._y : 1 [by b.b.dly._a[1]:=0]
215205 b.b.dly.dly[1].a : 0 [by b.b.dly.and2[1]._y:=1]
215499 b.b.dly.dly[1]._y : 1 [by b.b.dly.dly[1].a:=0]
215500 b.b.dly.dly[1].__y : 0 [by b.b.dly.dly[1]._y:=1]
217306 b.b.dly.dly[1].___y : 1 [by b.b.dly.dly[1].__y:=0]
219313 b.b.dly.dly[1].y : 0 [by b.b.dly.dly[1].___y:=1]
220522 b.b.dly.dly[2]._y : 1 [by b.b.dly.dly[1].y:=0]
221112 b.b.dly.dly[2].__y : 0 [by b.b.dly.dly[2]._y:=1]
221290 b.b.dly.dly[2].___y : 1 [by b.b.dly.dly[2].__y:=0]
222093 b.b.dly.dly[2].y : 0 [by b.b.dly.dly[2].___y:=1]
222257 b.b.dly.mu2[1]._y : 1 [by b.b.dly.dly[2].y:=0]
224452 b.b.dly._a[2] : 0 [by b.b.dly.mu2[1]._y:=1]
224474 b.b.dly.and2[2]._y : 1 [by b.b.dly._a[2]:=0]
225321 b.b.dly.dly[3].a : 0 [by b.b.dly.and2[2]._y:=1]
255449 b.b.dly.dly[3]._y : 1 [by b.b.dly.dly[3].a:=0]
255582 b.b.dly.dly[3].__y : 0 [by b.b.dly.dly[3]._y:=1]
271244 b.b.dly.dly[3].___y : 1 [by b.b.dly.dly[3].__y:=0]
271603 b.b.dly.dly[3].y : 0 [by b.b.dly.dly[3].___y:=1]
285719 b.b.dly.dly[4]._y : 1 [by b.b.dly.dly[3].y:=0]
285940 b.b.dly.dly[4].__y : 0 [by b.b.dly.dly[4]._y:=1]
285947 b.b.dly.dly[4].___y : 1 [by b.b.dly.dly[4].__y:=0]
285977 b.b.dly.dly[4].y : 0 [by b.b.dly.dly[4].___y:=1]
292690 b.b.dly.dly[5]._y : 1 [by b.b.dly.dly[4].y:=0]
350151 b.b.dly.dly[5].__y : 0 [by b.b.dly.dly[5]._y:=1]
350242 b.b.dly.dly[5].___y : 1 [by b.b.dly.dly[5].__y:=0]
352431 b.b.dly.dly[5].y : 0 [by b.b.dly.dly[5].___y:=1]
352438 b.b.dly.dly[6]._y : 1 [by b.b.dly.dly[5].y:=0]
355225 b.b.dly.dly[6].__y : 0 [by b.b.dly.dly[6]._y:=1]
355331 b.b.dly.dly[6].___y : 1 [by b.b.dly.dly[6].__y:=0]
355409 b.b.dly.dly[6].y : 0 [by b.b.dly.dly[6].___y:=1]
355684 b.b.dly.mu2[2]._y : 1 [by b.b.dly.dly[6].y:=0]
374680 b.b.dly._a[3] : 0 [by b.b.dly.mu2[2]._y:=1]
375135 b.b.dly.and2[3]._y : 1 [by b.b.dly._a[3]:=0]
375147 b.b.dly.dly[7].a : 0 [by b.b.dly.and2[3]._y:=1]
375551 b.b.dly.dly[7]._y : 1 [by b.b.dly.dly[7].a:=0]
375563 b.b.dly.dly[7].__y : 0 [by b.b.dly.dly[7]._y:=1]
381479 b.b.dly.dly[7].___y : 1 [by b.b.dly.dly[7].__y:=0]
385755 b.b.dly.dly[7].y : 0 [by b.b.dly.dly[7].___y:=1]
388654 b.b.dly.dly[8]._y : 1 [by b.b.dly.dly[7].y:=0]
392949 b.b.dly.dly[8].__y : 0 [by b.b.dly.dly[8]._y:=1]
392951 b.b.dly.dly[8].___y : 1 [by b.b.dly.dly[8].__y:=0]
397486 b.b.dly.dly[8].y : 0 [by b.b.dly.dly[8].___y:=1]
398735 b.b.dly.dly[9]._y : 1 [by b.b.dly.dly[8].y:=0]
402234 b.b.dly.dly[9].__y : 0 [by b.b.dly.dly[9]._y:=1]
402400 b.b.dly.dly[9].___y : 1 [by b.b.dly.dly[9].__y:=0]
402475 b.b.dly.dly[9].y : 0 [by b.b.dly.dly[9].___y:=1]
402820 b.b.dly.dly[10]._y : 1 [by b.b.dly.dly[9].y:=0]
402958 b.b.dly.dly[10].__y : 0 [by b.b.dly.dly[10]._y:=1]
408221 b.b.dly.dly[10].___y : 1 [by b.b.dly.dly[10].__y:=0]
408223 b.b.dly.dly[10].y : 0 [by b.b.dly.dly[10].___y:=1]
452140 b.b.dly.dly[11]._y : 1 [by b.b.dly.dly[10].y:=0]
452141 b.b.dly.dly[11].__y : 0 [by b.b.dly.dly[11]._y:=1]
452689 b.b.dly.dly[11].___y : 1 [by b.b.dly.dly[11].__y:=0]
452700 b.b.dly.dly[11].y : 0 [by b.b.dly.dly[11].___y:=1]
453070 b.b.dly.dly[12]._y : 1 [by b.b.dly.dly[11].y:=0]
453137 b.b.dly.dly[12].__y : 0 [by b.b.dly.dly[12]._y:=1]
455778 b.b.dly.dly[12].___y : 1 [by b.b.dly.dly[12].__y:=0]
455794 b.b.dly.dly[12].y : 0 [by b.b.dly.dly[12].___y:=1]
460356 b.b.dly.dly[13]._y : 1 [by b.b.dly.dly[12].y:=0]
460884 b.b.dly.dly[13].__y : 0 [by b.b.dly.dly[13]._y:=1]
463319 b.b.dly.dly[13].___y : 1 [by b.b.dly.dly[13].__y:=0]
490199 b.b.dly.dly[13].y : 0 [by b.b.dly.dly[13].___y:=1]
514124 b.b.dly.dly[14]._y : 1 [by b.b.dly.dly[13].y:=0]
527165 b.b.dly.dly[14].__y : 0 [by b.b.dly.dly[14]._y:=1]
527167 b.b.dly.dly[14].___y : 1 [by b.b.dly.dly[14].__y:=0]
588125 b.b.dly.mu2[3].b : 0 [by b.b.dly.dly[14].___y:=1]
588128 b.b.dly.mu2[3]._y : 1 [by b.b.dly.mu2[3].b:=0]
588157 b.b._req : 0 [by b.b.dly.mu2[3]._y:=1]
588474 b.b.req_buf._y : 1 [by b.b._req:=0]
590075 b.b._reqX : 0 [by b.b.req_buf._y:=1]
590228 b.b.req_bufarray.buf2._y : 1 [by b.b._reqX:=0]
590272 b.b._reqXX[0] : 0 [by b.b.req_bufarray.buf2._y:=1]
[] set Reset 1
590272 Reset : 1
593033 b._reset_B : 0 [by Reset:=1]
606716 b.b.reset_buf._y : 1 [by b._reset_B:=0]
606717 b.b._reset_BX : 0 [by b.b.reset_buf._y:=1]
606934 b.b.reset_bufarray.buf2._y : 1 [by b.b._reset_BX:=0]
606956 b.b._reset_BXX[0] : 0 [by b.b.reset_bufarray.buf2._y:=1]
606957 b.b.f_buf_func[1]._y : 1 [by b.b._reset_BXX[0]:=0]
607115 b.b.t_buf_func[0]._y : 1 [by b.b._reset_BXX[0]:=0]
608244 b.b.f_buf_func[1].y : 0 [by b.b.f_buf_func[1]._y:=1]
608537 b.b.f_buf_func[2]._y : 1 [by b.b._reset_BXX[0]:=0]
608682 b.b.f_buf_func[2].y : 0 [by b.b.f_buf_func[2]._y:=1]
609347 b.b.t_buf_func[0].y : 0 [by b.b.t_buf_func[0]._y:=1]
616301 b.b.f_buf_func[4]._y : 1 [by b.b._reset_BXX[0]:=0]
619133 b.b.f_buf_func[4].y : 0 [by b.b.f_buf_func[4]._y:=1]
626632 b.b.t_buf_func[3]._y : 1 [by b.b._reset_BXX[0]:=0]
632986 b.b.t_buf_func[3].y : 0 [by b.b.t_buf_func[3]._y:=1]
[] set Reset 0
632986 Reset : 0
632987 b._reset_B : 1 [by Reset:=0]
672271 b.b.reset_buf._y : 0 [by b._reset_B:=1]
672433 b.b._reset_BX : 1 [by b.b.reset_buf._y:=0]
679802 b.b.reset_bufarray.buf2._y : 0 [by b.b._reset_BX:=1]
679816 b.b._reset_BXX[0] : 1 [by b.b.reset_bufarray.buf2._y:=0]
[] Reset finished, setting data
679816 b.in.d[0] : 0
679816 b.in.d[4] : 1
679816 b.in.d[2] : 1
679816 b.in.d[1] : 1
679816 b.in.d[3] : 0
679817 b.b._inB[1] : 0 [by b.in.d[1]:=1]
679817 b.b._inB[3] : 1 [by b.in.d[3]:=0]
679823 b.b._inB[0] : 1 [by b.in.d[0]:=0]
679976 b.b._inB[4] : 0 [by b.in.d[4]:=1]
701373 b.b._inB[2] : 0 [by b.in.d[2]:=1]
[] Reset finished, setting req 1
701373 b.in.r : 1
701374 b.b.dly.and2[0]._y : 0 [by b.in.r:=1]
703617 b.b.dly.dly[0].a : 1 [by b.b.dly.and2[0]._y:=0]
703804 b.b.dly.dly[0]._y : 0 [by b.b.dly.dly[0].a:=1]
703805 b.b.dly.dly[0].__y : 1 [by b.b.dly.dly[0]._y:=0]
707987 b.b.dly.dly[0].___y : 0 [by b.b.dly.dly[0].__y:=1]
742769 b.b.dly.dly[0].y : 1 [by b.b.dly.dly[0].___y:=0]
742770 b.b.dly.mu2[0]._y : 0 [by b.b.dly.dly[0].y:=1]
743623 b.b.dly._a[1] : 1 [by b.b.dly.mu2[0]._y:=0]
743628 b.b.dly.and2[1]._y : 0 [by b.b.dly._a[1]:=1]
744519 b.b.dly.dly[1].a : 1 [by b.b.dly.and2[1]._y:=0]
744520 b.b.dly.dly[1]._y : 0 [by b.b.dly.dly[1].a:=1]
744537 b.b.dly.dly[1].__y : 1 [by b.b.dly.dly[1]._y:=0]
747110 b.b.dly.dly[1].___y : 0 [by b.b.dly.dly[1].__y:=1]
755471 b.b.dly.dly[1].y : 1 [by b.b.dly.dly[1].___y:=0]
755474 b.b.dly.dly[2]._y : 0 [by b.b.dly.dly[1].y:=1]
756415 b.b.dly.dly[2].__y : 1 [by b.b.dly.dly[2]._y:=0]
815377 b.b.dly.dly[2].___y : 0 [by b.b.dly.dly[2].__y:=1]
815378 b.b.dly.dly[2].y : 1 [by b.b.dly.dly[2].___y:=0]
815420 b.b.dly.mu2[1]._y : 0 [by b.b.dly.dly[2].y:=1]
818237 b.b.dly._a[2] : 1 [by b.b.dly.mu2[1]._y:=0]
831970 b.b.dly.and2[2]._y : 0 [by b.b.dly._a[2]:=1]
832065 b.b.dly.dly[3].a : 1 [by b.b.dly.and2[2]._y:=0]
832400 b.b.dly.dly[3]._y : 0 [by b.b.dly.dly[3].a:=1]
832408 b.b.dly.dly[3].__y : 1 [by b.b.dly.dly[3]._y:=0]
832442 b.b.dly.dly[3].___y : 0 [by b.b.dly.dly[3].__y:=1]
846329 b.b.dly.dly[3].y : 1 [by b.b.dly.dly[3].___y:=0]
847247 b.b.dly.dly[4]._y : 0 [by b.b.dly.dly[3].y:=1]
847251 b.b.dly.dly[4].__y : 1 [by b.b.dly.dly[4]._y:=0]
893629 b.b.dly.dly[4].___y : 0 [by b.b.dly.dly[4].__y:=1]
896027 b.b.dly.dly[4].y : 1 [by b.b.dly.dly[4].___y:=0]
899242 b.b.dly.dly[5]._y : 0 [by b.b.dly.dly[4].y:=1]
946361 b.b.dly.dly[5].__y : 1 [by b.b.dly.dly[5]._y:=0]
946409 b.b.dly.dly[5].___y : 0 [by b.b.dly.dly[5].__y:=1]
946412 b.b.dly.dly[5].y : 1 [by b.b.dly.dly[5].___y:=0]
946590 b.b.dly.dly[6]._y : 0 [by b.b.dly.dly[5].y:=1]
967567 b.b.dly.dly[6].__y : 1 [by b.b.dly.dly[6]._y:=0]
979466 b.b.dly.dly[6].___y : 0 [by b.b.dly.dly[6].__y:=1]
985417 b.b.dly.dly[6].y : 1 [by b.b.dly.dly[6].___y:=0]
1024902 b.b.dly.mu2[2]._y : 0 [by b.b.dly.dly[6].y:=1]
1025729 b.b.dly._a[3] : 1 [by b.b.dly.mu2[2]._y:=0]
1025902 b.b.dly.and2[3]._y : 0 [by b.b.dly._a[3]:=1]
1026086 b.b.dly.dly[7].a : 1 [by b.b.dly.and2[3]._y:=0]
1026087 b.b.dly.dly[7]._y : 0 [by b.b.dly.dly[7].a:=1]
1026160 b.b.dly.dly[7].__y : 1 [by b.b.dly.dly[7]._y:=0]
1026164 b.b.dly.dly[7].___y : 0 [by b.b.dly.dly[7].__y:=1]
1063452 b.b.dly.dly[7].y : 1 [by b.b.dly.dly[7].___y:=0]
1063548 b.b.dly.dly[8]._y : 0 [by b.b.dly.dly[7].y:=1]
1063684 b.b.dly.dly[8].__y : 1 [by b.b.dly.dly[8]._y:=0]
1063685 b.b.dly.dly[8].___y : 0 [by b.b.dly.dly[8].__y:=1]
1082731 b.b.dly.dly[8].y : 1 [by b.b.dly.dly[8].___y:=0]
1082972 b.b.dly.dly[9]._y : 0 [by b.b.dly.dly[8].y:=1]
1086931 b.b.dly.dly[9].__y : 1 [by b.b.dly.dly[9]._y:=0]
1086943 b.b.dly.dly[9].___y : 0 [by b.b.dly.dly[9].__y:=1]
1090843 b.b.dly.dly[9].y : 1 [by b.b.dly.dly[9].___y:=0]
1091872 b.b.dly.dly[10]._y : 0 [by b.b.dly.dly[9].y:=1]
1091873 b.b.dly.dly[10].__y : 1 [by b.b.dly.dly[10]._y:=0]
1091929 b.b.dly.dly[10].___y : 0 [by b.b.dly.dly[10].__y:=1]
1136935 b.b.dly.dly[10].y : 1 [by b.b.dly.dly[10].___y:=0]
1136936 b.b.dly.dly[11]._y : 0 [by b.b.dly.dly[10].y:=1]
1136973 b.b.dly.dly[11].__y : 1 [by b.b.dly.dly[11]._y:=0]
1160348 b.b.dly.dly[11].___y : 0 [by b.b.dly.dly[11].__y:=1]
1160349 b.b.dly.dly[11].y : 1 [by b.b.dly.dly[11].___y:=0]
1163913 b.b.dly.dly[12]._y : 0 [by b.b.dly.dly[11].y:=1]
1165605 b.b.dly.dly[12].__y : 1 [by b.b.dly.dly[12]._y:=0]
1165618 b.b.dly.dly[12].___y : 0 [by b.b.dly.dly[12].__y:=1]
1182602 b.b.dly.dly[12].y : 1 [by b.b.dly.dly[12].___y:=0]
1182959 b.b.dly.dly[13]._y : 0 [by b.b.dly.dly[12].y:=1]
1182984 b.b.dly.dly[13].__y : 1 [by b.b.dly.dly[13]._y:=0]
1183005 b.b.dly.dly[13].___y : 0 [by b.b.dly.dly[13].__y:=1]
1183006 b.b.dly.dly[13].y : 1 [by b.b.dly.dly[13].___y:=0]
1192654 b.b.dly.dly[14]._y : 0 [by b.b.dly.dly[13].y:=1]
1192655 b.b.dly.dly[14].__y : 1 [by b.b.dly.dly[14]._y:=0]
1192656 b.b.dly.dly[14].___y : 0 [by b.b.dly.dly[14].__y:=1]
1192817 b.b.dly.mu2[3].b : 1 [by b.b.dly.dly[14].___y:=0]
1193854 b.b.dly.mu2[3]._y : 0 [by b.b.dly.mu2[3].b:=1]
1193859 b.b._req : 1 [by b.b.dly.mu2[3]._y:=0]
1194440 b.b.req_buf._y : 0 [by b.b._req:=1]
1194848 b.b._reqX : 1 [by b.b.req_buf._y:=0]
1194859 b.b.req_bufarray.buf2._y : 0 [by b.b._reqX:=1]
1195906 b.b._reqXX[0] : 1 [by b.b.req_bufarray.buf2._y:=0]
1195910 b.b.t_buf_func[1]._y : 0 [by b.b._reqXX[0]:=1]
1195920 b.b.f_buf_func[0]._y : 0 [by b.b._reqXX[0]:=1]
1195924 b.b.f_buf_func[3]._y : 0 [by b.b._reqXX[0]:=1]
1196010 b.b.t_buf_func[2]._y : 0 [by b.b._reqXX[0]:=1]
1196152 b.b.f_buf_func[3].y : 1 [by b.b.f_buf_func[3]._y:=0]
1196853 b.b.t_buf_func[2].y : 1 [by b.b.t_buf_func[2]._y:=0]
1197114 b.b.t_buf_func[1].y : 1 [by b.b.t_buf_func[1]._y:=0]
1204375 b.b.f_buf_func[0].y : 1 [by b.b.f_buf_func[0]._y:=0]
1227350 b.b.t_buf_func[4]._y : 0 [by b.b._reqXX[0]:=1]
1228809 b.b.t_buf_func[4].y : 1 [by b.b.t_buf_func[4]._y:=0]
[] Receiving val out
1228809 b.out.v : 1
1228879 b.b.inack_ctl._y : 0 [by b.out.v:=1]
1279301 b.in.a : 1 [by b.b.inack_ctl._y:=0]
1279312 b.b._en : 0 [by b.in.a:=1]
1279315 b.b.en_buf_f.buf2._y : 1 [by b.b._en:=0]
1279366 b.b.en_buf_t.buf2._y : 1 [by b.b._en:=0]
1280463 b.b._en_X_f[0] : 0 [by b.b.en_buf_f.buf2._y:=1]
1280527 b.b._en_X_t[0] : 0 [by b.b.en_buf_t.buf2._y:=1]
[] Changing some input data
1280527 b.in.d[0] : 1
1289179 b.b._inB[0] : 0 [by b.in.d[0]:=1]
[] Removing req
[] Changing more data
1289179 b.in.r : 0
1289179 b.in.d[4] : 0
1289260 b.b.dly.and2[0]._y : 1 [by b.in.r:=0]
1300256 b.b._inB[4] : 1 [by b.in.d[4]:=0]
1307243 b.b.dly.dly[0].a : 0 [by b.b.dly.and2[0]._y:=1]
1307335 b.b.dly.dly[0]._y : 1 [by b.b.dly.dly[0].a:=0]
1315646 b.b.dly.dly[0].__y : 0 [by b.b.dly.dly[0]._y:=1]
1317390 b.b.dly.dly[0].___y : 1 [by b.b.dly.dly[0].__y:=0]
1318003 b.b.dly.dly[0].y : 0 [by b.b.dly.dly[0].___y:=1]
1332025 b.b.dly.mu2[0]._y : 1 [by b.b.dly.dly[0].y:=0]
1332070 b.b.dly._a[1] : 0 [by b.b.dly.mu2[0]._y:=1]
1333067 b.b.dly.and2[1]._y : 1 [by b.b.dly._a[1]:=0]
1334716 b.b.dly.dly[1].a : 0 [by b.b.dly.and2[1]._y:=1]
1335241 b.b.dly.dly[1]._y : 1 [by b.b.dly.dly[1].a:=0]
1336141 b.b.dly.dly[1].__y : 0 [by b.b.dly.dly[1]._y:=1]
1336193 b.b.dly.dly[1].___y : 1 [by b.b.dly.dly[1].__y:=0]
1336200 b.b.dly.dly[1].y : 0 [by b.b.dly.dly[1].___y:=1]
1351812 b.b.dly.dly[2]._y : 1 [by b.b.dly.dly[1].y:=0]
1358279 b.b.dly.dly[2].__y : 0 [by b.b.dly.dly[2]._y:=1]
1358281 b.b.dly.dly[2].___y : 1 [by b.b.dly.dly[2].__y:=0]
1358635 b.b.dly.dly[2].y : 0 [by b.b.dly.dly[2].___y:=1]
1358768 b.b.dly.mu2[1]._y : 1 [by b.b.dly.dly[2].y:=0]
1358769 b.b.dly._a[2] : 0 [by b.b.dly.mu2[1]._y:=1]
1358773 b.b.dly.and2[2]._y : 1 [by b.b.dly._a[2]:=0]
1359319 b.b.dly.dly[3].a : 0 [by b.b.dly.and2[2]._y:=1]
1404882 b.b.dly.dly[3]._y : 1 [by b.b.dly.dly[3].a:=0]
1404883 b.b.dly.dly[3].__y : 0 [by b.b.dly.dly[3]._y:=1]
1417261 b.b.dly.dly[3].___y : 1 [by b.b.dly.dly[3].__y:=0]
1417340 b.b.dly.dly[3].y : 0 [by b.b.dly.dly[3].___y:=1]
1419773 b.b.dly.dly[4]._y : 1 [by b.b.dly.dly[3].y:=0]
1419861 b.b.dly.dly[4].__y : 0 [by b.b.dly.dly[4]._y:=1]
1427643 b.b.dly.dly[4].___y : 1 [by b.b.dly.dly[4].__y:=0]
1455970 b.b.dly.dly[4].y : 0 [by b.b.dly.dly[4].___y:=1]
1456029 b.b.dly.dly[5]._y : 1 [by b.b.dly.dly[4].y:=0]
1456059 b.b.dly.dly[5].__y : 0 [by b.b.dly.dly[5]._y:=1]
1457526 b.b.dly.dly[5].___y : 1 [by b.b.dly.dly[5].__y:=0]
1517030 b.b.dly.dly[5].y : 0 [by b.b.dly.dly[5].___y:=1]
1536414 b.b.dly.dly[6]._y : 1 [by b.b.dly.dly[5].y:=0]
1537099 b.b.dly.dly[6].__y : 0 [by b.b.dly.dly[6]._y:=1]
1553814 b.b.dly.dly[6].___y : 1 [by b.b.dly.dly[6].__y:=0]
1553941 b.b.dly.dly[6].y : 0 [by b.b.dly.dly[6].___y:=1]
1554110 b.b.dly.mu2[2]._y : 1 [by b.b.dly.dly[6].y:=0]
1554153 b.b.dly._a[3] : 0 [by b.b.dly.mu2[2]._y:=1]
1554165 b.b.dly.and2[3]._y : 1 [by b.b.dly._a[3]:=0]
1555444 b.b.dly.dly[7].a : 0 [by b.b.dly.and2[3]._y:=1]
1555677 b.b.dly.dly[7]._y : 1 [by b.b.dly.dly[7].a:=0]
1555680 b.b.dly.dly[7].__y : 0 [by b.b.dly.dly[7]._y:=1]
1555718 b.b.dly.dly[7].___y : 1 [by b.b.dly.dly[7].__y:=0]
1555719 b.b.dly.dly[7].y : 0 [by b.b.dly.dly[7].___y:=1]
1568471 b.b.dly.dly[8]._y : 1 [by b.b.dly.dly[7].y:=0]
1568563 b.b.dly.dly[8].__y : 0 [by b.b.dly.dly[8]._y:=1]
1571290 b.b.dly.dly[8].___y : 1 [by b.b.dly.dly[8].__y:=0]
1571292 b.b.dly.dly[8].y : 0 [by b.b.dly.dly[8].___y:=1]
1571293 b.b.dly.dly[9]._y : 1 [by b.b.dly.dly[8].y:=0]
1572794 b.b.dly.dly[9].__y : 0 [by b.b.dly.dly[9]._y:=1]
1572796 b.b.dly.dly[9].___y : 1 [by b.b.dly.dly[9].__y:=0]
1572814 b.b.dly.dly[9].y : 0 [by b.b.dly.dly[9].___y:=1]
1572933 b.b.dly.dly[10]._y : 1 [by b.b.dly.dly[9].y:=0]
1578653 b.b.dly.dly[10].__y : 0 [by b.b.dly.dly[10]._y:=1]
1578661 b.b.dly.dly[10].___y : 1 [by b.b.dly.dly[10].__y:=0]
1578715 b.b.dly.dly[10].y : 0 [by b.b.dly.dly[10].___y:=1]
1629253 b.b.dly.dly[11]._y : 1 [by b.b.dly.dly[10].y:=0]
1629258 b.b.dly.dly[11].__y : 0 [by b.b.dly.dly[11]._y:=1]
1630325 b.b.dly.dly[11].___y : 1 [by b.b.dly.dly[11].__y:=0]
1630326 b.b.dly.dly[11].y : 0 [by b.b.dly.dly[11].___y:=1]
1630464 b.b.dly.dly[12]._y : 1 [by b.b.dly.dly[11].y:=0]
1630465 b.b.dly.dly[12].__y : 0 [by b.b.dly.dly[12]._y:=1]
1630529 b.b.dly.dly[12].___y : 1 [by b.b.dly.dly[12].__y:=0]
1630652 b.b.dly.dly[12].y : 0 [by b.b.dly.dly[12].___y:=1]
1630654 b.b.dly.dly[13]._y : 1 [by b.b.dly.dly[12].y:=0]
1630691 b.b.dly.dly[13].__y : 0 [by b.b.dly.dly[13]._y:=1]
1630834 b.b.dly.dly[13].___y : 1 [by b.b.dly.dly[13].__y:=0]
1630885 b.b.dly.dly[13].y : 0 [by b.b.dly.dly[13].___y:=1]
1631327 b.b.dly.dly[14]._y : 1 [by b.b.dly.dly[13].y:=0]
1631338 b.b.dly.dly[14].__y : 0 [by b.b.dly.dly[14]._y:=1]
1631339 b.b.dly.dly[14].___y : 1 [by b.b.dly.dly[14].__y:=0]
1631348 b.b.dly.mu2[3].b : 0 [by b.b.dly.dly[14].___y:=1]
1631373 b.b.dly.mu2[3]._y : 1 [by b.b.dly.mu2[3].b:=0]
1641626 b.b._req : 0 [by b.b.dly.mu2[3]._y:=1]
1645147 b.b.req_buf._y : 1 [by b.b._req:=0]
1645292 b.b._reqX : 0 [by b.b.req_buf._y:=1]
1661460 b.b.req_bufarray.buf2._y : 1 [by b.b._reqX:=0]
1661690 b.b._reqXX[0] : 0 [by b.b.req_bufarray.buf2._y:=1]
[] Receiving ack out
1661690 b.out.a : 1
1662381 b.b._out_a_B : 0 [by b.out.a:=1]
1662395 b.b.out_a_B_buf_t.buf2._y : 1 [by b.b._out_a_B:=0]
1663924 b.b.out_a_B_buf_f.buf2._y : 1 [by b.b._out_a_B:=0]
1664006 b.b._out_a_BX_f[0] : 0 [by b.b.out_a_B_buf_t.buf2._y:=1]
1664007 b.b.f_buf_func[3]._y : 1 [by b.b._out_a_BX_f[0]:=0]
1664008 b.b.f_buf_func[3].y : 0 [by b.b.f_buf_func[3]._y:=1]
1664017 b.b.f_buf_func[0]._y : 1 [by b.b._out_a_BX_f[0]:=0]
1670518 b.b.f_buf_func[0].y : 0 [by b.b.f_buf_func[0]._y:=1]
1681436 b.b._out_a_BX_t[0] : 0 [by b.b.out_a_B_buf_f.buf2._y:=1]
1681568 b.b.t_buf_func[4]._y : 1 [by b.b._out_a_BX_t[0]:=0]
1681569 b.b.t_buf_func[4].y : 0 [by b.b.t_buf_func[4]._y:=1]
1682075 b.b.t_buf_func[1]._y : 1 [by b.b._out_a_BX_t[0]:=0]
1682092 b.b.t_buf_func[1].y : 0 [by b.b.t_buf_func[1]._y:=1]
1683229 b.b.t_buf_func[2]._y : 1 [by b.b._out_a_BX_t[0]:=0]
1683381 b.b.t_buf_func[2].y : 0 [by b.b.t_buf_func[2]._y:=1]
1683381 b.out.v : 0
1686364 b.b.inack_ctl._y : 1 [by b.out.v:=0]
1686367 b.in.a : 0 [by b.b.inack_ctl._y:=1]
1686791 b.b._en : 1 [by b.in.a:=0]
1686797 b.b.en_buf_f.buf2._y : 0 [by b.b._en:=1]
1689258 b.b._en_X_f[0] : 1 [by b.b.en_buf_f.buf2._y:=0]
1689379 b.b.en_buf_t.buf2._y : 0 [by b.b._en:=1]
1690209 b.b._en_X_t[0] : 1 [by b.b.en_buf_t.buf2._y:=0]
[] Set ack out 0
1690209 b.out.a : 0
1713141 b.b._out_a_B : 1 [by b.out.a:=0]
1713143 b.b.out_a_B_buf_t.buf2._y : 0 [by b.b._out_a_B:=1]
1713335 b.b.out_a_B_buf_f.buf2._y : 0 [by b.b._out_a_B:=1]
1713473 b.b._out_a_BX_t[0] : 1 [by b.b.out_a_B_buf_f.buf2._y:=0]
1713746 b.b._out_a_BX_f[0] : 1 [by b.b.out_a_B_buf_t.buf2._y:=0]
[] Again!!! setting data
1713746 b.in.d[0] : 0
1713746 b.in.d[2] : 0
1713746 b.in.d[1] : 0
1713763 b.b._inB[2] : 1 [by b.in.d[2]:=0]
1713763 b.b._inB[0] : 1 [by b.in.d[0]:=0]
1714172 b.b._inB[1] : 1 [by b.in.d[1]:=0]
[] Again!!! setting req 1
1714172 b.in.r : 1
1714173 b.b.dly.and2[0]._y : 0 [by b.in.r:=1]
1714174 b.b.dly.dly[0].a : 1 [by b.b.dly.and2[0]._y:=0]
1715200 b.b.dly.dly[0]._y : 0 [by b.b.dly.dly[0].a:=1]
1715201 b.b.dly.dly[0].__y : 1 [by b.b.dly.dly[0]._y:=0]
1715220 b.b.dly.dly[0].___y : 0 [by b.b.dly.dly[0].__y:=1]
1715388 b.b.dly.dly[0].y : 1 [by b.b.dly.dly[0].___y:=0]
1715927 b.b.dly.mu2[0]._y : 0 [by b.b.dly.dly[0].y:=1]
1716088 b.b.dly._a[1] : 1 [by b.b.dly.mu2[0]._y:=0]
1716261 b.b.dly.and2[1]._y : 0 [by b.b.dly._a[1]:=1]
1718808 b.b.dly.dly[1].a : 1 [by b.b.dly.and2[1]._y:=0]
1733869 b.b.dly.dly[1]._y : 0 [by b.b.dly.dly[1].a:=1]
1733870 b.b.dly.dly[1].__y : 1 [by b.b.dly.dly[1]._y:=0]
1733871 b.b.dly.dly[1].___y : 0 [by b.b.dly.dly[1].__y:=1]
1734261 b.b.dly.dly[1].y : 1 [by b.b.dly.dly[1].___y:=0]
1734468 b.b.dly.dly[2]._y : 0 [by b.b.dly.dly[1].y:=1]
1735301 b.b.dly.dly[2].__y : 1 [by b.b.dly.dly[2]._y:=0]
1735329 b.b.dly.dly[2].___y : 0 [by b.b.dly.dly[2].__y:=1]
1735336 b.b.dly.dly[2].y : 1 [by b.b.dly.dly[2].___y:=0]
1735750 b.b.dly.mu2[1]._y : 0 [by b.b.dly.dly[2].y:=1]
1735754 b.b.dly._a[2] : 1 [by b.b.dly.mu2[1]._y:=0]
1737533 b.b.dly.and2[2]._y : 0 [by b.b.dly._a[2]:=1]
1760407 b.b.dly.dly[3].a : 1 [by b.b.dly.and2[2]._y:=0]
1760573 b.b.dly.dly[3]._y : 0 [by b.b.dly.dly[3].a:=1]
1800443 b.b.dly.dly[3].__y : 1 [by b.b.dly.dly[3]._y:=0]
1809088 b.b.dly.dly[3].___y : 0 [by b.b.dly.dly[3].__y:=1]
1810021 b.b.dly.dly[3].y : 1 [by b.b.dly.dly[3].___y:=0]
1810877 b.b.dly.dly[4]._y : 0 [by b.b.dly.dly[3].y:=1]
1811016 b.b.dly.dly[4].__y : 1 [by b.b.dly.dly[4]._y:=0]
1837225 b.b.dly.dly[4].___y : 0 [by b.b.dly.dly[4].__y:=1]
1837420 b.b.dly.dly[4].y : 1 [by b.b.dly.dly[4].___y:=0]
1837422 b.b.dly.dly[5]._y : 0 [by b.b.dly.dly[4].y:=1]
1890871 b.b.dly.dly[5].__y : 1 [by b.b.dly.dly[5]._y:=0]
1890877 b.b.dly.dly[5].___y : 0 [by b.b.dly.dly[5].__y:=1]
1891131 b.b.dly.dly[5].y : 1 [by b.b.dly.dly[5].___y:=0]
1891139 b.b.dly.dly[6]._y : 0 [by b.b.dly.dly[5].y:=1]
1891140 b.b.dly.dly[6].__y : 1 [by b.b.dly.dly[6]._y:=0]
1891146 b.b.dly.dly[6].___y : 0 [by b.b.dly.dly[6].__y:=1]
1942182 b.b.dly.dly[6].y : 1 [by b.b.dly.dly[6].___y:=0]
1945272 b.b.dly.mu2[2]._y : 0 [by b.b.dly.dly[6].y:=1]
1945498 b.b.dly._a[3] : 1 [by b.b.dly.mu2[2]._y:=0]
1946317 b.b.dly.and2[3]._y : 0 [by b.b.dly._a[3]:=1]
1946318 b.b.dly.dly[7].a : 1 [by b.b.dly.and2[3]._y:=0]
1946324 b.b.dly.dly[7]._y : 0 [by b.b.dly.dly[7].a:=1]
1946326 b.b.dly.dly[7].__y : 1 [by b.b.dly.dly[7]._y:=0]
1949888 b.b.dly.dly[7].___y : 0 [by b.b.dly.dly[7].__y:=1]
1949903 b.b.dly.dly[7].y : 1 [by b.b.dly.dly[7].___y:=0]
1970704 b.b.dly.dly[8]._y : 0 [by b.b.dly.dly[7].y:=1]
1970811 b.b.dly.dly[8].__y : 1 [by b.b.dly.dly[8]._y:=0]
1970904 b.b.dly.dly[8].___y : 0 [by b.b.dly.dly[8].__y:=1]
1972556 b.b.dly.dly[8].y : 1 [by b.b.dly.dly[8].___y:=0]
1976495 b.b.dly.dly[9]._y : 0 [by b.b.dly.dly[8].y:=1]
1977253 b.b.dly.dly[9].__y : 1 [by b.b.dly.dly[9]._y:=0]
1979876 b.b.dly.dly[9].___y : 0 [by b.b.dly.dly[9].__y:=1]
1980592 b.b.dly.dly[9].y : 1 [by b.b.dly.dly[9].___y:=0]
1980593 b.b.dly.dly[10]._y : 0 [by b.b.dly.dly[9].y:=1]
1982333 b.b.dly.dly[10].__y : 1 [by b.b.dly.dly[10]._y:=0]
1982334 b.b.dly.dly[10].___y : 0 [by b.b.dly.dly[10].__y:=1]
1994486 b.b.dly.dly[10].y : 1 [by b.b.dly.dly[10].___y:=0]
2022685 b.b.dly.dly[11]._y : 0 [by b.b.dly.dly[10].y:=1]
2022686 b.b.dly.dly[11].__y : 1 [by b.b.dly.dly[11]._y:=0]
2022692 b.b.dly.dly[11].___y : 0 [by b.b.dly.dly[11].__y:=1]
2022693 b.b.dly.dly[11].y : 1 [by b.b.dly.dly[11].___y:=0]
2062182 b.b.dly.dly[12]._y : 0 [by b.b.dly.dly[11].y:=1]
2083781 b.b.dly.dly[12].__y : 1 [by b.b.dly.dly[12]._y:=0]
2083803 b.b.dly.dly[12].___y : 0 [by b.b.dly.dly[12].__y:=1]
2106311 b.b.dly.dly[12].y : 1 [by b.b.dly.dly[12].___y:=0]
2106318 b.b.dly.dly[13]._y : 0 [by b.b.dly.dly[12].y:=1]
2106383 b.b.dly.dly[13].__y : 1 [by b.b.dly.dly[13]._y:=0]
2106396 b.b.dly.dly[13].___y : 0 [by b.b.dly.dly[13].__y:=1]
2107520 b.b.dly.dly[13].y : 1 [by b.b.dly.dly[13].___y:=0]
2107624 b.b.dly.dly[14]._y : 0 [by b.b.dly.dly[13].y:=1]
2107665 b.b.dly.dly[14].__y : 1 [by b.b.dly.dly[14]._y:=0]
2107666 b.b.dly.dly[14].___y : 0 [by b.b.dly.dly[14].__y:=1]
2107667 b.b.dly.mu2[3].b : 1 [by b.b.dly.dly[14].___y:=0]
2172045 b.b.dly.mu2[3]._y : 0 [by b.b.dly.mu2[3].b:=1]
2185217 b.b._req : 1 [by b.b.dly.mu2[3]._y:=0]
2185218 b.b.req_buf._y : 0 [by b.b._req:=1]
2205043 b.b._reqX : 1 [by b.b.req_buf._y:=0]
2208179 b.b.req_bufarray.buf2._y : 0 [by b.b._reqX:=1]
2209005 b.b._reqXX[0] : 1 [by b.b.req_bufarray.buf2._y:=0]
2209063 b.b.f_buf_func[2]._y : 0 [by b.b._reqXX[0]:=1]
2210838 b.b.f_buf_func[0]._y : 0 [by b.b._reqXX[0]:=1]
2210852 b.b.f_buf_func[0].y : 1 [by b.b.f_buf_func[0]._y:=0]
2211448 b.b.f_buf_func[3]._y : 0 [by b.b._reqXX[0]:=1]
2211804 b.b.f_buf_func[3].y : 1 [by b.b.f_buf_func[3]._y:=0]
2225553 b.b.f_buf_func[1]._y : 0 [by b.b._reqXX[0]:=1]
2225778 b.b.f_buf_func[4]._y : 0 [by b.b._reqXX[0]:=1]
2225883 b.b.f_buf_func[4].y : 1 [by b.b.f_buf_func[4]._y:=0]
2246262 b.b.f_buf_func[2].y : 1 [by b.b.f_buf_func[2]._y:=0]
2261391 b.b.f_buf_func[1].y : 1 [by b.b.f_buf_func[1]._y:=0]
[] Receiving val out
2261391 b.out.v : 1
2261500 b.b.inack_ctl._y : 0 [by b.out.v:=1]
2261501 b.in.a : 1 [by b.b.inack_ctl._y:=0]
2261510 b.b._en : 0 [by b.in.a:=1]
2261511 b.b.en_buf_t.buf2._y : 1 [by b.b._en:=0]
2297905 b.b._en_X_t[0] : 0 [by b.b.en_buf_t.buf2._y:=1]
2299463 b.b.en_buf_f.buf2._y : 1 [by b.b._en:=0]
2299464 b.b._en_X_f[0] : 0 [by b.b.en_buf_f.buf2._y:=1]
[] Changing some input data
2299464 b.in.d[0] : 1
2299464 b.in.d[2] : 1
2299464 b.in.d[1] : 1
2300214 b.b._inB[1] : 0 [by b.in.d[1]:=1]
2302553 b.b._inB[0] : 0 [by b.in.d[0]:=1]
2348190 b.b._inB[2] : 0 [by b.in.d[2]:=1]
[] Removing req
[] Changing more data
2348190 b.in.r : 0
2354945 b.b.dly.and2[0]._y : 1 [by b.in.r:=0]
2354996 b.b.dly.dly[0].a : 0 [by b.b.dly.and2[0]._y:=1]
2355006 b.b.dly.dly[0]._y : 1 [by b.b.dly.dly[0].a:=0]
2355326 b.b.dly.dly[0].__y : 0 [by b.b.dly.dly[0]._y:=1]
2362908 b.b.dly.dly[0].___y : 1 [by b.b.dly.dly[0].__y:=0]
2362909 b.b.dly.dly[0].y : 0 [by b.b.dly.dly[0].___y:=1]
2362910 b.b.dly.mu2[0]._y : 1 [by b.b.dly.dly[0].y:=0]
2364640 b.b.dly._a[1] : 0 [by b.b.dly.mu2[0]._y:=1]
2366327 b.b.dly.and2[1]._y : 1 [by b.b.dly._a[1]:=0]
2366342 b.b.dly.dly[1].a : 0 [by b.b.dly.and2[1]._y:=1]
2390616 b.b.dly.dly[1]._y : 1 [by b.b.dly.dly[1].a:=0]
2391070 b.b.dly.dly[1].__y : 0 [by b.b.dly.dly[1]._y:=1]
2391386 b.b.dly.dly[1].___y : 1 [by b.b.dly.dly[1].__y:=0]
2391387 b.b.dly.dly[1].y : 0 [by b.b.dly.dly[1].___y:=1]
2391770 b.b.dly.dly[2]._y : 1 [by b.b.dly.dly[1].y:=0]
2399233 b.b.dly.dly[2].__y : 0 [by b.b.dly.dly[2]._y:=1]
2399253 b.b.dly.dly[2].___y : 1 [by b.b.dly.dly[2].__y:=0]
2400576 b.b.dly.dly[2].y : 0 [by b.b.dly.dly[2].___y:=1]
2400663 b.b.dly.mu2[1]._y : 1 [by b.b.dly.dly[2].y:=0]
2407385 b.b.dly._a[2] : 0 [by b.b.dly.mu2[1]._y:=1]
2407397 b.b.dly.and2[2]._y : 1 [by b.b.dly._a[2]:=0]
2407542 b.b.dly.dly[3].a : 0 [by b.b.dly.and2[2]._y:=1]
2408443 b.b.dly.dly[3]._y : 1 [by b.b.dly.dly[3].a:=0]
2409792 b.b.dly.dly[3].__y : 0 [by b.b.dly.dly[3]._y:=1]
2410011 b.b.dly.dly[3].___y : 1 [by b.b.dly.dly[3].__y:=0]
2418342 b.b.dly.dly[3].y : 0 [by b.b.dly.dly[3].___y:=1]
2449923 b.b.dly.dly[4]._y : 1 [by b.b.dly.dly[3].y:=0]
2449941 b.b.dly.dly[4].__y : 0 [by b.b.dly.dly[4]._y:=1]
2452135 b.b.dly.dly[4].___y : 1 [by b.b.dly.dly[4].__y:=0]
2490107 b.b.dly.dly[4].y : 0 [by b.b.dly.dly[4].___y:=1]
2490227 b.b.dly.dly[5]._y : 1 [by b.b.dly.dly[4].y:=0]
2496542 b.b.dly.dly[5].__y : 0 [by b.b.dly.dly[5]._y:=1]
2498606 b.b.dly.dly[5].___y : 1 [by b.b.dly.dly[5].__y:=0]
2499198 b.b.dly.dly[5].y : 0 [by b.b.dly.dly[5].___y:=1]
2499205 b.b.dly.dly[6]._y : 1 [by b.b.dly.dly[5].y:=0]
2499206 b.b.dly.dly[6].__y : 0 [by b.b.dly.dly[6]._y:=1]
2499330 b.b.dly.dly[6].___y : 1 [by b.b.dly.dly[6].__y:=0]
2505260 b.b.dly.dly[6].y : 0 [by b.b.dly.dly[6].___y:=1]
2506312 b.b.dly.mu2[2]._y : 1 [by b.b.dly.dly[6].y:=0]
2506672 b.b.dly._a[3] : 0 [by b.b.dly.mu2[2]._y:=1]
2516866 b.b.dly.and2[3]._y : 1 [by b.b.dly._a[3]:=0]
2517963 b.b.dly.dly[7].a : 0 [by b.b.dly.and2[3]._y:=1]
2537855 b.b.dly.dly[7]._y : 1 [by b.b.dly.dly[7].a:=0]
2537859 b.b.dly.dly[7].__y : 0 [by b.b.dly.dly[7]._y:=1]
2549523 b.b.dly.dly[7].___y : 1 [by b.b.dly.dly[7].__y:=0]
2587442 b.b.dly.dly[7].y : 0 [by b.b.dly.dly[7].___y:=1]
2605103 b.b.dly.dly[8]._y : 1 [by b.b.dly.dly[7].y:=0]
2608484 b.b.dly.dly[8].__y : 0 [by b.b.dly.dly[8]._y:=1]
2608740 b.b.dly.dly[8].___y : 1 [by b.b.dly.dly[8].__y:=0]
2623670 b.b.dly.dly[8].y : 0 [by b.b.dly.dly[8].___y:=1]
2623707 b.b.dly.dly[9]._y : 1 [by b.b.dly.dly[8].y:=0]
2623719 b.b.dly.dly[9].__y : 0 [by b.b.dly.dly[9]._y:=1]
2623728 b.b.dly.dly[9].___y : 1 [by b.b.dly.dly[9].__y:=0]
2624155 b.b.dly.dly[9].y : 0 [by b.b.dly.dly[9].___y:=1]
2624397 b.b.dly.dly[10]._y : 1 [by b.b.dly.dly[9].y:=0]
2625232 b.b.dly.dly[10].__y : 0 [by b.b.dly.dly[10]._y:=1]
2671968 b.b.dly.dly[10].___y : 1 [by b.b.dly.dly[10].__y:=0]
2673528 b.b.dly.dly[10].y : 0 [by b.b.dly.dly[10].___y:=1]
2710621 b.b.dly.dly[11]._y : 1 [by b.b.dly.dly[10].y:=0]
2710881 b.b.dly.dly[11].__y : 0 [by b.b.dly.dly[11]._y:=1]
2719869 b.b.dly.dly[11].___y : 1 [by b.b.dly.dly[11].__y:=0]
2719870 b.b.dly.dly[11].y : 0 [by b.b.dly.dly[11].___y:=1]
2755920 b.b.dly.dly[12]._y : 1 [by b.b.dly.dly[11].y:=0]
2756304 b.b.dly.dly[12].__y : 0 [by b.b.dly.dly[12]._y:=1]
2756323 b.b.dly.dly[12].___y : 1 [by b.b.dly.dly[12].__y:=0]
2756332 b.b.dly.dly[12].y : 0 [by b.b.dly.dly[12].___y:=1]
2778286 b.b.dly.dly[13]._y : 1 [by b.b.dly.dly[12].y:=0]
2778474 b.b.dly.dly[13].__y : 0 [by b.b.dly.dly[13]._y:=1]
2824250 b.b.dly.dly[13].___y : 1 [by b.b.dly.dly[13].__y:=0]
2827850 b.b.dly.dly[13].y : 0 [by b.b.dly.dly[13].___y:=1]
2827998 b.b.dly.dly[14]._y : 1 [by b.b.dly.dly[13].y:=0]
2846875 b.b.dly.dly[14].__y : 0 [by b.b.dly.dly[14]._y:=1]
2846890 b.b.dly.dly[14].___y : 1 [by b.b.dly.dly[14].__y:=0]
2857499 b.b.dly.mu2[3].b : 0 [by b.b.dly.dly[14].___y:=1]
2858386 b.b.dly.mu2[3]._y : 1 [by b.b.dly.mu2[3].b:=0]
2866368 b.b._req : 0 [by b.b.dly.mu2[3]._y:=1]
2866369 b.b.req_buf._y : 1 [by b.b._req:=0]
2873095 b.b._reqX : 0 [by b.b.req_buf._y:=1]
2873460 b.b.req_bufarray.buf2._y : 1 [by b.b._reqX:=0]
2882418 b.b._reqXX[0] : 0 [by b.b.req_bufarray.buf2._y:=1]
[] Receiving ack out
2882418 b.out.a : 1
2883802 b.b._out_a_B : 0 [by b.out.a:=1]
2883823 b.b.out_a_B_buf_t.buf2._y : 1 [by b.b._out_a_B:=0]
2883826 b.b._out_a_BX_f[0] : 0 [by b.b.out_a_B_buf_t.buf2._y:=1]
2883828 b.b.f_buf_func[3]._y : 1 [by b.b._out_a_BX_f[0]:=0]
2883829 b.b.f_buf_func[4]._y : 1 [by b.b._out_a_BX_f[0]:=0]
2883829 b.b.f_buf_func[3].y : 0 [by b.b.f_buf_func[3]._y:=1]
2883843 b.b.out_a_B_buf_f.buf2._y : 1 [by b.b._out_a_B:=0]
2884408 b.b.f_buf_func[2]._y : 1 [by b.b._out_a_BX_f[0]:=0]
2885268 b.b.f_buf_func[2].y : 0 [by b.b.f_buf_func[2]._y:=1]
2885703 b.b.f_buf_func[0]._y : 1 [by b.b._out_a_BX_f[0]:=0]
2885704 b.b.f_buf_func[0].y : 0 [by b.b.f_buf_func[0]._y:=1]
2887281 b.b.f_buf_func[4].y : 0 [by b.b.f_buf_func[4]._y:=1]
2890976 b.b._out_a_BX_t[0] : 0 [by b.b.out_a_B_buf_f.buf2._y:=1]
2893335 b.b.f_buf_func[1]._y : 1 [by b.b._out_a_BX_f[0]:=0]
2893410 b.b.f_buf_func[1].y : 0 [by b.b.f_buf_func[1]._y:=1]
2893410 b.out.v : 0
2921361 b.b.inack_ctl._y : 1 [by b.out.v:=0]
2921435 b.in.a : 0 [by b.b.inack_ctl._y:=1]
2923705 b.b._en : 1 [by b.in.a:=0]
2923803 b.b.en_buf_f.buf2._y : 0 [by b.b._en:=1]
2929476 b.b.en_buf_t.buf2._y : 0 [by b.b._en:=1]
2933329 b.b._en_X_t[0] : 1 [by b.b.en_buf_t.buf2._y:=0]
2955531 b.b._en_X_f[0] : 1 [by b.b.en_buf_f.buf2._y:=0]
[] Set ack out 0
2955531 b.out.a : 0
2961672 b.b._out_a_B : 1 [by b.out.a:=0]
2961676 b.b.out_a_B_buf_f.buf2._y : 0 [by b.b._out_a_B:=1]
2961681 b.b._out_a_BX_t[0] : 1 [by b.b.out_a_B_buf_f.buf2._y:=0]
2964032 b.b.out_a_B_buf_t.buf2._y : 0 [by b.b._out_a_B:=1]
2964323 b.b._out_a_BX_f[0] : 1 [by b.b.out_a_B_buf_t.buf2._y:=0]

View File

@ -0,0 +1,731 @@
= "GND" "GND"
= "Vdd" "Vdd"
= "Reset" "Reset"
"Reset"->"b._reset_B"-
~("Reset")->"b._reset_B"+
"b.b.reset_bufarray.buf2.a"->"b.b.reset_bufarray.buf2._y"-
~("b.b.reset_bufarray.buf2.a")->"b.b.reset_bufarray.buf2._y"+
"b.b.reset_bufarray.buf2._y"->"b.b.reset_bufarray.buf2.y"-
~("b.b.reset_bufarray.buf2._y")->"b.b.reset_bufarray.buf2.y"+
= "b.b.reset_bufarray.supply.vdd" "b.b.reset_bufarray.buf2.vdd"
= "b.b.reset_bufarray.supply.vss" "b.b.reset_bufarray.buf2.vss"
= "b.b.reset_bufarray.out[0]" "b.b.reset_bufarray.out[4]"
= "b.b.reset_bufarray.out[0]" "b.b.reset_bufarray.out[3]"
= "b.b.reset_bufarray.out[0]" "b.b.reset_bufarray.out[2]"
= "b.b.reset_bufarray.out[0]" "b.b.reset_bufarray.out[1]"
= "b.b.reset_bufarray.out[0]" "b.b.reset_bufarray.buf2.y"
= "b.b.reset_bufarray.in" "b.b.reset_bufarray.buf2.a"
~"b.b.inack_ctl.c1"&~"b.b.inack_ctl.c2"&~"b.b.inack_ctl.c3"|~"b.b.inack_ctl.pr_B"->"b.b.inack_ctl._y"+
"b.b.inack_ctl.c1"&"b.b.inack_ctl.c2"&"b.b.inack_ctl.c3"&"b.b.inack_ctl.sr_B"->"b.b.inack_ctl._y"-
"b.b.inack_ctl._y"->"b.b.inack_ctl.y"-
~("b.b.inack_ctl._y")->"b.b.inack_ctl.y"+
"b.b.dly.and2[0].a"&"b.b.dly.and2[0].b"->"b.b.dly.and2[0]._y"-
~("b.b.dly.and2[0].a"&"b.b.dly.and2[0].b")->"b.b.dly.and2[0]._y"+
"b.b.dly.and2[0]._y"->"b.b.dly.and2[0].y"-
~("b.b.dly.and2[0]._y")->"b.b.dly.and2[0].y"+
"b.b.dly.and2[1].a"&"b.b.dly.and2[1].b"->"b.b.dly.and2[1]._y"-
~("b.b.dly.and2[1].a"&"b.b.dly.and2[1].b")->"b.b.dly.and2[1]._y"+
"b.b.dly.and2[1]._y"->"b.b.dly.and2[1].y"-
~("b.b.dly.and2[1]._y")->"b.b.dly.and2[1].y"+
"b.b.dly.and2[2].a"&"b.b.dly.and2[2].b"->"b.b.dly.and2[2]._y"-
~("b.b.dly.and2[2].a"&"b.b.dly.and2[2].b")->"b.b.dly.and2[2]._y"+
"b.b.dly.and2[2]._y"->"b.b.dly.and2[2].y"-
~("b.b.dly.and2[2]._y")->"b.b.dly.and2[2].y"+
"b.b.dly.and2[3].a"&"b.b.dly.and2[3].b"->"b.b.dly.and2[3]._y"-
~("b.b.dly.and2[3].a"&"b.b.dly.and2[3].b")->"b.b.dly.and2[3]._y"+
"b.b.dly.and2[3]._y"->"b.b.dly.and2[3].y"-
~("b.b.dly.and2[3]._y")->"b.b.dly.and2[3].y"+
= "b.b.dly.s[0]" "b.b.dly.mu2[0].s"
= "b.b.dly.s[0]" "b.b.dly.and2[0].b"
= "b.b.dly.s[1]" "b.b.dly.mu2[1].s"
= "b.b.dly.s[1]" "b.b.dly.and2[1].b"
= "b.b.dly.s[2]" "b.b.dly.mu2[2].s"
= "b.b.dly.s[2]" "b.b.dly.and2[2].b"
= "b.b.dly.s[3]" "b.b.dly.mu2[3].s"
= "b.b.dly.s[3]" "b.b.dly.and2[3].b"
= "b.b.dly.supply.vdd" "b.b.dly.dly[14].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.dly[13].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.dly[12].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.dly[11].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.dly[10].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.dly[9].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.dly[8].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.dly[7].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.dly[6].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.dly[5].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.dly[4].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.dly[3].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.dly[2].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.dly[1].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.dly[0].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.mu2[3].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.mu2[2].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.mu2[1].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.mu2[0].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.and2[3].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.and2[2].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.and2[1].vdd"
= "b.b.dly.supply.vdd" "b.b.dly.and2[0].vdd"
= "b.b.dly.supply.vss" "b.b.dly.dly[14].vss"
= "b.b.dly.supply.vss" "b.b.dly.dly[13].vss"
= "b.b.dly.supply.vss" "b.b.dly.dly[12].vss"
= "b.b.dly.supply.vss" "b.b.dly.dly[11].vss"
= "b.b.dly.supply.vss" "b.b.dly.dly[10].vss"
= "b.b.dly.supply.vss" "b.b.dly.dly[9].vss"
= "b.b.dly.supply.vss" "b.b.dly.dly[8].vss"
= "b.b.dly.supply.vss" "b.b.dly.dly[7].vss"
= "b.b.dly.supply.vss" "b.b.dly.dly[6].vss"
= "b.b.dly.supply.vss" "b.b.dly.dly[5].vss"
= "b.b.dly.supply.vss" "b.b.dly.dly[4].vss"
= "b.b.dly.supply.vss" "b.b.dly.dly[3].vss"
= "b.b.dly.supply.vss" "b.b.dly.dly[2].vss"
= "b.b.dly.supply.vss" "b.b.dly.dly[1].vss"
= "b.b.dly.supply.vss" "b.b.dly.dly[0].vss"
= "b.b.dly.supply.vss" "b.b.dly.mu2[3].vss"
= "b.b.dly.supply.vss" "b.b.dly.mu2[2].vss"
= "b.b.dly.supply.vss" "b.b.dly.mu2[1].vss"
= "b.b.dly.supply.vss" "b.b.dly.mu2[0].vss"
= "b.b.dly.supply.vss" "b.b.dly.and2[3].vss"
= "b.b.dly.supply.vss" "b.b.dly.and2[2].vss"
= "b.b.dly.supply.vss" "b.b.dly.and2[1].vss"
= "b.b.dly.supply.vss" "b.b.dly.and2[0].vss"
"b.b.dly.mu2[0].s"->"b.b.dly.mu2[0]._s"-
~("b.b.dly.mu2[0].s")->"b.b.dly.mu2[0]._s"+
~"b.b.dly.mu2[0].a"&~"b.b.dly.mu2[0].s"|~"b.b.dly.mu2[0].b"&~"b.b.dly.mu2[0]._s"->"b.b.dly.mu2[0]._y"+
"b.b.dly.mu2[0].a"&"b.b.dly.mu2[0]._s"|"b.b.dly.mu2[0].b"&"b.b.dly.mu2[0].s"->"b.b.dly.mu2[0]._y"-
"b.b.dly.mu2[0]._y"->"b.b.dly.mu2[0].y"-
~("b.b.dly.mu2[0]._y")->"b.b.dly.mu2[0].y"+
"b.b.dly.mu2[1].s"->"b.b.dly.mu2[1]._s"-
~("b.b.dly.mu2[1].s")->"b.b.dly.mu2[1]._s"+
~"b.b.dly.mu2[1].a"&~"b.b.dly.mu2[1].s"|~"b.b.dly.mu2[1].b"&~"b.b.dly.mu2[1]._s"->"b.b.dly.mu2[1]._y"+
"b.b.dly.mu2[1].a"&"b.b.dly.mu2[1]._s"|"b.b.dly.mu2[1].b"&"b.b.dly.mu2[1].s"->"b.b.dly.mu2[1]._y"-
"b.b.dly.mu2[1]._y"->"b.b.dly.mu2[1].y"-
~("b.b.dly.mu2[1]._y")->"b.b.dly.mu2[1].y"+
"b.b.dly.mu2[2].s"->"b.b.dly.mu2[2]._s"-
~("b.b.dly.mu2[2].s")->"b.b.dly.mu2[2]._s"+
~"b.b.dly.mu2[2].a"&~"b.b.dly.mu2[2].s"|~"b.b.dly.mu2[2].b"&~"b.b.dly.mu2[2]._s"->"b.b.dly.mu2[2]._y"+
"b.b.dly.mu2[2].a"&"b.b.dly.mu2[2]._s"|"b.b.dly.mu2[2].b"&"b.b.dly.mu2[2].s"->"b.b.dly.mu2[2]._y"-
"b.b.dly.mu2[2]._y"->"b.b.dly.mu2[2].y"-
~("b.b.dly.mu2[2]._y")->"b.b.dly.mu2[2].y"+
"b.b.dly.mu2[3].s"->"b.b.dly.mu2[3]._s"-
~("b.b.dly.mu2[3].s")->"b.b.dly.mu2[3]._s"+
~"b.b.dly.mu2[3].a"&~"b.b.dly.mu2[3].s"|~"b.b.dly.mu2[3].b"&~"b.b.dly.mu2[3]._s"->"b.b.dly.mu2[3]._y"+
"b.b.dly.mu2[3].a"&"b.b.dly.mu2[3]._s"|"b.b.dly.mu2[3].b"&"b.b.dly.mu2[3].s"->"b.b.dly.mu2[3]._y"-
"b.b.dly.mu2[3]._y"->"b.b.dly.mu2[3].y"-
~("b.b.dly.mu2[3]._y")->"b.b.dly.mu2[3].y"+
"b.b.dly.dly[0].a"->"b.b.dly.dly[0]._y"-
~("b.b.dly.dly[0].a")->"b.b.dly.dly[0]._y"+
"b.b.dly.dly[0]._y"->"b.b.dly.dly[0].__y"-
~("b.b.dly.dly[0]._y")->"b.b.dly.dly[0].__y"+
"b.b.dly.dly[0].__y"->"b.b.dly.dly[0].___y"-
~("b.b.dly.dly[0].__y")->"b.b.dly.dly[0].___y"+
"b.b.dly.dly[0].___y"->"b.b.dly.dly[0].y"-
~("b.b.dly.dly[0].___y")->"b.b.dly.dly[0].y"+
"b.b.dly.dly[1].a"->"b.b.dly.dly[1]._y"-
~("b.b.dly.dly[1].a")->"b.b.dly.dly[1]._y"+
"b.b.dly.dly[1]._y"->"b.b.dly.dly[1].__y"-
~("b.b.dly.dly[1]._y")->"b.b.dly.dly[1].__y"+
"b.b.dly.dly[1].__y"->"b.b.dly.dly[1].___y"-
~("b.b.dly.dly[1].__y")->"b.b.dly.dly[1].___y"+
"b.b.dly.dly[1].___y"->"b.b.dly.dly[1].y"-
~("b.b.dly.dly[1].___y")->"b.b.dly.dly[1].y"+
"b.b.dly.dly[2].a"->"b.b.dly.dly[2]._y"-
~("b.b.dly.dly[2].a")->"b.b.dly.dly[2]._y"+
"b.b.dly.dly[2]._y"->"b.b.dly.dly[2].__y"-
~("b.b.dly.dly[2]._y")->"b.b.dly.dly[2].__y"+
"b.b.dly.dly[2].__y"->"b.b.dly.dly[2].___y"-
~("b.b.dly.dly[2].__y")->"b.b.dly.dly[2].___y"+
"b.b.dly.dly[2].___y"->"b.b.dly.dly[2].y"-
~("b.b.dly.dly[2].___y")->"b.b.dly.dly[2].y"+
"b.b.dly.dly[3].a"->"b.b.dly.dly[3]._y"-
~("b.b.dly.dly[3].a")->"b.b.dly.dly[3]._y"+
"b.b.dly.dly[3]._y"->"b.b.dly.dly[3].__y"-
~("b.b.dly.dly[3]._y")->"b.b.dly.dly[3].__y"+
"b.b.dly.dly[3].__y"->"b.b.dly.dly[3].___y"-
~("b.b.dly.dly[3].__y")->"b.b.dly.dly[3].___y"+
"b.b.dly.dly[3].___y"->"b.b.dly.dly[3].y"-
~("b.b.dly.dly[3].___y")->"b.b.dly.dly[3].y"+
"b.b.dly.dly[4].a"->"b.b.dly.dly[4]._y"-
~("b.b.dly.dly[4].a")->"b.b.dly.dly[4]._y"+
"b.b.dly.dly[4]._y"->"b.b.dly.dly[4].__y"-
~("b.b.dly.dly[4]._y")->"b.b.dly.dly[4].__y"+
"b.b.dly.dly[4].__y"->"b.b.dly.dly[4].___y"-
~("b.b.dly.dly[4].__y")->"b.b.dly.dly[4].___y"+
"b.b.dly.dly[4].___y"->"b.b.dly.dly[4].y"-
~("b.b.dly.dly[4].___y")->"b.b.dly.dly[4].y"+
"b.b.dly.dly[5].a"->"b.b.dly.dly[5]._y"-
~("b.b.dly.dly[5].a")->"b.b.dly.dly[5]._y"+
"b.b.dly.dly[5]._y"->"b.b.dly.dly[5].__y"-
~("b.b.dly.dly[5]._y")->"b.b.dly.dly[5].__y"+
"b.b.dly.dly[5].__y"->"b.b.dly.dly[5].___y"-
~("b.b.dly.dly[5].__y")->"b.b.dly.dly[5].___y"+
"b.b.dly.dly[5].___y"->"b.b.dly.dly[5].y"-
~("b.b.dly.dly[5].___y")->"b.b.dly.dly[5].y"+
"b.b.dly.dly[6].a"->"b.b.dly.dly[6]._y"-
~("b.b.dly.dly[6].a")->"b.b.dly.dly[6]._y"+
"b.b.dly.dly[6]._y"->"b.b.dly.dly[6].__y"-
~("b.b.dly.dly[6]._y")->"b.b.dly.dly[6].__y"+
"b.b.dly.dly[6].__y"->"b.b.dly.dly[6].___y"-
~("b.b.dly.dly[6].__y")->"b.b.dly.dly[6].___y"+
"b.b.dly.dly[6].___y"->"b.b.dly.dly[6].y"-
~("b.b.dly.dly[6].___y")->"b.b.dly.dly[6].y"+
"b.b.dly.dly[7].a"->"b.b.dly.dly[7]._y"-
~("b.b.dly.dly[7].a")->"b.b.dly.dly[7]._y"+
"b.b.dly.dly[7]._y"->"b.b.dly.dly[7].__y"-
~("b.b.dly.dly[7]._y")->"b.b.dly.dly[7].__y"+
"b.b.dly.dly[7].__y"->"b.b.dly.dly[7].___y"-
~("b.b.dly.dly[7].__y")->"b.b.dly.dly[7].___y"+
"b.b.dly.dly[7].___y"->"b.b.dly.dly[7].y"-
~("b.b.dly.dly[7].___y")->"b.b.dly.dly[7].y"+
"b.b.dly.dly[8].a"->"b.b.dly.dly[8]._y"-
~("b.b.dly.dly[8].a")->"b.b.dly.dly[8]._y"+
"b.b.dly.dly[8]._y"->"b.b.dly.dly[8].__y"-
~("b.b.dly.dly[8]._y")->"b.b.dly.dly[8].__y"+
"b.b.dly.dly[8].__y"->"b.b.dly.dly[8].___y"-
~("b.b.dly.dly[8].__y")->"b.b.dly.dly[8].___y"+
"b.b.dly.dly[8].___y"->"b.b.dly.dly[8].y"-
~("b.b.dly.dly[8].___y")->"b.b.dly.dly[8].y"+
"b.b.dly.dly[9].a"->"b.b.dly.dly[9]._y"-
~("b.b.dly.dly[9].a")->"b.b.dly.dly[9]._y"+
"b.b.dly.dly[9]._y"->"b.b.dly.dly[9].__y"-
~("b.b.dly.dly[9]._y")->"b.b.dly.dly[9].__y"+
"b.b.dly.dly[9].__y"->"b.b.dly.dly[9].___y"-
~("b.b.dly.dly[9].__y")->"b.b.dly.dly[9].___y"+
"b.b.dly.dly[9].___y"->"b.b.dly.dly[9].y"-
~("b.b.dly.dly[9].___y")->"b.b.dly.dly[9].y"+
"b.b.dly.dly[10].a"->"b.b.dly.dly[10]._y"-
~("b.b.dly.dly[10].a")->"b.b.dly.dly[10]._y"+
"b.b.dly.dly[10]._y"->"b.b.dly.dly[10].__y"-
~("b.b.dly.dly[10]._y")->"b.b.dly.dly[10].__y"+
"b.b.dly.dly[10].__y"->"b.b.dly.dly[10].___y"-
~("b.b.dly.dly[10].__y")->"b.b.dly.dly[10].___y"+
"b.b.dly.dly[10].___y"->"b.b.dly.dly[10].y"-
~("b.b.dly.dly[10].___y")->"b.b.dly.dly[10].y"+
"b.b.dly.dly[11].a"->"b.b.dly.dly[11]._y"-
~("b.b.dly.dly[11].a")->"b.b.dly.dly[11]._y"+
"b.b.dly.dly[11]._y"->"b.b.dly.dly[11].__y"-
~("b.b.dly.dly[11]._y")->"b.b.dly.dly[11].__y"+
"b.b.dly.dly[11].__y"->"b.b.dly.dly[11].___y"-
~("b.b.dly.dly[11].__y")->"b.b.dly.dly[11].___y"+
"b.b.dly.dly[11].___y"->"b.b.dly.dly[11].y"-
~("b.b.dly.dly[11].___y")->"b.b.dly.dly[11].y"+
"b.b.dly.dly[12].a"->"b.b.dly.dly[12]._y"-
~("b.b.dly.dly[12].a")->"b.b.dly.dly[12]._y"+
"b.b.dly.dly[12]._y"->"b.b.dly.dly[12].__y"-
~("b.b.dly.dly[12]._y")->"b.b.dly.dly[12].__y"+
"b.b.dly.dly[12].__y"->"b.b.dly.dly[12].___y"-
~("b.b.dly.dly[12].__y")->"b.b.dly.dly[12].___y"+
"b.b.dly.dly[12].___y"->"b.b.dly.dly[12].y"-
~("b.b.dly.dly[12].___y")->"b.b.dly.dly[12].y"+
"b.b.dly.dly[13].a"->"b.b.dly.dly[13]._y"-
~("b.b.dly.dly[13].a")->"b.b.dly.dly[13]._y"+
"b.b.dly.dly[13]._y"->"b.b.dly.dly[13].__y"-
~("b.b.dly.dly[13]._y")->"b.b.dly.dly[13].__y"+
"b.b.dly.dly[13].__y"->"b.b.dly.dly[13].___y"-
~("b.b.dly.dly[13].__y")->"b.b.dly.dly[13].___y"+
"b.b.dly.dly[13].___y"->"b.b.dly.dly[13].y"-
~("b.b.dly.dly[13].___y")->"b.b.dly.dly[13].y"+
"b.b.dly.dly[14].a"->"b.b.dly.dly[14]._y"-
~("b.b.dly.dly[14].a")->"b.b.dly.dly[14]._y"+
"b.b.dly.dly[14]._y"->"b.b.dly.dly[14].__y"-
~("b.b.dly.dly[14]._y")->"b.b.dly.dly[14].__y"+
"b.b.dly.dly[14].__y"->"b.b.dly.dly[14].___y"-
~("b.b.dly.dly[14].__y")->"b.b.dly.dly[14].___y"+
"b.b.dly.dly[14].___y"->"b.b.dly.dly[14].y"-
~("b.b.dly.dly[14].___y")->"b.b.dly.dly[14].y"+
= "b.b.dly.dly[14].y" "b.b.dly.mu2[3].b"
= "b.b.dly.dly[14].a" "b.b.dly.dly[13].y"
= "b.b.dly.dly[13].a" "b.b.dly.dly[12].y"
= "b.b.dly.dly[12].a" "b.b.dly.dly[11].y"
= "b.b.dly.dly[11].a" "b.b.dly.dly[10].y"
= "b.b.dly.dly[10].a" "b.b.dly.dly[9].y"
= "b.b.dly.dly[9].a" "b.b.dly.dly[8].y"
= "b.b.dly.dly[8].a" "b.b.dly.dly[7].y"
= "b.b.dly.dly[7].a" "b.b.dly.and2[3].y"
= "b.b.dly.dly[6].y" "b.b.dly.mu2[2].b"
= "b.b.dly.dly[6].a" "b.b.dly.dly[5].y"
= "b.b.dly.dly[5].a" "b.b.dly.dly[4].y"
= "b.b.dly.dly[4].a" "b.b.dly.dly[3].y"
= "b.b.dly.dly[3].a" "b.b.dly.and2[2].y"
= "b.b.dly.dly[2].y" "b.b.dly.mu2[1].b"
= "b.b.dly.dly[2].a" "b.b.dly.dly[1].y"
= "b.b.dly.dly[1].a" "b.b.dly.and2[1].y"
= "b.b.dly.dly[0].y" "b.b.dly.mu2[0].b"
= "b.b.dly.dly[0].a" "b.b.dly.and2[0].y"
= "b.b.dly._a[1]" "b.b.dly.mu2[1].a"
= "b.b.dly._a[1]" "b.b.dly.and2[1].a"
= "b.b.dly._a[1]" "b.b.dly.mu2[0].y"
= "b.b.dly._a[2]" "b.b.dly.mu2[2].a"
= "b.b.dly._a[2]" "b.b.dly.and2[2].a"
= "b.b.dly._a[2]" "b.b.dly.mu2[1].y"
= "b.b.dly._a[3]" "b.b.dly.mu2[3].a"
= "b.b.dly._a[3]" "b.b.dly.and2[3].a"
= "b.b.dly._a[3]" "b.b.dly.mu2[2].y"
= "b.b.dly.out" "b.b.dly.mu2[3].y"
= "b.b.dly.out" "b.b.dly._a[4]"
= "b.b.dly.in" "b.b.dly.mu2[0].a"
= "b.b.dly.in" "b.b.dly.and2[0].a"
= "b.b.dly.in" "b.b.dly._a[0]"
= "b.b._out_a_BX_f[0]" "b.b.out_a_B_buf_t.out[0]"
= "b.b._out_a_BX_f[1]" "b.b.out_a_B_buf_t.out[1]"
= "b.b._out_a_BX_f[2]" "b.b.out_a_B_buf_t.out[2]"
= "b.b._out_a_BX_f[3]" "b.b.out_a_B_buf_t.out[3]"
= "b.b._out_a_BX_f[4]" "b.b.out_a_B_buf_t.out[4]"
= "b.b._out_a_BX_f[0]" "b.b.f_buf_func[4].c2"
= "b.b._out_a_BX_f[0]" "b.b.f_buf_func[3].c2"
= "b.b._out_a_BX_f[0]" "b.b.f_buf_func[2].c2"
= "b.b._out_a_BX_f[0]" "b.b.f_buf_func[1].c2"
= "b.b._out_a_BX_f[0]" "b.b.f_buf_func[0].c2"
= "b.b._out_a_BX_f[0]" "b.b._out_a_BX_f[4]"
= "b.b._out_a_BX_f[0]" "b.b._out_a_BX_f[3]"
= "b.b._out_a_BX_f[0]" "b.b._out_a_BX_f[2]"
= "b.b._out_a_BX_f[0]" "b.b._out_a_BX_f[1]"
"b.b.out_a_inv.a"->"b.b.out_a_inv.y"-
~("b.b.out_a_inv.a")->"b.b.out_a_inv.y"+
= "b.b._en" "b.b.en_buf_f.in"
= "b.b._en" "b.b.en_buf_t.in"
= "b.b._en" "b.b.en_ctl.y"
= "b.b._en" "b.b.inack_ctl.c1"
timing("b.b.in.a"-,"b.b.in.d[0]","b.b.in.r"+)
timing("b.b.in.a"-,"b.b.in.d[1]","b.b.in.r"+)
timing("b.b.in.a"-,"b.b.in.d[2]","b.b.in.r"+)
timing("b.b.in.a"-,"b.b.in.d[3]","b.b.in.r"+)
timing("b.b.in.a"-,"b.b.in.d[4]","b.b.in.r"+)
= "b.b.in.r" "b.b.dly.in"
= "b.b.in.a" "b.b.en_ctl.c1"
= "b.b.in.a" "b.b.inack_ctl.y"
= "b.b.in.d[0]" "b.b.t_buf_func[0].n1"
= "b.b.in.d[0]" "b.b.input_invs[0].a"
= "b.b.in.d[1]" "b.b.t_buf_func[1].n1"
= "b.b.in.d[1]" "b.b.input_invs[1].a"
= "b.b.in.d[2]" "b.b.t_buf_func[2].n1"
= "b.b.in.d[2]" "b.b.input_invs[2].a"
= "b.b.in.d[3]" "b.b.t_buf_func[3].n1"
= "b.b.in.d[3]" "b.b.input_invs[3].a"
= "b.b.in.d[4]" "b.b.t_buf_func[4].n1"
= "b.b.in.d[4]" "b.b.input_invs[4].a"
= "b.b._inB[0]" "b.b.f_buf_func[0].n1"
= "b.b._inB[0]" "b.b.input_invs[0].y"
= "b.b._inB[1]" "b.b.f_buf_func[1].n1"
= "b.b._inB[1]" "b.b.input_invs[1].y"
= "b.b._inB[2]" "b.b.f_buf_func[2].n1"
= "b.b._inB[2]" "b.b.input_invs[2].y"
= "b.b._inB[3]" "b.b.f_buf_func[3].n1"
= "b.b._inB[3]" "b.b.input_invs[3].y"
= "b.b._inB[4]" "b.b.f_buf_func[4].n1"
= "b.b._inB[4]" "b.b.input_invs[4].y"
"b.b.reset_buf.a"->"b.b.reset_buf._y"-
~("b.b.reset_buf.a")->"b.b.reset_buf._y"+
"b.b.reset_buf._y"->"b.b.reset_buf.y"-
~("b.b.reset_buf._y")->"b.b.reset_buf.y"+
= "b.b._reset_BX" "b.b.inack_ctl.sr_B"
= "b.b._reset_BX" "b.b.inack_ctl.pr_B"
= "b.b._reset_BX" "b.b.reset_bufarray.in"
= "b.b._reset_BX" "b.b.reset_buf.y"
= "b.b.reset_B" "b.b.reset_buf.a"
= "b.b._out_a_BX_t[0]" "b.b.out_a_B_buf_f.out[0]"
= "b.b._out_a_BX_t[1]" "b.b.out_a_B_buf_f.out[1]"
= "b.b._out_a_BX_t[2]" "b.b.out_a_B_buf_f.out[2]"
= "b.b._out_a_BX_t[3]" "b.b.out_a_B_buf_f.out[3]"
= "b.b._out_a_BX_t[4]" "b.b.out_a_B_buf_f.out[4]"
= "b.b._out_a_BX_t[0]" "b.b.t_buf_func[4].c2"
= "b.b._out_a_BX_t[0]" "b.b.t_buf_func[3].c2"
= "b.b._out_a_BX_t[0]" "b.b.t_buf_func[2].c2"
= "b.b._out_a_BX_t[0]" "b.b.t_buf_func[1].c2"
= "b.b._out_a_BX_t[0]" "b.b.t_buf_func[0].c2"
= "b.b._out_a_BX_t[0]" "b.b._out_a_BX_t[4]"
= "b.b._out_a_BX_t[0]" "b.b._out_a_BX_t[3]"
= "b.b._out_a_BX_t[0]" "b.b._out_a_BX_t[2]"
= "b.b._out_a_BX_t[0]" "b.b._out_a_BX_t[1]"
= "b.b._reset_BXX[0]" "b.b.reset_bufarray.out[0]"
= "b.b._reset_BXX[1]" "b.b.reset_bufarray.out[1]"
= "b.b._reset_BXX[2]" "b.b.reset_bufarray.out[2]"
= "b.b._reset_BXX[3]" "b.b.reset_bufarray.out[3]"
= "b.b._reset_BXX[4]" "b.b.reset_bufarray.out[4]"
= "b.b._reset_BXX[0]" "b.b.f_buf_func[4].sr_B"
= "b.b._reset_BXX[0]" "b.b.f_buf_func[4].pr_B"
= "b.b._reset_BXX[0]" "b.b.t_buf_func[4].sr_B"
= "b.b._reset_BXX[0]" "b.b.t_buf_func[4].pr_B"
= "b.b._reset_BXX[0]" "b.b.f_buf_func[3].sr_B"
= "b.b._reset_BXX[0]" "b.b.f_buf_func[3].pr_B"
= "b.b._reset_BXX[0]" "b.b.t_buf_func[3].sr_B"
= "b.b._reset_BXX[0]" "b.b.t_buf_func[3].pr_B"
= "b.b._reset_BXX[0]" "b.b.f_buf_func[2].sr_B"
= "b.b._reset_BXX[0]" "b.b.f_buf_func[2].pr_B"
= "b.b._reset_BXX[0]" "b.b.t_buf_func[2].sr_B"
= "b.b._reset_BXX[0]" "b.b.t_buf_func[2].pr_B"
= "b.b._reset_BXX[0]" "b.b.f_buf_func[1].sr_B"
= "b.b._reset_BXX[0]" "b.b.f_buf_func[1].pr_B"
= "b.b._reset_BXX[0]" "b.b.t_buf_func[1].sr_B"
= "b.b._reset_BXX[0]" "b.b.t_buf_func[1].pr_B"
= "b.b._reset_BXX[0]" "b.b.f_buf_func[0].sr_B"
= "b.b._reset_BXX[0]" "b.b.f_buf_func[0].pr_B"
= "b.b._reset_BXX[0]" "b.b.t_buf_func[0].sr_B"
= "b.b._reset_BXX[0]" "b.b.t_buf_func[0].pr_B"
= "b.b._reset_BXX[0]" "b.b._reset_BXX[4]"
= "b.b._reset_BXX[0]" "b.b._reset_BXX[3]"
= "b.b._reset_BXX[0]" "b.b._reset_BXX[2]"
= "b.b._reset_BXX[0]" "b.b._reset_BXX[1]"
"b.b.en_buf_f.buf2.a"->"b.b.en_buf_f.buf2._y"-
~("b.b.en_buf_f.buf2.a")->"b.b.en_buf_f.buf2._y"+
"b.b.en_buf_f.buf2._y"->"b.b.en_buf_f.buf2.y"-
~("b.b.en_buf_f.buf2._y")->"b.b.en_buf_f.buf2.y"+
= "b.b.en_buf_f.supply.vdd" "b.b.en_buf_f.buf2.vdd"
= "b.b.en_buf_f.supply.vss" "b.b.en_buf_f.buf2.vss"
= "b.b.en_buf_f.out[0]" "b.b.en_buf_f.out[4]"
= "b.b.en_buf_f.out[0]" "b.b.en_buf_f.out[3]"
= "b.b.en_buf_f.out[0]" "b.b.en_buf_f.out[2]"
= "b.b.en_buf_f.out[0]" "b.b.en_buf_f.out[1]"
= "b.b.en_buf_f.out[0]" "b.b.en_buf_f.buf2.y"
= "b.b.en_buf_f.in" "b.b.en_buf_f.buf2.a"
"b.b.input_invs[0].a"->"b.b.input_invs[0].y"-
~("b.b.input_invs[0].a")->"b.b.input_invs[0].y"+
"b.b.input_invs[1].a"->"b.b.input_invs[1].y"-
~("b.b.input_invs[1].a")->"b.b.input_invs[1].y"+
"b.b.input_invs[2].a"->"b.b.input_invs[2].y"-
~("b.b.input_invs[2].a")->"b.b.input_invs[2].y"+
"b.b.input_invs[3].a"->"b.b.input_invs[3].y"-
~("b.b.input_invs[3].a")->"b.b.input_invs[3].y"+
"b.b.input_invs[4].a"->"b.b.input_invs[4].y"-
~("b.b.input_invs[4].a")->"b.b.input_invs[4].y"+
"b.b.out_a_B_buf_t.buf2.a"->"b.b.out_a_B_buf_t.buf2._y"-
~("b.b.out_a_B_buf_t.buf2.a")->"b.b.out_a_B_buf_t.buf2._y"+
"b.b.out_a_B_buf_t.buf2._y"->"b.b.out_a_B_buf_t.buf2.y"-
~("b.b.out_a_B_buf_t.buf2._y")->"b.b.out_a_B_buf_t.buf2.y"+
= "b.b.out_a_B_buf_t.supply.vdd" "b.b.out_a_B_buf_t.buf2.vdd"
= "b.b.out_a_B_buf_t.supply.vss" "b.b.out_a_B_buf_t.buf2.vss"
= "b.b.out_a_B_buf_t.out[0]" "b.b.out_a_B_buf_t.out[4]"
= "b.b.out_a_B_buf_t.out[0]" "b.b.out_a_B_buf_t.out[3]"
= "b.b.out_a_B_buf_t.out[0]" "b.b.out_a_B_buf_t.out[2]"
= "b.b.out_a_B_buf_t.out[0]" "b.b.out_a_B_buf_t.out[1]"
= "b.b.out_a_B_buf_t.out[0]" "b.b.out_a_B_buf_t.buf2.y"
= "b.b.out_a_B_buf_t.in" "b.b.out_a_B_buf_t.buf2.a"
= "b.b._en_X_f[0]" "b.b.en_buf_f.out[0]"
= "b.b._en_X_f[1]" "b.b.en_buf_f.out[1]"
= "b.b._en_X_f[2]" "b.b.en_buf_f.out[2]"
= "b.b._en_X_f[3]" "b.b.en_buf_f.out[3]"
= "b.b._en_X_f[4]" "b.b.en_buf_f.out[4]"
= "b.b._en_X_f[0]" "b.b.f_buf_func[4].c1"
= "b.b._en_X_f[0]" "b.b.f_buf_func[3].c1"
= "b.b._en_X_f[0]" "b.b.f_buf_func[2].c1"
= "b.b._en_X_f[0]" "b.b.f_buf_func[1].c1"
= "b.b._en_X_f[0]" "b.b.f_buf_func[0].c1"
= "b.b._en_X_f[0]" "b.b._en_X_f[4]"
= "b.b._en_X_f[0]" "b.b._en_X_f[3]"
= "b.b._en_X_f[0]" "b.b._en_X_f[2]"
= "b.b._en_X_f[0]" "b.b._en_X_f[1]"
= "b.b.dly_cfg[0]" "b.b.dly.s[0]"
= "b.b.dly_cfg[1]" "b.b.dly.s[1]"
= "b.b.dly_cfg[2]" "b.b.dly.s[2]"
= "b.b.dly_cfg[3]" "b.b.dly.s[3]"
= "b.b.supply.vss" "b.b.out_a_B_buf_t.supply.vss"
= "b.b.supply.vdd" "b.b.out_a_B_buf_t.supply.vdd"
= "b.b.supply.vss" "b.b.out_a_B_buf_f.supply.vss"
= "b.b.supply.vdd" "b.b.out_a_B_buf_f.supply.vdd"
= "b.b.supply.vss" "b.b.en_buf_f.supply.vss"
= "b.b.supply.vdd" "b.b.en_buf_f.supply.vdd"
= "b.b.supply.vss" "b.b.en_buf_t.supply.vss"
= "b.b.supply.vdd" "b.b.en_buf_t.supply.vdd"
= "b.b.supply.vss" "b.b.req_bufarray.supply.vss"
= "b.b.supply.vdd" "b.b.req_bufarray.supply.vdd"
= "b.b.supply.vss" "b.b.reset_bufarray.supply.vss"
= "b.b.supply.vdd" "b.b.reset_bufarray.supply.vdd"
= "b.b.supply.vss" "b.b.dly.supply.vss"
= "b.b.supply.vdd" "b.b.dly.supply.vdd"
= "b.b.supply.vdd" "b.b.t_buf_func[4].vdd"
= "b.b.supply.vdd" "b.b.f_buf_func[4].vdd"
= "b.b.supply.vdd" "b.b.t_buf_func[3].vdd"
= "b.b.supply.vdd" "b.b.f_buf_func[3].vdd"
= "b.b.supply.vdd" "b.b.t_buf_func[2].vdd"
= "b.b.supply.vdd" "b.b.f_buf_func[2].vdd"
= "b.b.supply.vdd" "b.b.t_buf_func[1].vdd"
= "b.b.supply.vdd" "b.b.f_buf_func[1].vdd"
= "b.b.supply.vdd" "b.b.t_buf_func[0].vdd"
= "b.b.supply.vdd" "b.b.f_buf_func[0].vdd"
= "b.b.supply.vdd" "b.b.out_a_inv.vdd"
= "b.b.supply.vdd" "b.b.en_ctl.vdd"
= "b.b.supply.vdd" "b.b.inack_ctl.vdd"
= "b.b.supply.vdd" "b.b.input_invs[4].vdd"
= "b.b.supply.vdd" "b.b.input_invs[3].vdd"
= "b.b.supply.vdd" "b.b.input_invs[2].vdd"
= "b.b.supply.vdd" "b.b.input_invs[1].vdd"
= "b.b.supply.vdd" "b.b.input_invs[0].vdd"
= "b.b.supply.vdd" "b.b.req_buf.vdd"
= "b.b.supply.vdd" "b.b.reset_buf.vdd"
= "b.b.supply.vss" "b.b.t_buf_func[4].vss"
= "b.b.supply.vss" "b.b.f_buf_func[4].vss"
= "b.b.supply.vss" "b.b.t_buf_func[3].vss"
= "b.b.supply.vss" "b.b.f_buf_func[3].vss"
= "b.b.supply.vss" "b.b.t_buf_func[2].vss"
= "b.b.supply.vss" "b.b.f_buf_func[2].vss"
= "b.b.supply.vss" "b.b.t_buf_func[1].vss"
= "b.b.supply.vss" "b.b.f_buf_func[1].vss"
= "b.b.supply.vss" "b.b.t_buf_func[0].vss"
= "b.b.supply.vss" "b.b.f_buf_func[0].vss"
= "b.b.supply.vss" "b.b.out_a_inv.vss"
= "b.b.supply.vss" "b.b.en_ctl.vss"
= "b.b.supply.vss" "b.b.inack_ctl.vss"
= "b.b.supply.vss" "b.b.input_invs[4].vss"
= "b.b.supply.vss" "b.b.input_invs[3].vss"
= "b.b.supply.vss" "b.b.input_invs[2].vss"
= "b.b.supply.vss" "b.b.input_invs[1].vss"
= "b.b.supply.vss" "b.b.input_invs[0].vss"
= "b.b.supply.vss" "b.b.req_buf.vss"
= "b.b.supply.vss" "b.b.reset_buf.vss"
~"b.b.en_ctl.p1"&~"b.b.en_ctl.c1"->"b.b.en_ctl.y"+
"b.b.en_ctl.c1"->"b.b.en_ctl.y"-
"b.b.out_a_B_buf_f.buf2.a"->"b.b.out_a_B_buf_f.buf2._y"-
~("b.b.out_a_B_buf_f.buf2.a")->"b.b.out_a_B_buf_f.buf2._y"+
"b.b.out_a_B_buf_f.buf2._y"->"b.b.out_a_B_buf_f.buf2.y"-
~("b.b.out_a_B_buf_f.buf2._y")->"b.b.out_a_B_buf_f.buf2.y"+
= "b.b.out_a_B_buf_f.supply.vdd" "b.b.out_a_B_buf_f.buf2.vdd"
= "b.b.out_a_B_buf_f.supply.vss" "b.b.out_a_B_buf_f.buf2.vss"
= "b.b.out_a_B_buf_f.out[0]" "b.b.out_a_B_buf_f.out[4]"
= "b.b.out_a_B_buf_f.out[0]" "b.b.out_a_B_buf_f.out[3]"
= "b.b.out_a_B_buf_f.out[0]" "b.b.out_a_B_buf_f.out[2]"
= "b.b.out_a_B_buf_f.out[0]" "b.b.out_a_B_buf_f.out[1]"
= "b.b.out_a_B_buf_f.out[0]" "b.b.out_a_B_buf_f.buf2.y"
= "b.b.out_a_B_buf_f.in" "b.b.out_a_B_buf_f.buf2.a"
= "b.b.out.d.d[0].d[0]" "b.b.out.d.d[0].f"
= "b.b.out.d.d[0].d[1]" "b.b.out.d.d[0].t"
= "b.b.out.d.d[1].d[0]" "b.b.out.d.d[1].f"
= "b.b.out.d.d[1].d[1]" "b.b.out.d.d[1].t"
= "b.b.out.d.d[2].d[0]" "b.b.out.d.d[2].f"
= "b.b.out.d.d[2].d[1]" "b.b.out.d.d[2].t"
= "b.b.out.d.d[3].d[0]" "b.b.out.d.d[3].f"
= "b.b.out.d.d[3].d[1]" "b.b.out.d.d[3].t"
= "b.b.out.d.d[4].d[0]" "b.b.out.d.d[4].f"
= "b.b.out.d.d[4].d[1]" "b.b.out.d.d[4].t"
= "b.b.out.d.d[4].d[0]" "b.b.out.d.d[4].f"
= "b.b.out.d.d[4].d[1]" "b.b.out.d.d[4].t"
= "b.b.out.d.d[3].d[0]" "b.b.out.d.d[3].f"
= "b.b.out.d.d[3].d[1]" "b.b.out.d.d[3].t"
= "b.b.out.d.d[2].d[0]" "b.b.out.d.d[2].f"
= "b.b.out.d.d[2].d[1]" "b.b.out.d.d[2].t"
= "b.b.out.d.d[1].d[0]" "b.b.out.d.d[1].f"
= "b.b.out.d.d[1].d[1]" "b.b.out.d.d[1].t"
= "b.b.out.d.d[0].d[0]" "b.b.out.d.d[0].f"
= "b.b.out.d.d[0].d[1]" "b.b.out.d.d[0].t"
= "b.b.out.d.d[4].d[0]" "b.b.out.d.d[4].f"
= "b.b.out.d.d[4].d[1]" "b.b.out.d.d[4].t"
= "b.b.out.d.d[3].d[0]" "b.b.out.d.d[3].f"
= "b.b.out.d.d[3].d[1]" "b.b.out.d.d[3].t"
= "b.b.out.d.d[2].d[0]" "b.b.out.d.d[2].f"
= "b.b.out.d.d[2].d[1]" "b.b.out.d.d[2].t"
= "b.b.out.d.d[1].d[0]" "b.b.out.d.d[1].f"
= "b.b.out.d.d[1].d[1]" "b.b.out.d.d[1].t"
= "b.b.out.d.d[0].d[0]" "b.b.out.d.d[0].f"
= "b.b.out.d.d[0].d[1]" "b.b.out.d.d[0].t"
= "b.b.out.a" "b.b.out_a_inv.a"
= "b.b.out.v" "b.b.en_ctl.p1"
= "b.b.out.v" "b.b.inack_ctl.c3"
= "b.b.out.d.d[4].d[0]" "b.b.f_buf_func[4].y"
= "b.b.out.d.d[4].d[0]" "b.b.out.d.d[4].f"
= "b.b.out.d.d[4].d[1]" "b.b.t_buf_func[4].y"
= "b.b.out.d.d[4].d[1]" "b.b.out.d.d[4].t"
= "b.b.out.d.d[3].d[0]" "b.b.f_buf_func[3].y"
= "b.b.out.d.d[3].d[0]" "b.b.out.d.d[3].f"
= "b.b.out.d.d[3].d[1]" "b.b.t_buf_func[3].y"
= "b.b.out.d.d[3].d[1]" "b.b.out.d.d[3].t"
= "b.b.out.d.d[2].d[0]" "b.b.f_buf_func[2].y"
= "b.b.out.d.d[2].d[0]" "b.b.out.d.d[2].f"
= "b.b.out.d.d[2].d[1]" "b.b.t_buf_func[2].y"
= "b.b.out.d.d[2].d[1]" "b.b.out.d.d[2].t"
= "b.b.out.d.d[1].d[0]" "b.b.f_buf_func[1].y"
= "b.b.out.d.d[1].d[0]" "b.b.out.d.d[1].f"
= "b.b.out.d.d[1].d[1]" "b.b.t_buf_func[1].y"
= "b.b.out.d.d[1].d[1]" "b.b.out.d.d[1].t"
= "b.b.out.d.d[0].d[0]" "b.b.f_buf_func[0].y"
= "b.b.out.d.d[0].d[0]" "b.b.out.d.d[0].f"
= "b.b.out.d.d[0].d[1]" "b.b.t_buf_func[0].y"
= "b.b.out.d.d[0].d[1]" "b.b.out.d.d[0].t"
= "b.b._reqXX[0]" "b.b.req_bufarray.out[0]"
= "b.b._reqXX[1]" "b.b.req_bufarray.out[1]"
= "b.b._reqXX[2]" "b.b.req_bufarray.out[2]"
= "b.b._reqXX[3]" "b.b.req_bufarray.out[3]"
= "b.b._reqXX[4]" "b.b.req_bufarray.out[4]"
= "b.b._reqXX[0]" "b.b.t_buf_func[4].n2"
= "b.b._reqXX[0]" "b.b.f_buf_func[4].n2"
= "b.b._reqXX[0]" "b.b.t_buf_func[3].n2"
= "b.b._reqXX[0]" "b.b.f_buf_func[3].n2"
= "b.b._reqXX[0]" "b.b.t_buf_func[2].n2"
= "b.b._reqXX[0]" "b.b.f_buf_func[2].n2"
= "b.b._reqXX[0]" "b.b.t_buf_func[1].n2"
= "b.b._reqXX[0]" "b.b.f_buf_func[1].n2"
= "b.b._reqXX[0]" "b.b.t_buf_func[0].n2"
= "b.b._reqXX[0]" "b.b.f_buf_func[0].n2"
= "b.b._reqXX[0]" "b.b._reqXX[4]"
= "b.b._reqXX[0]" "b.b._reqXX[3]"
= "b.b._reqXX[0]" "b.b._reqXX[2]"
= "b.b._reqXX[0]" "b.b._reqXX[1]"
= "b.b._req" "b.b.req_buf.a"
= "b.b._req" "b.b.dly.out"
"b.b.req_bufarray.buf2.a"->"b.b.req_bufarray.buf2._y"-
~("b.b.req_bufarray.buf2.a")->"b.b.req_bufarray.buf2._y"+
"b.b.req_bufarray.buf2._y"->"b.b.req_bufarray.buf2.y"-
~("b.b.req_bufarray.buf2._y")->"b.b.req_bufarray.buf2.y"+
= "b.b.req_bufarray.supply.vdd" "b.b.req_bufarray.buf2.vdd"
= "b.b.req_bufarray.supply.vss" "b.b.req_bufarray.buf2.vss"
= "b.b.req_bufarray.out[0]" "b.b.req_bufarray.out[4]"
= "b.b.req_bufarray.out[0]" "b.b.req_bufarray.out[3]"
= "b.b.req_bufarray.out[0]" "b.b.req_bufarray.out[2]"
= "b.b.req_bufarray.out[0]" "b.b.req_bufarray.out[1]"
= "b.b.req_bufarray.out[0]" "b.b.req_bufarray.buf2.y"
= "b.b.req_bufarray.in" "b.b.req_bufarray.buf2.a"
= "b.b._reqX" "b.b.inack_ctl.c2"
= "b.b._reqX" "b.b.req_bufarray.in"
= "b.b._reqX" "b.b.req_buf.y"
= "b.b._out_a_B" "b.b.out_a_B_buf_t.in"
= "b.b._out_a_B" "b.b.out_a_B_buf_f.in"
= "b.b._out_a_B" "b.b.out_a_inv.y"
"b.b.en_buf_t.buf2.a"->"b.b.en_buf_t.buf2._y"-
~("b.b.en_buf_t.buf2.a")->"b.b.en_buf_t.buf2._y"+
"b.b.en_buf_t.buf2._y"->"b.b.en_buf_t.buf2.y"-
~("b.b.en_buf_t.buf2._y")->"b.b.en_buf_t.buf2.y"+
= "b.b.en_buf_t.supply.vdd" "b.b.en_buf_t.buf2.vdd"
= "b.b.en_buf_t.supply.vss" "b.b.en_buf_t.buf2.vss"
= "b.b.en_buf_t.out[0]" "b.b.en_buf_t.out[4]"
= "b.b.en_buf_t.out[0]" "b.b.en_buf_t.out[3]"
= "b.b.en_buf_t.out[0]" "b.b.en_buf_t.out[2]"
= "b.b.en_buf_t.out[0]" "b.b.en_buf_t.out[1]"
= "b.b.en_buf_t.out[0]" "b.b.en_buf_t.buf2.y"
= "b.b.en_buf_t.in" "b.b.en_buf_t.buf2.a"
"b.b.req_buf.a"->"b.b.req_buf._y"-
~("b.b.req_buf.a")->"b.b.req_buf._y"+
"b.b.req_buf._y"->"b.b.req_buf.y"-
~("b.b.req_buf._y")->"b.b.req_buf.y"+
= "b.b._en_X_t[0]" "b.b.en_buf_t.out[0]"
= "b.b._en_X_t[1]" "b.b.en_buf_t.out[1]"
= "b.b._en_X_t[2]" "b.b.en_buf_t.out[2]"
= "b.b._en_X_t[3]" "b.b.en_buf_t.out[3]"
= "b.b._en_X_t[4]" "b.b.en_buf_t.out[4]"
= "b.b._en_X_t[0]" "b.b.t_buf_func[4].c1"
= "b.b._en_X_t[0]" "b.b.t_buf_func[3].c1"
= "b.b._en_X_t[0]" "b.b.t_buf_func[2].c1"
= "b.b._en_X_t[0]" "b.b.t_buf_func[1].c1"
= "b.b._en_X_t[0]" "b.b.t_buf_func[0].c1"
= "b.b._en_X_t[0]" "b.b._en_X_t[4]"
= "b.b._en_X_t[0]" "b.b._en_X_t[3]"
= "b.b._en_X_t[0]" "b.b._en_X_t[2]"
= "b.b._en_X_t[0]" "b.b._en_X_t[1]"
~"b.b.f_buf_func[0].c1"&~"b.b.f_buf_func[0].c2"|~"b.b.f_buf_func[0].pr_B"->"b.b.f_buf_func[0]._y"+
"b.b.f_buf_func[0].c1"&"b.b.f_buf_func[0].c2"&"b.b.f_buf_func[0].n1"&"b.b.f_buf_func[0].n2"&"b.b.f_buf_func[0].sr_B"->"b.b.f_buf_func[0]._y"-
"b.b.f_buf_func[0]._y"->"b.b.f_buf_func[0].y"-
~("b.b.f_buf_func[0]._y")->"b.b.f_buf_func[0].y"+
~"b.b.f_buf_func[1].c1"&~"b.b.f_buf_func[1].c2"|~"b.b.f_buf_func[1].pr_B"->"b.b.f_buf_func[1]._y"+
"b.b.f_buf_func[1].c1"&"b.b.f_buf_func[1].c2"&"b.b.f_buf_func[1].n1"&"b.b.f_buf_func[1].n2"&"b.b.f_buf_func[1].sr_B"->"b.b.f_buf_func[1]._y"-
"b.b.f_buf_func[1]._y"->"b.b.f_buf_func[1].y"-
~("b.b.f_buf_func[1]._y")->"b.b.f_buf_func[1].y"+
~"b.b.f_buf_func[2].c1"&~"b.b.f_buf_func[2].c2"|~"b.b.f_buf_func[2].pr_B"->"b.b.f_buf_func[2]._y"+
"b.b.f_buf_func[2].c1"&"b.b.f_buf_func[2].c2"&"b.b.f_buf_func[2].n1"&"b.b.f_buf_func[2].n2"&"b.b.f_buf_func[2].sr_B"->"b.b.f_buf_func[2]._y"-
"b.b.f_buf_func[2]._y"->"b.b.f_buf_func[2].y"-
~("b.b.f_buf_func[2]._y")->"b.b.f_buf_func[2].y"+
~"b.b.f_buf_func[3].c1"&~"b.b.f_buf_func[3].c2"|~"b.b.f_buf_func[3].pr_B"->"b.b.f_buf_func[3]._y"+
"b.b.f_buf_func[3].c1"&"b.b.f_buf_func[3].c2"&"b.b.f_buf_func[3].n1"&"b.b.f_buf_func[3].n2"&"b.b.f_buf_func[3].sr_B"->"b.b.f_buf_func[3]._y"-
"b.b.f_buf_func[3]._y"->"b.b.f_buf_func[3].y"-
~("b.b.f_buf_func[3]._y")->"b.b.f_buf_func[3].y"+
~"b.b.f_buf_func[4].c1"&~"b.b.f_buf_func[4].c2"|~"b.b.f_buf_func[4].pr_B"->"b.b.f_buf_func[4]._y"+
"b.b.f_buf_func[4].c1"&"b.b.f_buf_func[4].c2"&"b.b.f_buf_func[4].n1"&"b.b.f_buf_func[4].n2"&"b.b.f_buf_func[4].sr_B"->"b.b.f_buf_func[4]._y"-
"b.b.f_buf_func[4]._y"->"b.b.f_buf_func[4].y"-
~("b.b.f_buf_func[4]._y")->"b.b.f_buf_func[4].y"+
~"b.b.t_buf_func[0].c1"&~"b.b.t_buf_func[0].c2"|~"b.b.t_buf_func[0].pr_B"->"b.b.t_buf_func[0]._y"+
"b.b.t_buf_func[0].c1"&"b.b.t_buf_func[0].c2"&"b.b.t_buf_func[0].n1"&"b.b.t_buf_func[0].n2"&"b.b.t_buf_func[0].sr_B"->"b.b.t_buf_func[0]._y"-
"b.b.t_buf_func[0]._y"->"b.b.t_buf_func[0].y"-
~("b.b.t_buf_func[0]._y")->"b.b.t_buf_func[0].y"+
~"b.b.t_buf_func[1].c1"&~"b.b.t_buf_func[1].c2"|~"b.b.t_buf_func[1].pr_B"->"b.b.t_buf_func[1]._y"+
"b.b.t_buf_func[1].c1"&"b.b.t_buf_func[1].c2"&"b.b.t_buf_func[1].n1"&"b.b.t_buf_func[1].n2"&"b.b.t_buf_func[1].sr_B"->"b.b.t_buf_func[1]._y"-
"b.b.t_buf_func[1]._y"->"b.b.t_buf_func[1].y"-
~("b.b.t_buf_func[1]._y")->"b.b.t_buf_func[1].y"+
~"b.b.t_buf_func[2].c1"&~"b.b.t_buf_func[2].c2"|~"b.b.t_buf_func[2].pr_B"->"b.b.t_buf_func[2]._y"+
"b.b.t_buf_func[2].c1"&"b.b.t_buf_func[2].c2"&"b.b.t_buf_func[2].n1"&"b.b.t_buf_func[2].n2"&"b.b.t_buf_func[2].sr_B"->"b.b.t_buf_func[2]._y"-
"b.b.t_buf_func[2]._y"->"b.b.t_buf_func[2].y"-
~("b.b.t_buf_func[2]._y")->"b.b.t_buf_func[2].y"+
~"b.b.t_buf_func[3].c1"&~"b.b.t_buf_func[3].c2"|~"b.b.t_buf_func[3].pr_B"->"b.b.t_buf_func[3]._y"+
"b.b.t_buf_func[3].c1"&"b.b.t_buf_func[3].c2"&"b.b.t_buf_func[3].n1"&"b.b.t_buf_func[3].n2"&"b.b.t_buf_func[3].sr_B"->"b.b.t_buf_func[3]._y"-
"b.b.t_buf_func[3]._y"->"b.b.t_buf_func[3].y"-
~("b.b.t_buf_func[3]._y")->"b.b.t_buf_func[3].y"+
~"b.b.t_buf_func[4].c1"&~"b.b.t_buf_func[4].c2"|~"b.b.t_buf_func[4].pr_B"->"b.b.t_buf_func[4]._y"+
"b.b.t_buf_func[4].c1"&"b.b.t_buf_func[4].c2"&"b.b.t_buf_func[4].n1"&"b.b.t_buf_func[4].n2"&"b.b.t_buf_func[4].sr_B"->"b.b.t_buf_func[4]._y"-
"b.b.t_buf_func[4]._y"->"b.b.t_buf_func[4].y"-
~("b.b.t_buf_func[4]._y")->"b.b.t_buf_func[4].y"+
= "Vdd" "b.b.supply.vdd"
= "GND" "b.b.supply.vss"
= "b._reset_B" "b.b.reset_B"
= "b.dly_cfg[0]" "b.b.dly_cfg[0]"
= "b.dly_cfg[1]" "b.b.dly_cfg[1]"
= "b.dly_cfg[2]" "b.b.dly_cfg[2]"
= "b.dly_cfg[3]" "b.b.dly_cfg[3]"
= "b.out.d.d[0].d[0]" "b.out.d.d[0].f"
= "b.out.d.d[0].d[1]" "b.out.d.d[0].t"
= "b.out.d.d[1].d[0]" "b.out.d.d[1].f"
= "b.out.d.d[1].d[1]" "b.out.d.d[1].t"
= "b.out.d.d[2].d[0]" "b.out.d.d[2].f"
= "b.out.d.d[2].d[1]" "b.out.d.d[2].t"
= "b.out.d.d[3].d[0]" "b.out.d.d[3].f"
= "b.out.d.d[3].d[1]" "b.out.d.d[3].t"
= "b.out.d.d[4].d[0]" "b.out.d.d[4].f"
= "b.out.d.d[4].d[1]" "b.out.d.d[4].t"
= "b.out.d.d[4].d[0]" "b.out.d.d[4].f"
= "b.out.d.d[4].d[1]" "b.out.d.d[4].t"
= "b.out.d.d[3].d[0]" "b.out.d.d[3].f"
= "b.out.d.d[3].d[1]" "b.out.d.d[3].t"
= "b.out.d.d[2].d[0]" "b.out.d.d[2].f"
= "b.out.d.d[2].d[1]" "b.out.d.d[2].t"
= "b.out.d.d[1].d[0]" "b.out.d.d[1].f"
= "b.out.d.d[1].d[1]" "b.out.d.d[1].t"
= "b.out.d.d[0].d[0]" "b.out.d.d[0].f"
= "b.out.d.d[0].d[1]" "b.out.d.d[0].t"
= "b.out.d.d[4].d[0]" "b.out.d.d[4].f"
= "b.out.d.d[4].d[1]" "b.out.d.d[4].t"
= "b.out.d.d[3].d[0]" "b.out.d.d[3].f"
= "b.out.d.d[3].d[1]" "b.out.d.d[3].t"
= "b.out.d.d[2].d[0]" "b.out.d.d[2].f"
= "b.out.d.d[2].d[1]" "b.out.d.d[2].t"
= "b.out.d.d[1].d[0]" "b.out.d.d[1].f"
= "b.out.d.d[1].d[1]" "b.out.d.d[1].t"
= "b.out.d.d[0].d[0]" "b.out.d.d[0].f"
= "b.out.d.d[0].d[1]" "b.out.d.d[0].t"
= "b.out.v" "b.b.out.v"
= "b.out.a" "b.b.out.a"
= "b.out.d.d[0].f" "b.b.out.d.d[0].f"
= "b.out.d.d[0].t" "b.b.out.d.d[0].t"
= "b.out.d.d[0].d[0]" "b.b.out.d.d[0].d[0]"
= "b.out.d.d[0].d[1]" "b.b.out.d.d[0].d[1]"
= "b.out.d.d[1].f" "b.b.out.d.d[1].f"
= "b.out.d.d[1].t" "b.b.out.d.d[1].t"
= "b.out.d.d[1].d[0]" "b.b.out.d.d[1].d[0]"
= "b.out.d.d[1].d[1]" "b.b.out.d.d[1].d[1]"
= "b.out.d.d[2].f" "b.b.out.d.d[2].f"
= "b.out.d.d[2].t" "b.b.out.d.d[2].t"
= "b.out.d.d[2].d[0]" "b.b.out.d.d[2].d[0]"
= "b.out.d.d[2].d[1]" "b.b.out.d.d[2].d[1]"
= "b.out.d.d[3].f" "b.b.out.d.d[3].f"
= "b.out.d.d[3].t" "b.b.out.d.d[3].t"
= "b.out.d.d[3].d[0]" "b.b.out.d.d[3].d[0]"
= "b.out.d.d[3].d[1]" "b.b.out.d.d[3].d[1]"
= "b.out.d.d[4].f" "b.b.out.d.d[4].f"
= "b.out.d.d[4].t" "b.b.out.d.d[4].t"
= "b.out.d.d[4].d[0]" "b.b.out.d.d[4].d[0]"
= "b.out.d.d[4].d[1]" "b.b.out.d.d[4].d[1]"
= "b.out.d.d[4].d[0]" "b.out.d.d[4].f"
= "b.out.d.d[4].d[1]" "b.out.d.d[4].t"
= "b.out.d.d[3].d[0]" "b.out.d.d[3].f"
= "b.out.d.d[3].d[1]" "b.out.d.d[3].t"
= "b.out.d.d[2].d[0]" "b.out.d.d[2].f"
= "b.out.d.d[2].d[1]" "b.out.d.d[2].t"
= "b.out.d.d[1].d[0]" "b.out.d.d[1].f"
= "b.out.d.d[1].d[1]" "b.out.d.d[1].t"
= "b.out.d.d[0].d[0]" "b.out.d.d[0].f"
= "b.out.d.d[0].d[1]" "b.out.d.d[0].t"
timing("b.in.a"-,"b.in.d[0]","b.in.r"+)
timing("b.in.a"-,"b.in.d[1]","b.in.r"+)
timing("b.in.a"-,"b.in.d[2]","b.in.r"+)
timing("b.in.a"-,"b.in.d[3]","b.in.r"+)
timing("b.in.a"-,"b.in.d[4]","b.in.r"+)
= "b.in.a" "b.b.in.a"
= "b.in.r" "b.b.in.r"
= "b.in.d[0]" "b.b.in.d[0]"
= "b.in.d[1]" "b.b.in.d[1]"
= "b.in.d[2]" "b.b.in.d[2]"
= "b.in.d[3]" "b.b.in.d[3]"
= "b.in.d[4]" "b.b.in.d[4]"

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@ -0,0 +1,45 @@
/*************************************************************************
*
* This file is part of ACT dataflow neuro library.
* It's the testing facility for cell_lib_std.act
*
* Copyright (c) 2022 University of Groningen - Ole Richter
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
* Copyright (c) 2022 University of Groningen - Michele Mastella
* Copyright (c) 2022 University of Groningen - Madison Cotteret
*
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
*
* You may redistribute and modify this documentation and make products
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
* for applicable conditions.
*
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
*
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
* these sources, You must maintain the Source Location visible in its
* documentation.
*
**************************************************************************
*/
import "../../dataflow_neuro/interfaces.act";
import globals;
open tmpl::dataflow_neuro;
defproc bd2qdi_5(bd<5> in; avMx1of2<5> out; bool? dly_cfg[4])
{
bool _reset_B;
prs {
Reset => _reset_B-
}
bd2qdi<5,4> b(.in = in, .out = out, .reset_B = _reset_B, .dly_cfg = dly_cfg);
b.supply.vdd = Vdd;
b.supply.vss = GND;
}
bd2qdi_5 b;

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watchall
set b.out.a 0
set b.out.v 0
set b.in.r 0
set b.dly_cfg[0] 1
set b.dly_cfg[1] 1
set b.dly_cfg[2] 1
set b.dly_cfg[3] 1
set b.in.d[0] 1
set b.in.d[1] 0
set b.in.d[2] 0
set b.in.d[3] 1
set b.in.d[4] 0
set Reset 0
cycle
system "echo '[] set Reset 1'"
set Reset 1
cycle
system "echo '[] set Reset 0'"
set Reset 0
mode run
cycle
status X
assert-qdi-channel-neutral "b.out" 5
assert b.in.a 0
system "echo '[] Reset finished, setting data'"
set b.in.d[0] 0
set b.in.d[1] 1
set b.in.d[2] 1
set b.in.d[3] 0
set b.in.d[4] 1
cycle
system "echo '[] Reset finished, setting req 1'"
set b.in.r 1
cycle
assert-qdi-channel-valid "b.out" 5 22
system "echo '[] Receiving val out'"
set b.out.v 1
# set b.out.a 1
cycle
assert-qdi-channel-valid "b.out" 5 22
assert b.in.a 1
system "echo '[] Changing some input data'"
set b.in.d[0] 1
set b.in.d[1] 1
set b.in.d[2] 1
cycle
system "echo '[] Removing req'"
set b.in.r 0
system "echo '[] Changing more data'"
set b.in.d[3] 0
set b.in.d[4] 0
cycle
assert-qdi-channel-valid "b.out" 5 22
system "echo '[] Receiving ack out'"
set b.out.a 1
cycle
assert-qdi-channel-neutral "b.out" 5
set b.out.v 0
cycle
assert b.in.a 0
system "echo '[] Set ack out 0'"
set b.out.a 0
cycle
assert-qdi-channel-neutral "b.out" 5
assert b.in.a 0
system "echo '[] Again!!! setting data'"
set b.in.d[0] 0
set b.in.d[1] 0
set b.in.d[2] 0
set b.in.d[3] 0
set b.in.d[4] 0
cycle
system "echo '[] Again!!! setting req 1'"
set b.in.r 1
cycle
assert-qdi-channel-valid "b.out" 5 0
system "echo '[] Receiving val out'"
set b.out.v 1
# set b.out.a 1
cycle
assert-qdi-channel-valid "b.out" 5 0
assert b.in.a 1
system "echo '[] Changing some input data'"
set b.in.d[0] 1
set b.in.d[1] 1
set b.in.d[2] 1
cycle
system "echo '[] Removing req'"
set b.in.r 0
system "echo '[] Changing more data'"
set b.in.d[3] 0
set b.in.d[4] 0
cycle
assert-qdi-channel-valid "b.out" 5 0
system "echo '[] Receiving ack out'"
set b.out.a 1
cycle
assert-qdi-channel-neutral "b.out" 5
set b.out.v 0
cycle
assert b.in.a 0
system "echo '[] Set ack out 0'"
set b.out.a 0
cycle
assert-qdi-channel-neutral "b.out" 5
assert b.in.a 0

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/*************************************************************************
*
* This file is part of ACT dataflow neuro library.
* It's the testing facility for cell_lib_std.act
*
* Copyright (c) 2022 University of Groningen - Ole Richter
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
* Copyright (c) 2022 University of Groningen - Michele Mastella
* Copyright (c) 2022 University of Groningen - Madison Cotteret
*
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
*
* You may redistribute and modify this documentation and make products
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
* for applicable conditions.
*
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
*
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
* these sources, You must maintain the Source Location visible in its
* documentation.
*
**************************************************************************
*/
import "../../dataflow_neuro/coders.act";
import globals;
import std::data;
open std::data;
open tmpl::dataflow_neuro;
defproc encoder2D_2x2 (a1of1 x[8]; a1of1 y[7]; avMx1of2<6> out){
encoder2D<3, 3, 8, 7, 1> e(.x=x, .y=y, .out=out);
bool _reset_B;
prs {
Reset => _reset_B-
}
e.supply.vss = GND;
e.supply.vdd = Vdd;
e.reset_B = _reset_B;
}
encoder2D_2x2 e;

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watchall
mode run
system "echo '[] Set Out Ack/Valid Low'"
set e.out.a 0
set e.out.v 0
cycle
system "echo '[] Setting Neuron Req Low'"
set e.y[0].r 0
set e.y[1].r 0
set e.y[2].r 0
set e.y[3].r 0
set e.y[4].r 0
set e.y[5].r 0
set e.y[6].r 0
# set e.y[7].r 0
set e.x[0].r 0
set e.x[1].r 0
set e.x[2].r 0
set e.x[3].r 0
set e.x[4].r 0
set e.x[5].r 0
set e.x[6].r 0
set e.x[7].r 0
cycle
# # Slightly confused as to whether Reset should be set to 1 given A_2C_RB_X1 needs active high to change y
# # status X
# # set Reset 1
# # cycle
cycle
mode run
status X
status 0
set Reset 0
cycle
system "echo '[] Single Neuron Spikes (2,5), raise y[5].r'"
set e.y[5].r 1
# set e.x[2].r 1
cycle
assert e.e.Yarb.out.r 1
assert e.e.Xarb.out.r 0
assert e.e._x_v 0
system "echo '[] Raise x[2].r'"
# set e.y[5].r 1
set e.x[2].r 1
cycle
assert e.e.Yarb.out.r 1
assert e.e.Xarb.out.r 1
assert e.e._x_v 1
system "echo '[] Check Arbiter Acks'"
assert e.e._x_a_B 1
assert e.y[0].a 0
assert e.y[1].a 0
assert e.y[2].a 0
assert e.y[3].a 0
assert e.y[4].a 0
assert e.y[5].a 1
assert e.y[6].a 0
# assert e.y[7].a 0
assert e.e.Yarb.out.a 1
assert e.x[0].a 0
assert e.x[1].a 0
assert e.x[2].a 1
assert e.x[3].a 0
assert e.x[4].a 0
assert e.x[5].a 0
assert e.x[6].a 0
assert e.x[7].a 0
assert e.e.Xarb.out.a 1
system "echo '[] Check Encoders'"
assert e.e.x_enc_out.d[0].t 0
assert e.e.x_enc_out.d[0].f 1
assert e.e.x_enc_out.d[1].t 1
assert e.e.x_enc_out.d[1].f 0
assert e.e.x_enc_out.d[2].t 0
assert e.e.x_enc_out.d[2].f 1
assert e.e.y_enc_out.d[0].t 1
assert e.e.y_enc_out.d[0].f 0
assert e.e.y_enc_out.d[1].t 0
assert e.e.y_enc_out.d[1].f 1
assert e.e.y_enc_out.d[2].t 1
assert e.e.y_enc_out.d[2].f 0
system "echo '[] Check Buffer'"
assert e.e._in_x_v 1
assert e.e._in_y_v 1
assert e.e._en 1
assert e.out.d.d[0].t 0
assert e.out.d.d[0].f 1
assert e.out.d.d[1].t 1
assert e.out.d.d[1].f 0
assert e.out.d.d[2].t 0
assert e.out.d.d[2].f 1
assert e.out.d.d[3].t 1
assert e.out.d.d[3].f 0
assert e.out.d.d[4].t 0
assert e.out.d.d[4].f 1
assert e.out.d.d[5].t 1
assert e.out.d.d[5].f 0
system "echo '[] Finish Neuron Handshake'"
set e.y[5].r 0
set e.x[2].r 0
cycle
assert e.e.Yarb.out.r 0
assert e.e.Xarb.out.r 0
set e.out.a 1
set e.out.v 1
cycle
assert e.e.Yarb.out.a 0
assert e.e.Xarb.out.a 0
assert e.y[5].a 0
assert e.x[2].a 0
set e.out.a 0
set e.out.v 0
cycle
system "echo '[] Neuron (2,5) Encoded'"
system "echo '[] Single Neuron Spikes (0,0)'"
set e.y[0].r 1
set e.x[0].r 1
cycle
assert e.e.Yarb.out.r 1
assert e.e.Xarb.out.r 1
assert e.e._x_v 1
system "echo '[] Check Arbiter Acks'"
assert e.e._x_a_B 1
assert e.y[0].a 1
assert e.y[1].a 0
assert e.y[2].a 0
assert e.y[3].a 0
assert e.y[4].a 0
assert e.y[5].a 0
assert e.y[6].a 0
# assert e.y[7].a 0
assert e.e.Yarb.out.a 1
assert e.x[0].a 1
assert e.x[1].a 0
assert e.x[2].a 0
assert e.x[3].a 0
assert e.x[4].a 0
assert e.x[5].a 0
assert e.x[6].a 0
assert e.x[7].a 0
assert e.e.Xarb.out.a 1
system "echo '[] Check Encoders'"
assert e.e.y_enc_out.d[0].t 0
assert e.e.y_enc_out.d[0].f 1
assert e.e.y_enc_out.d[1].t 0
assert e.e.y_enc_out.d[1].f 1
assert e.e.y_enc_out.d[2].t 0
assert e.e.y_enc_out.d[2].f 1
assert e.e.x_enc_out.d[0].t 0
assert e.e.x_enc_out.d[0].f 1
assert e.e.x_enc_out.d[1].t 0
assert e.e.x_enc_out.d[1].f 1
assert e.e.x_enc_out.d[2].t 0
assert e.e.x_enc_out.d[2].f 1
system "echo '[] Check Buffer'"
assert e.e._in_x_v 1
assert e.e._in_y_v 1
assert e.e._en 1
assert e.out.d.d[0].t 0
assert e.out.d.d[0].f 1
assert e.out.d.d[1].t 0
assert e.out.d.d[1].f 1
assert e.out.d.d[2].t 0
assert e.out.d.d[2].f 1
assert e.out.d.d[3].t 0
assert e.out.d.d[3].f 1
assert e.out.d.d[4].t 0
assert e.out.d.d[4].f 1
assert e.out.d.d[5].t 0
assert e.out.d.d[5].f 1
system "echo '[] Finish Neuron Handshake'"
set e.y[0].r 0
set e.x[0].r 0
cycle
assert e.e.Yarb.out.r 0
assert e.e.Xarb.out.r 0
set e.out.a 1
set e.out.v 1
cycle
assert e.e.Yarb.out.a 0
assert e.e.Xarb.out.a 0
assert e.y[0].a 0
assert e.x[0].a 0
set e.out.a 0
set e.out.v 0
cycle
system "echo '[] Neuron (0,0) Encoded'"

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@ -34,21 +34,36 @@ cycle
# # cycle # # cycle
cycle cycle
mode run
status X
status 0
set Reset 0 set Reset 0
cycle cycle
system "echo '[] Single Neuron Spikes (2,5)'"
system "echo '[] Single Neuron Spikes (2,5), raise y[5].r'"
set e.y[5].r 1 set e.y[5].r 1
set e.x[2].r 1 # set e.x[2].r 1
cycle cycle
assert e.e.Yarb.out.r 1 assert e.e.Yarb.out.r 1
assert e.e.Xarb.out.r 1 assert e.e.Xarb.out.r 0
assert e.e._x_v 0
system "echo '[] Raise x[2].r'"
# set e.y[5].r 1
set e.x[2].r 1
cycle
assert e.e.Yarb.out.r 1
assert e.e.Xarb.out.r 1
assert e.e._x_v 1 assert e.e._x_v 1
system "echo '[] Check Arbiter Acks'" system "echo '[] Check Arbiter Acks'"
assert e.e._x_a_B 1 assert e.e._x_a_B 1
@ -76,13 +91,6 @@ assert e.e.Xarb.out.a 1
system "echo '[] Check Encoders'" system "echo '[] Check Encoders'"
assert e.e.y_enc_out.d[0].t 1
assert e.e.y_enc_out.d[0].f 0
assert e.e.y_enc_out.d[1].t 0
assert e.e.y_enc_out.d[1].f 1
assert e.e.y_enc_out.d[2].t 1
assert e.e.y_enc_out.d[2].f 0
assert e.e.x_enc_out.d[0].t 0 assert e.e.x_enc_out.d[0].t 0
assert e.e.x_enc_out.d[0].f 1 assert e.e.x_enc_out.d[0].f 1
assert e.e.x_enc_out.d[1].t 1 assert e.e.x_enc_out.d[1].t 1
@ -90,6 +98,13 @@ assert e.e.x_enc_out.d[1].f 0
assert e.e.x_enc_out.d[2].t 0 assert e.e.x_enc_out.d[2].t 0
assert e.e.x_enc_out.d[2].f 1 assert e.e.x_enc_out.d[2].f 1
assert e.e.y_enc_out.d[0].t 1
assert e.e.y_enc_out.d[0].f 0
assert e.e.y_enc_out.d[1].t 0
assert e.e.y_enc_out.d[1].f 1
assert e.e.y_enc_out.d[2].t 1
assert e.e.y_enc_out.d[2].f 0
system "echo '[] Check Buffer'" system "echo '[] Check Buffer'"
assert e.e._in_x_v 1 assert e.e._in_x_v 1

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@ -0,0 +1,98 @@
/*************************************************************************
*
* This file is part of ACT dataflow neuro library.
* It's the testing facility for cell_lib_std.act
*
* Copyright (c) 2022 University of Groningen - Ole Richter
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
* Copyright (c) 2022 University of Groningen - Michele Mastella
* Copyright (c) 2022 University of Groningen - Madison Cotteret
*
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
*
* You may redistribute and modify this documentation and make products
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
* for applicable conditions.
*
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
*
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
* these sources, You must maintain the Source Location visible in its
* documentation.
*
**************************************************************************
*/
import "../../dataflow_neuro/coders.act";
import "../../dataflow_neuro/primitives.act";
import globals;
import std::data;
open std::data;
open tmpl::dataflow_neuro;
defproc fifo_decoder_neurons_encoder_fifo (avMx1of2<7> in; avMx1of2<7> out; bool? dly_cfg[6]){
bool _reset_B;
prs {
Reset => _reset_B-
}
power supply;
supply.vdd = Vdd;
supply.vss = GND;
pint NxC,NyC,Nx,Ny;
NxC = 4;
NyC = 3;
Nx = 1<<NxC;
Ny = 1<<NyC;
fifo<NxC + NyC,5> fifo_pre(.in = in, .reset_B = _reset_B, .supply = supply);
decoder_2d_dly<NxC,NyC,Nx,Ny,6> decoder(.in = fifo_pre.out, .dly_cfg = dly_cfg,
.reset_B = _reset_B, .supply = supply);
and_grid<Nx, Ny> _and_grid(.inx = decoder.outx, .iny = decoder.outy, .supply = supply);
// Pretend that each "synapse" immediately makes its one neuron "spike".
// that is, connect the output of each encoder target to the decoder input.
nrn_hs_2D_array<Nx,Ny,10> neuron_grid(.reset_B = _reset_B, .supply = supply);
(i:Nx*Ny:
// Connect the output bool to the input req of each neuron handshaker
// Leave ack dangling.
neuron_grid.in[i].r = _and_grid.out[i];
)
encoder2D<NxC,NyC,Nx,Ny,4> encoder(.inx = neuron_grid.outx, .iny = neuron_grid.outy,
.reset_B = _reset_B, .supply = supply);
fifo<NxC + NyC,5> fifo_post(.in = encoder.out, .out = out, .reset_B = _reset_B, .supply = supply);
}
// defproc fifo_decoder_and (avMx1of2<7> in; bool! out[8*16]; bool? dly_cfg[6]){
// bool _reset_B;
// prs {
// Reset => _reset_B-
// }
// power supply;
// supply.vdd = Vdd;
// supply.vss = GND;
// pint NxC,NyC,Nx,Ny;
// NxC = 4;
// NyC = 3;
// Nx = 1<<NxC;
// Ny = 1<<NyC;
// fifo<NxC + NyC,5> fifo_pre(.in = in, .reset_B = _reset_B, .supply = supply);
// decoder_2d_dly<NxC,NyC,Nx,Ny,6> decoder(.in = fifo_pre.out, .dly_cfg = dly_cfg,
// .reset_B = _reset_B, .supply = supply);
// and_grid<Nx, Ny> _and_grid(.inx = decoder.outx, .iny = decoder.outy, .out = out, .supply = supply);
// nrn_hs_2D_array<Nx,Ny,16> nrn_array(.reset_B = _reset_B, .supply = supply);
// }
// fifo_decoder_neurons_encoder_fifo e;
fifo_decoder_neurons_encoder_fifo e;

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@ -0,0 +1,81 @@
watchall
set e.out.a 0
set e.out.v 0
set-qdi-channel-neutral "e.in" 7
set Reset 1
set e.dly_cfg[0] 1
set e.dly_cfg[1] 1
set e.dly_cfg[2] 1
set e.dly_cfg[3] 1
set e.dly_cfg[4] 1
set e.dly_cfg[5] 1
cycle
mode run
system "echo '[] Set reset 0'"
status X
set Reset 0
cycle
system "echo '[] Sending in a packet'"
set-qdi-channel-valid "e.in" 7 75
cycle
assert-qdi-channel-valid "e.out" 7 75
assert e.in.a 1
assert e.in.v 1
system "echo '[] Removing input'"
set-qdi-channel-neutral "e.in" 7
cycle
assert e.in.a 0
assert e.in.v 0
system "echo '[] Sending in another packet'"
set-qdi-channel-valid "e.in" 7 22
cycle
# Output is still the first packet
assert-qdi-channel-valid "e.out" 7 75
assert e.in.a 1
assert e.in.v 1
system "echo '[] Removing input'"
set-qdi-channel-neutral "e.in" 7
cycle
assert e.in.a 0
assert e.in.v 0
system "echo '[] Giving out ack'"
set e.out.a 1
set e.out.v 1
cycle
assert-qdi-channel-neutral "e.out" 7
system "echo '[] Removing ack'"
set e.out.a 0
set e.out.v 0
cycle
assert-qdi-channel-valid "e.out" 7 22
system "echo '[] Giving out ack'"
set e.out.a 1
set e.out.v 1
cycle
assert-qdi-channel-neutral "e.out" 7
system "echo '[] Removing ack'"
set e.out.a 0
set e.out.v 0
cycle
assert-qdi-channel-neutral "e.out" 7

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@ -0,0 +1,46 @@
/*************************************************************************
*
* This file is part of ACT dataflow neuro library.
* It's the testing facility for cell_lib_std.act
*
* Copyright (c) 2022 University of Groningen - Ole Richter
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
* Copyright (c) 2022 University of Groningen - Michele Mastella
* Copyright (c) 2022 University of Groningen - Madison Cotteret
*
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
*
* You may redistribute and modify this documentation and make products
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
* for applicable conditions.
*
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
*
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
* these sources, You must maintain the Source Location visible in its
* documentation.
*
**************************************************************************
*/
import "../../dataflow_neuro/coders.act";
import globals;
open tmpl::dataflow_neuro;
defproc nrn_hs_2D_array_3x5(a1of1 in[15]; a1of1 outx[3], outy[5])
{
bool _reset_B;
prs {
Reset => _reset_B-
}
nrn_hs_2D_array<3,5,5> b(.in = in, .outx = outx, .outy = outy);
b.supply.vdd = Vdd;
b.supply.vss = GND;
b.reset_B = _reset_B;
}
nrn_hs_2D_array_3x5 b;

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@ -0,0 +1,202 @@
watchall
set b.in[0].r 0
set b.in[1].r 0
set b.in[2].r 0
set b.in[3].r 0
set b.in[4].r 0
set b.in[5].r 0
set b.in[6].r 0
set b.in[7].r 0
set b.in[8].r 0
set b.in[9].r 0
set b.in[10].r 0
set b.in[11].r 0
set b.in[12].r 0
set b.in[13].r 0
set b.in[14].r 0
set b.outx[0].a 0
set b.outx[1].a 0
set b.outx[2].a 0
set b.outy[0].a 0
set b.outy[1].a 0
set b.outy[2].a 0
set b.outy[3].a 0
set b.outy[4].a 0
set b.outx[0].r 1
set b.outx[1].r 1
set b.outx[2].r 1
set b.outy[0].r 1
set b.outy[1].r 1
set b.outy[2].r 1
set b.outy[3].r 1
set b.outy[4].r 0
set b.b.neurons[0]._en 0
set b.b.neurons[0]._req 1
# set Reset 0
cycle
system "echo '[] set Reset 1'"
set Reset 1
cycle
status X
system "echo '[] set Reset 0'"
set Reset 0
mode run
cycle
assert b.outx[0].r 0
assert b.outx[1].r 0
assert b.outx[2].r 0
assert b.outy[0].r 0
assert b.outy[1].r 0
assert b.outy[2].r 0
assert b.outy[3].r 0
assert b.outy[4].r 0
system "echo '[] Neurons 0,1,3 spike'"
set b.in[0].r 1
set b.in[1].r 1
set b.in[3].r 1
cycle
assert b.outx[0].r 0
assert b.outx[1].r 0
assert b.outx[2].r 0
assert b.outy[0].r 1
assert b.outy[1].r 1
assert b.outy[2].r 0
assert b.outy[3].r 0
assert b.outy[4].r 0
assert b.in[0].a 1
assert b.in[1].a 1
assert b.in[3].a 1
system "echo '[] removing in reqs'"
set b.in[0].r 0
set b.in[1].r 0
set b.in[3].r 0
cycle
assert b.in[0].a 0
assert b.in[1].a 0
assert b.in[3].a 0
system "echo '[] y0 chosen, give ack'"
set b.outy[0].a 1
cycle
assert b.outx[0].r 1
assert b.outx[1].r 1
assert b.outx[2].r 0
assert b.outy[0].r 0
assert b.outy[1].r 1
assert b.outy[2].r 0
assert b.outy[3].r 0
assert b.outy[4].r 0
system "echo '[] x0 chosen, give ack'"
set b.outx[0].a 1
cycle
assert b.outx[0].r 0
assert b.outx[1].r 1
assert b.outx[2].r 0
assert b.outy[0].r 0
assert b.outy[1].r 1
assert b.outy[2].r 0
assert b.outy[3].r 0
assert b.outy[4].r 0
system "echo '[] remove x ack'"
set b.outx[0].a 0
cycle
assert b.outx[0].r 0
assert b.outx[1].r 1
assert b.outx[2].r 0
assert b.outy[0].r 0
assert b.outy[1].r 1
assert b.outy[2].r 0
assert b.outy[3].r 0
assert b.outy[4].r 0
system "echo '[] x1 remaining, give ack'"
set b.outx[1].a 1
cycle
assert b.outx[0].r 0
assert b.outx[1].r 0
assert b.outx[2].r 0
assert b.outy[0].r 0
assert b.outy[1].r 1
assert b.outy[2].r 0
assert b.outy[3].r 0
assert b.outy[4].r 0
system "echo '[] remove acks'"
set b.outx[1].a 0
set b.outy[0].a 0
cycle
assert b.outx[0].r 0
assert b.outx[1].r 0
assert b.outx[2].r 0
assert b.outy[0].r 0
assert b.outy[1].r 1
assert b.outy[2].r 0
assert b.outy[3].r 0
assert b.outy[4].r 0
system "echo '[] y1 remaining, give ack'"
set b.outy[1].a 1
cycle
assert b.outx[0].r 1
assert b.outx[1].r 0
assert b.outx[2].r 0
assert b.outy[0].r 0
assert b.outy[1].r 0
assert b.outy[2].r 0
assert b.outy[3].r 0
assert b.outy[4].r 0
system "echo '[] x0 req, give ack'"
set b.outx[0].a 1
cycle
assert b.outx[0].r 0
assert b.outx[1].r 0
assert b.outx[2].r 0
assert b.outy[0].r 0
assert b.outy[1].r 0
assert b.outy[2].r 0
assert b.outy[3].r 0
assert b.outy[4].r 0
system "echo '[] remove acks'"
set b.outx[0].a 0
set b.outy[1].a 0
cycle
assert b.outx[0].r 0
assert b.outx[1].r 0
assert b.outx[2].r 0
assert b.outy[0].r 0
assert b.outy[1].r 0
assert b.outy[2].r 0
assert b.outy[3].r 0
assert b.outy[4].r 0

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b.b.buf.vc.ct.in[2] b.in.d.d[3].f b.in.d.d[1].t b.b.dly.dly[9].__y b.b.buf.vc.ct.tmp[6] b.in.d.d[0].t b.b.dly.dly[11].__y b.b.buf._out_a_BX_f[0] b.b.dly.dly[4]._y b.b.dly.dly[13].y b.b.dly.dly[11].y b.dly_cfg[2] b.b.buf._in_v b.b.dly.dly[7].___y b.b.buf._out_a_B b.in.d.d[1].f b.b.dly._a[1] b.in.d.d[0].f b.in.d.d[2].t b.in.d.d[3].t b.b.dly.dly[8].__y b.b.dly.dly[4].___y b.in.d.d[4].f b.dly_cfg[0] b.b.dly.dly[8]._y b.b.buf._out_a_BX_t[0] b.in.d.d[2].f b.dly_cfg[3] b.b.dly.dly[10].y b.b.dly.dly[6]._y b.b.buf.vc.ct.in[0] b.b.dly.dly[7].y b.b.buf.vc.ct.C2Els[0]._y b.b.dly._a[3] b.b.dly.dly[5].y b.in.v b.b.dly.dly[12].___y b.b.dly.dly[12].y b.b.buf.in_v_buf._y b.b.buf.vc.ct.in[4] b.b.dly.dly[9].___y b.b.dly.dly[6].y b.b.dly.dly[2].y b.b.dly.dly[14].___y b.b.dly.mu2[0]._y b.b.buf.vc.OR2_tf[1]._y b.b.dly.dly[6].___y b.out.a b.b.dly.mu2[3]._y b.b.buf.vc.OR2_tf[2]._y b.b.dly.mu2[1]._s b.in.d.d[4].t b.b.dly.dly[4].y b.b.dly.and2[3]._y b.b.dly.dly[13].___y b.b.dly.mu2[2]._y b.b.dly.dly[14].__y b.b.buf.vc.OR2_tf[3]._y b.b.buf.vc.ct.in[1] b.b.dly.dly[7]._y b.b.buf.vc.ct.C2Els[1]._y b.out.r b.b.buf.vc.ct.C3Els[0]._y b.b.dly.dly[4].__y b.b.buf.vc.ct.tmp[5] b.b.dly.dly[1].y b.b.dly.dly[12].__y b.b.buf.vc.OR2_tf[4]._y b.b.dly.dly[12]._y b.b.dly.dly[14]._y b.b.buf.vc.ct.in[3] b.b.dly.dly[2].___y b.b.dly.mu2[2]._s b.b.dly.dly[10].___y b.b.dly.dly[3].y b.b.dly.dly[6].__y b.b.buf.out_a_B_buf_f.buf2._y b.b.dly.mu2[0]._s b.b.dly.dly[5].__y b.b.dly.dly[3].a b.b.dly.mu2[3].b b.dly_cfg[1] b.b.dly.dly[7].a b.b.dly.dly[8].y b.b.dly.mu2[1]._y b.b.dly.dly[3].___y b.b.buf.vc.OR2_tf[0]._y b.b.dly.mu2[3]._s b.b.dly._a[2] b.b.buf.out_a_B_buf_t.buf2._y b.b.dly.dly[1].___y b.b.dly.dly[2]._y b.b.dly.dly[7].__y b.b.dly.dly[1].a b.b.dly.dly[8].___y b.b.dly.dly[3]._y b.b.dly.dly[10].__y b.b.dly.dly[5]._y b.b.dly.dly[1]._y b.b.dly.dly[11]._y b.b.dly.and2[1]._y b.b.dly.dly[1].__y b.b.dly.dly[9].y b.b.dly.dly[13]._y b.b.dly.and2[2]._y b.b.dly.dly[11].___y b.b.dly.dly[2].__y b.b.dly.dly[5].___y b.b.dly.dly[3].__y b.b.dly.dly[13].__y b.b.dly.dly[9]._y b.b.dly.dly[10]._y
277130 b.out.a : 0
277130 Reset : 0
277130 b.in.d.d[0].t : 0
277130 b.in.d.d[2].t : 0
277130 b.dly_cfg[3] : 1
277130 b.dly_cfg[2] : 1
277130 b.in.d.d[2].f : 0
277130 b.dly_cfg[1] : 1
277130 b.dly_cfg[0] : 1
277130 b.in.d.d[0].f : 0
277130 b.in.d.d[1].t : 0
277130 b.in.d.d[4].t : 0
277130 b.in.d.d[4].f : 0
277130 b.in.d.d[1].f : 0
277130 b.in.d.d[3].t : 0
277130 b.in.d.d[3].f : 0
277131 b.b.buf.vc.OR2_tf[1]._y : 1 [by b.in.d.d[1].f:=0]
277141 b.b.dly.mu2[1]._s : 0 [by b.dly_cfg[1]:=1]
277145 b.b.buf.vc.OR2_tf[4]._y : 1 [by b.in.d.d[4].f:=0]
277167 b.b.buf.vc.OR2_tf[3]._y : 1 [by b.in.d.d[3].f:=0]
277199 b.b.buf.vc.OR2_tf[2]._y : 1 [by b.in.d.d[2].f:=0]
277239 b.b.buf.vc.ct.in[2] : 0 [by b.b.buf.vc.OR2_tf[2]._y:=1]
277257 b.b.buf.vc.ct.in[4] : 0 [by b.b.buf.vc.OR2_tf[4]._y:=1]
277269 b.b.dly.mu2[3]._s : 0 [by b.dly_cfg[3]:=1]
277333 b.b.buf._out_a_B : 1 [by b.out.a:=0]
277334 b.b.buf.vc.OR2_tf[0]._y : 1 [by b.in.d.d[0].f:=0]
277420 b.b.buf.out_a_B_buf_f.buf2._y : 0 [by b.b.buf._out_a_B:=1]
277421 b.b.buf._out_a_BX_t[0] : 1 [by b.b.buf.out_a_B_buf_f.buf2._y:=0]
277590 b.b.buf.out_a_B_buf_t.buf2._y : 0 [by b.b.buf._out_a_B:=1]
277628 b.b.buf.vc.ct.in[0] : 0 [by b.b.buf.vc.OR2_tf[0]._y:=1]
277870 b.b.buf.vc.ct.in[1] : 0 [by b.b.buf.vc.OR2_tf[1]._y:=1]
278984 b._reset_B : 1 [by Reset:=0]
279396 b.b.buf._out_a_BX_f[0] : 1 [by b.b.buf.out_a_B_buf_t.buf2._y:=0]
279877 b.b.buf.vc.ct.C2Els[0]._y : 1 [by b.b.buf.vc.ct.in[1]:=0]
280193 b.b.buf.reset_buf._y : 0 [by b._reset_B:=1]
280371 b.b.buf._reset_BX : 1 [by b.b.buf.reset_buf._y:=0]
280467 b.b.buf.vc.ct.tmp[5] : 0 [by b.b.buf.vc.ct.C2Els[0]._y:=1]
281174 b.b.buf.reset_bufarray.buf2._y : 0 [by b.b.buf._reset_BX:=1]
281338 b.b.buf._reset_BXX[0] : 1 [by b.b.buf.reset_bufarray.buf2._y:=0]
313476 b.b.dly.mu2[2]._s : 0 [by b.dly_cfg[2]:=1]
324679 b.b.buf.vc.ct.in[3] : 0 [by b.b.buf.vc.OR2_tf[3]._y:=1]
326874 b.b.buf.vc.ct.C3Els[0]._y : 1 [by b.b.buf.vc.ct.in[3]:=0]
326896 b.b.buf.vc.ct.tmp[6] : 0 [by b.b.buf.vc.ct.C3Els[0]._y:=1]
327743 b.b.buf.vc.ct.C2Els[1]._y : 1 [by b.b.buf.vc.ct.tmp[6]:=0]
328916 b.b.dly.mu2[0]._s : 0 [by b.dly_cfg[0]:=1]
329049 b.b.dly.mu2[0]._y : 1 [by b.b.dly.mu2[0]._s:=0]
344711 b.b.dly._a[1] : 0 [by b.b.dly.mu2[0]._y:=1]
345070 b.b.dly.and2[1]._y : 1 [by b.b.dly._a[1]:=0]
357871 b.b.buf._in_v : 0 [by b.b.buf.vc.ct.C2Els[1]._y:=1]
358092 b.b.buf.in_v_buf._y : 1 [by b.b.buf._in_v:=0]
358099 b.in.v : 0 [by b.b.buf.in_v_buf._y:=1]
359186 b.b.dly.dly[1].a : 0 [by b.b.dly.and2[1]._y:=1]
359216 b.b.dly.dly[1]._y : 1 [by b.b.dly.dly[1].a:=0]
365929 b.b.dly.dly[1].__y : 0 [by b.b.dly.dly[1]._y:=1]
423390 b.b.dly.dly[1].___y : 1 [by b.b.dly.dly[1].__y:=0]
423481 b.b.dly.dly[1].y : 0 [by b.b.dly.dly[1].___y:=1]
425670 b.b.dly.dly[2]._y : 1 [by b.b.dly.dly[1].y:=0]
425677 b.b.dly.dly[2].__y : 0 [by b.b.dly.dly[2]._y:=1]
428464 b.b.dly.dly[2].___y : 1 [by b.b.dly.dly[2].__y:=0]
428570 b.b.dly.dly[2].y : 0 [by b.b.dly.dly[2].___y:=1]
428648 b.b.dly.mu2[1]._y : 1 [by b.b.dly.dly[2].y:=0]
428923 b.b.dly._a[2] : 0 [by b.b.dly.mu2[1]._y:=1]
447919 b.b.dly.and2[2]._y : 1 [by b.b.dly._a[2]:=0]
448374 b.b.dly.dly[3].a : 0 [by b.b.dly.and2[2]._y:=1]
448386 b.b.dly.dly[3]._y : 1 [by b.b.dly.dly[3].a:=0]
448790 b.b.dly.dly[3].__y : 0 [by b.b.dly.dly[3]._y:=1]
448802 b.b.dly.dly[3].___y : 1 [by b.b.dly.dly[3].__y:=0]
454718 b.b.dly.dly[3].y : 0 [by b.b.dly.dly[3].___y:=1]
458994 b.b.dly.dly[4]._y : 1 [by b.b.dly.dly[3].y:=0]
461893 b.b.dly.dly[4].__y : 0 [by b.b.dly.dly[4]._y:=1]
466188 b.b.dly.dly[4].___y : 1 [by b.b.dly.dly[4].__y:=0]
466190 b.b.dly.dly[4].y : 0 [by b.b.dly.dly[4].___y:=1]
470725 b.b.dly.dly[5]._y : 1 [by b.b.dly.dly[4].y:=0]
471974 b.b.dly.dly[5].__y : 0 [by b.b.dly.dly[5]._y:=1]
475473 b.b.dly.dly[5].___y : 1 [by b.b.dly.dly[5].__y:=0]
475639 b.b.dly.dly[5].y : 0 [by b.b.dly.dly[5].___y:=1]
475714 b.b.dly.dly[6]._y : 1 [by b.b.dly.dly[5].y:=0]
476059 b.b.dly.dly[6].__y : 0 [by b.b.dly.dly[6]._y:=1]
476197 b.b.dly.dly[6].___y : 1 [by b.b.dly.dly[6].__y:=0]
481460 b.b.dly.dly[6].y : 0 [by b.b.dly.dly[6].___y:=1]
481462 b.b.dly.mu2[2]._y : 1 [by b.b.dly.dly[6].y:=0]
525379 b.b.dly._a[3] : 0 [by b.b.dly.mu2[2]._y:=1]
525380 b.b.dly.and2[3]._y : 1 [by b.b.dly._a[3]:=0]
525928 b.b.dly.dly[7].a : 0 [by b.b.dly.and2[3]._y:=1]
525939 b.b.dly.dly[7]._y : 1 [by b.b.dly.dly[7].a:=0]
526309 b.b.dly.dly[7].__y : 0 [by b.b.dly.dly[7]._y:=1]
526376 b.b.dly.dly[7].___y : 1 [by b.b.dly.dly[7].__y:=0]
529017 b.b.dly.dly[7].y : 0 [by b.b.dly.dly[7].___y:=1]
529033 b.b.dly.dly[8]._y : 1 [by b.b.dly.dly[7].y:=0]
533595 b.b.dly.dly[8].__y : 0 [by b.b.dly.dly[8]._y:=1]
534123 b.b.dly.dly[8].___y : 1 [by b.b.dly.dly[8].__y:=0]
536558 b.b.dly.dly[8].y : 0 [by b.b.dly.dly[8].___y:=1]
563438 b.b.dly.dly[9]._y : 1 [by b.b.dly.dly[8].y:=0]
587363 b.b.dly.dly[9].__y : 0 [by b.b.dly.dly[9]._y:=1]
600404 b.b.dly.dly[9].___y : 1 [by b.b.dly.dly[9].__y:=0]
600406 b.b.dly.dly[9].y : 0 [by b.b.dly.dly[9].___y:=1]
661364 b.b.dly.dly[10]._y : 1 [by b.b.dly.dly[9].y:=0]
661367 b.b.dly.dly[10].__y : 0 [by b.b.dly.dly[10]._y:=1]
661396 b.b.dly.dly[10].___y : 1 [by b.b.dly.dly[10].__y:=0]
661713 b.b.dly.dly[10].y : 0 [by b.b.dly.dly[10].___y:=1]
663314 b.b.dly.dly[11]._y : 1 [by b.b.dly.dly[10].y:=0]
663467 b.b.dly.dly[11].__y : 0 [by b.b.dly.dly[11]._y:=1]
663511 b.b.dly.dly[11].___y : 1 [by b.b.dly.dly[11].__y:=0]
666272 b.b.dly.dly[11].y : 0 [by b.b.dly.dly[11].___y:=1]
679955 b.b.dly.dly[12]._y : 1 [by b.b.dly.dly[11].y:=0]
679956 b.b.dly.dly[12].__y : 0 [by b.b.dly.dly[12]._y:=1]
680173 b.b.dly.dly[12].___y : 1 [by b.b.dly.dly[12].__y:=0]
680195 b.b.dly.dly[12].y : 0 [by b.b.dly.dly[12].___y:=1]
680196 b.b.dly.dly[13]._y : 1 [by b.b.dly.dly[12].y:=0]
681777 b.b.dly.dly[13].__y : 0 [by b.b.dly.dly[13]._y:=1]
691122 b.b.dly.dly[13].___y : 1 [by b.b.dly.dly[13].__y:=0]
691281 b.b.dly.dly[13].y : 0 [by b.b.dly.dly[13].___y:=1]
710957 b.b.dly.dly[14]._y : 1 [by b.b.dly.dly[13].y:=0]
712244 b.b.dly.dly[14].__y : 0 [by b.b.dly.dly[14]._y:=1]
714476 b.b.dly.dly[14].___y : 1 [by b.b.dly.dly[14].__y:=0]
714621 b.b.dly.mu2[3].b : 0 [by b.b.dly.dly[14].___y:=1]
717453 b.b.dly.mu2[3]._y : 1 [by b.b.dly.mu2[3].b:=0]
723807 b.out.r : 0 [by b.b.dly.mu2[3]._y:=1]
[] set Reset 1
723807 Reset : 1
723808 b._reset_B : 0 [by Reset:=1]
763092 b.b.buf.reset_buf._y : 1 [by b._reset_B:=0]
763254 b.b.buf._reset_BX : 0 [by b.b.buf.reset_buf._y:=1]
770623 b.b.buf.reset_bufarray.buf2._y : 1 [by b.b.buf._reset_BX:=0]
770637 b.b.buf._reset_BXX[0] : 0 [by b.b.buf.reset_bufarray.buf2._y:=1]
[] set Reset 0
770637 Reset : 0
770644 b._reset_B : 1 [by Reset:=0]
770804 b.b.buf.reset_buf._y : 0 [by b._reset_B:=1]
792361 b.b.buf._reset_BX : 1 [by b.b.buf.reset_buf._y:=0]
792362 b.b.buf.reset_bufarray.buf2._y : 0 [by b.b.buf._reset_BX:=1]
792363 b.b.buf._reset_BXX[0] : 1 [by b.b.buf.reset_bufarray.buf2._y:=0]
[] Reset finished, setting data
792363 b.in.d.d[0].f : 1
792363 b.in.d.d[4].t : 1
792363 b.in.d.d[2].t : 1
792363 b.in.d.d[1].t : 1
792363 b.in.d.d[3].f : 1
792364 b.b.buf.t_buf_func[4]._y : 0 [by b.in.d.d[4].t:=1]
792364 b.b.buf.vc.OR2_tf[0]._y : 0 [by b.in.d.d[0].f:=1]
792364 b.b.buf.vc.OR2_tf[1]._y : 0 [by b.in.d.d[1].t:=1]
792365 b.out.d[4] : 1 [by b.b.buf.t_buf_func[4]._y:=0]
792368 b.b.buf.vc.OR2_tf[3]._y : 0 [by b.in.d.d[3].f:=1]
792371 b.b.buf.vc.ct.in[3] : 1 [by b.b.buf.vc.OR2_tf[3]._y:=0]
792381 b.b.buf.vc.ct.in[0] : 1 [by b.b.buf.vc.OR2_tf[0]._y:=0]
792550 b.b.buf.vc.OR2_tf[4]._y : 0 [by b.in.d.d[4].t:=1]
793216 b.b.buf.t_buf_func[1]._y : 0 [by b.in.d.d[1].t:=1]
793254 b.b.buf.f_buf_func[3]._y : 0 [by b.in.d.d[3].f:=1]
793255 b.b.buf.f_buf_func[3].y : 1 [by b.b.buf.f_buf_func[3]._y:=0]
793297 b.b.out_vtree.OR2_tf[3]._y : 0 [by b.b.buf.f_buf_func[3].y:=1]
793491 b.b.buf.vc.ct.in[4] : 1 [by b.b.buf.vc.OR2_tf[4]._y:=0]
794606 b.b.buf.f_buf_func[0]._y : 0 [by b.in.d.d[0].f:=1]
794937 b.b.buf.vc.ct.in[1] : 1 [by b.b.buf.vc.OR2_tf[1]._y:=0]
795032 b.b.buf.vc.ct.C2Els[0]._y : 0 [by b.b.buf.vc.ct.in[1]:=1]
795367 b.b.buf.vc.ct.tmp[5] : 1 [by b.b.buf.vc.ct.C2Els[0]._y:=0]
796114 b.b.out_vtree.ct.in[3] : 1 [by b.b.out_vtree.OR2_tf[3]._y:=0]
796545 b.b.buf.vc.OR2_tf[2]._y : 0 [by b.in.d.d[2].t:=1]
796553 b.b.buf.vc.ct.in[2] : 1 [by b.b.buf.vc.OR2_tf[2]._y:=0]
796587 b.b.buf.vc.ct.C3Els[0]._y : 0 [by b.b.buf.vc.ct.in[2]:=1]
800726 b.b.out_vtree.OR2_tf[4]._y : 0 [by b.out.d[4]:=1]
801644 b.b.out_vtree.ct.in[4] : 1 [by b.b.out_vtree.OR2_tf[4]._y:=0]
808339 b.b.buf.f_buf_func[0].y : 1 [by b.b.buf.f_buf_func[0]._y:=0]
808343 b.b.out_vtree.OR2_tf[0]._y : 0 [by b.b.buf.f_buf_func[0].y:=1]
810474 b.b.buf.vc.ct.tmp[6] : 1 [by b.b.buf.vc.ct.C3Els[0]._y:=0]
812872 b.b.buf.vc.ct.C2Els[1]._y : 0 [by b.b.buf.vc.ct.tmp[6]:=1]
816087 b.b.buf._in_v : 1 [by b.b.buf.vc.ct.C2Els[1]._y:=0]
827145 b.b.buf.t_buf_func[2]._y : 0 [by b.in.d.d[2].t:=1]
827193 b.out.d[2] : 1 [by b.b.buf.t_buf_func[2]._y:=0]
827196 b.b.out_vtree.OR2_tf[2]._y : 0 [by b.out.d[2]:=1]
827374 b.b.out_vtree.ct.in[2] : 1 [by b.b.out_vtree.OR2_tf[2]._y:=0]
848351 b.b.out_vtree.ct.C3Els[0]._y : 0 [by b.b.out_vtree.ct.in[2]:=1]
852178 b.out.d[1] : 1 [by b.b.buf.t_buf_func[1]._y:=0]
854721 b.b.out_vtree.ct.in[0] : 1 [by b.b.out_vtree.OR2_tf[0]._y:=0]
858129 b.b.out_vtree.OR2_tf[1]._y : 0 [by b.out.d[1]:=1]
860250 b.b.out_vtree.ct.tmp[6] : 1 [by b.b.out_vtree.ct.C3Els[0]._y:=0]
863206 b.b.buf.in_v_buf._y : 0 [by b.b.buf._in_v:=1]
864033 b.in.v : 1 [by b.b.buf.in_v_buf._y:=0]
897614 b.b.out_vtree.ct.in[1] : 1 [by b.b.out_vtree.OR2_tf[1]._y:=0]
897787 b.b.out_vtree.ct.C2Els[0]._y : 0 [by b.b.out_vtree.ct.in[1]:=1]
897971 b.b.out_vtree.ct.tmp[5] : 1 [by b.b.out_vtree.ct.C2Els[0]._y:=0]
897972 b.b.out_vtree.ct.C2Els[1]._y : 0 [by b.b.out_vtree.ct.tmp[5]:=1]
898045 b.b.dly.in : 1 [by b.b.out_vtree.ct.C2Els[1]._y:=0]
898049 b.b.dly.and2[0]._y : 0 [by b.b.dly.in:=1]
898145 b.b.dly.dly[0].a : 1 [by b.b.dly.and2[0]._y:=0]
898281 b.b.dly.dly[0]._y : 0 [by b.b.dly.dly[0].a:=1]
898282 b.b.dly.dly[0].__y : 1 [by b.b.dly.dly[0]._y:=0]
917328 b.b.dly.dly[0].___y : 0 [by b.b.dly.dly[0].__y:=1]
917569 b.b.dly.dly[0].y : 1 [by b.b.dly.dly[0].___y:=0]
921528 b.b.dly.mu2[0]._y : 0 [by b.b.dly.dly[0].y:=1]
921540 b.b.dly._a[1] : 1 [by b.b.dly.mu2[0]._y:=0]
925440 b.b.dly.and2[1]._y : 0 [by b.b.dly._a[1]:=1]
926469 b.b.dly.dly[1].a : 1 [by b.b.dly.and2[1]._y:=0]
926470 b.b.dly.dly[1]._y : 0 [by b.b.dly.dly[1].a:=1]
926526 b.b.dly.dly[1].__y : 1 [by b.b.dly.dly[1]._y:=0]
935333 b.b.buf.inack_ctl._y : 0 [by b.b.dly.in:=1]
935334 b.in.a : 1 [by b.b.buf.inack_ctl._y:=0]
935371 b.b.buf._en : 0 [by b.in.a:=1]
935372 b.b.buf.en_buf_t.buf2._y : 1 [by b.b.buf._en:=0]
938936 b.b.buf._en_X_t[0] : 0 [by b.b.buf.en_buf_t.buf2._y:=1]
958746 b.b.buf.en_buf_f.buf2._y : 1 [by b.b.buf._en:=0]
960438 b.b.buf._en_X_f[0] : 0 [by b.b.buf.en_buf_f.buf2._y:=1]
971532 b.b.dly.dly[1].___y : 0 [by b.b.dly.dly[1].__y:=1]
971545 b.b.dly.dly[1].y : 1 [by b.b.dly.dly[1].___y:=0]
988529 b.b.dly.dly[2]._y : 0 [by b.b.dly.dly[1].y:=1]
988886 b.b.dly.dly[2].__y : 1 [by b.b.dly.dly[2]._y:=0]
988911 b.b.dly.dly[2].___y : 0 [by b.b.dly.dly[2].__y:=1]
988932 b.b.dly.dly[2].y : 1 [by b.b.dly.dly[2].___y:=0]
988933 b.b.dly.mu2[1]._y : 0 [by b.b.dly.dly[2].y:=1]
998581 b.b.dly._a[2] : 1 [by b.b.dly.mu2[1]._y:=0]
998582 b.b.dly.and2[2]._y : 0 [by b.b.dly._a[2]:=1]
998583 b.b.dly.dly[3].a : 1 [by b.b.dly.and2[2]._y:=0]
998744 b.b.dly.dly[3]._y : 0 [by b.b.dly.dly[3].a:=1]
999781 b.b.dly.dly[3].__y : 1 [by b.b.dly.dly[3]._y:=0]
999786 b.b.dly.dly[3].___y : 0 [by b.b.dly.dly[3].__y:=1]
1000367 b.b.dly.dly[3].y : 1 [by b.b.dly.dly[3].___y:=0]
1000775 b.b.dly.dly[4]._y : 0 [by b.b.dly.dly[3].y:=1]
1000786 b.b.dly.dly[4].__y : 1 [by b.b.dly.dly[4]._y:=0]
1001833 b.b.dly.dly[4].___y : 0 [by b.b.dly.dly[4].__y:=1]
1001847 b.b.dly.dly[4].y : 1 [by b.b.dly.dly[4].___y:=0]
1001865 b.b.dly.dly[5]._y : 0 [by b.b.dly.dly[4].y:=1]
1001869 b.b.dly.dly[5].__y : 1 [by b.b.dly.dly[5]._y:=0]
1001973 b.b.dly.dly[5].___y : 0 [by b.b.dly.dly[5].__y:=1]
1033417 b.b.dly.dly[5].y : 1 [by b.b.dly.dly[5].___y:=0]
1034621 b.b.dly.dly[6]._y : 0 [by b.b.dly.dly[5].y:=1]
1043076 b.b.dly.dly[6].__y : 1 [by b.b.dly.dly[6]._y:=0]
1043304 b.b.dly.dly[6].___y : 0 [by b.b.dly.dly[6].__y:=1]
1044147 b.b.dly.dly[6].y : 1 [by b.b.dly.dly[6].___y:=0]
1045606 b.b.dly.mu2[2]._y : 0 [by b.b.dly.dly[6].y:=1]
1045676 b.b.dly._a[3] : 1 [by b.b.dly.mu2[2]._y:=0]
1096098 b.b.dly.and2[3]._y : 0 [by b.b.dly._a[3]:=1]
1096109 b.b.dly.dly[7].a : 1 [by b.b.dly.and2[3]._y:=0]
1096112 b.b.dly.dly[7]._y : 0 [by b.b.dly.dly[7].a:=1]
1096166 b.b.dly.dly[7].__y : 1 [by b.b.dly.dly[7]._y:=0]
1097314 b.b.dly.dly[7].___y : 0 [by b.b.dly.dly[7].__y:=1]
1098475 b.b.dly.dly[7].y : 1 [by b.b.dly.dly[7].___y:=0]
1107127 b.b.dly.dly[8]._y : 0 [by b.b.dly.dly[7].y:=1]
1107208 b.b.dly.dly[8].__y : 1 [by b.b.dly.dly[8]._y:=0]
1118285 b.b.dly.dly[8].___y : 0 [by b.b.dly.dly[8].__y:=1]
1136268 b.b.dly.dly[8].y : 1 [by b.b.dly.dly[8].___y:=0]
1136360 b.b.dly.dly[9]._y : 0 [by b.b.dly.dly[8].y:=1]
1144671 b.b.dly.dly[9].__y : 1 [by b.b.dly.dly[9]._y:=0]
1146415 b.b.dly.dly[9].___y : 0 [by b.b.dly.dly[9].__y:=1]
1147028 b.b.dly.dly[9].y : 1 [by b.b.dly.dly[9].___y:=0]
1161050 b.b.dly.dly[10]._y : 0 [by b.b.dly.dly[9].y:=1]
1161095 b.b.dly.dly[10].__y : 1 [by b.b.dly.dly[10]._y:=0]
1162092 b.b.dly.dly[10].___y : 0 [by b.b.dly.dly[10].__y:=1]
1163741 b.b.dly.dly[10].y : 1 [by b.b.dly.dly[10].___y:=0]
1164266 b.b.dly.dly[11]._y : 0 [by b.b.dly.dly[10].y:=1]
1165166 b.b.dly.dly[11].__y : 1 [by b.b.dly.dly[11]._y:=0]
1165218 b.b.dly.dly[11].___y : 0 [by b.b.dly.dly[11].__y:=1]
1165225 b.b.dly.dly[11].y : 1 [by b.b.dly.dly[11].___y:=0]
1180837 b.b.dly.dly[12]._y : 0 [by b.b.dly.dly[11].y:=1]
1187304 b.b.dly.dly[12].__y : 1 [by b.b.dly.dly[12]._y:=0]
1187306 b.b.dly.dly[12].___y : 0 [by b.b.dly.dly[12].__y:=1]
1187660 b.b.dly.dly[12].y : 1 [by b.b.dly.dly[12].___y:=0]
1187793 b.b.dly.dly[13]._y : 0 [by b.b.dly.dly[12].y:=1]
1187794 b.b.dly.dly[13].__y : 1 [by b.b.dly.dly[13]._y:=0]
1187798 b.b.dly.dly[13].___y : 0 [by b.b.dly.dly[13].__y:=1]
1188344 b.b.dly.dly[13].y : 1 [by b.b.dly.dly[13].___y:=0]
1233907 b.b.dly.dly[14]._y : 0 [by b.b.dly.dly[13].y:=1]
1233908 b.b.dly.dly[14].__y : 1 [by b.b.dly.dly[14]._y:=0]
1246286 b.b.dly.dly[14].___y : 0 [by b.b.dly.dly[14].__y:=1]
1246365 b.b.dly.mu2[3].b : 1 [by b.b.dly.dly[14].___y:=0]
1248798 b.b.dly.mu2[3]._y : 0 [by b.b.dly.mu2[3].b:=1]
1248886 b.out.r : 1 [by b.b.dly.mu2[3]._y:=0]
[] Removing input data
1248886 b.in.d.d[0].f : 0
1248886 b.in.d.d[4].t : 0
1248886 b.in.d.d[2].t : 0
1248886 b.in.d.d[1].t : 0
1248886 b.in.d.d[3].f : 0
1248916 b.b.buf.vc.OR2_tf[1]._y : 1 [by b.in.d.d[1].t:=0]
1248945 b.b.buf.vc.OR2_tf[2]._y : 1 [by b.in.d.d[2].t:=0]
1250353 b.b.buf.vc.OR2_tf[3]._y : 1 [by b.in.d.d[3].f:=0]
1251038 b.b.buf.vc.ct.in[3] : 0 [by b.b.buf.vc.OR2_tf[3]._y:=1]
1256668 b.b.buf.vc.OR2_tf[0]._y : 1 [by b.in.d.d[0].f:=0]
1268329 b.b.buf.vc.ct.in[2] : 0 [by b.b.buf.vc.OR2_tf[2]._y:=1]
1273383 b.b.buf.vc.ct.in[0] : 0 [by b.b.buf.vc.OR2_tf[0]._y:=1]
1277213 b.b.buf.vc.OR2_tf[4]._y : 1 [by b.in.d.d[4].t:=0]
1277340 b.b.buf.vc.ct.in[4] : 0 [by b.b.buf.vc.OR2_tf[4]._y:=1]
1277509 b.b.buf.vc.ct.C3Els[0]._y : 1 [by b.b.buf.vc.ct.in[4]:=0]
1277552 b.b.buf.vc.ct.tmp[6] : 0 [by b.b.buf.vc.ct.C3Els[0]._y:=1]
1308420 b.b.buf.vc.ct.in[1] : 0 [by b.b.buf.vc.OR2_tf[1]._y:=1]
1308432 b.b.buf.vc.ct.C2Els[0]._y : 1 [by b.b.buf.vc.ct.in[1]:=0]
1309711 b.b.buf.vc.ct.tmp[5] : 0 [by b.b.buf.vc.ct.C2Els[0]._y:=1]
1309944 b.b.buf.vc.ct.C2Els[1]._y : 1 [by b.b.buf.vc.ct.tmp[5]:=0]
1309947 b.b.buf._in_v : 0 [by b.b.buf.vc.ct.C2Els[1]._y:=1]
1309985 b.b.buf.in_v_buf._y : 1 [by b.b.buf._in_v:=0]
1309986 b.in.v : 0 [by b.b.buf.in_v_buf._y:=1]
[] Receiving out ack
1309986 b.out.a : 1
1322738 b.b.buf._out_a_B : 0 [by b.out.a:=1]
1322830 b.b.buf.out_a_B_buf_t.buf2._y : 1 [by b.b.buf._out_a_B:=0]
1322832 b.b.buf._out_a_BX_f[0] : 0 [by b.b.buf.out_a_B_buf_t.buf2._y:=1]
1322833 b.b.buf.f_buf_func[0]._y : 1 [by b.b.buf._out_a_BX_f[0]:=0]
1322835 b.b.buf.f_buf_func[0].y : 0 [by b.b.buf.f_buf_func[0]._y:=1]
1322853 b.b.out_vtree.OR2_tf[0]._y : 1 [by b.b.buf.f_buf_func[0].y:=0]
1322972 b.b.out_vtree.ct.in[0] : 0 [by b.b.out_vtree.OR2_tf[0]._y:=1]
1324333 b.b.buf.f_buf_func[3]._y : 1 [by b.b.buf._out_a_BX_f[0]:=0]
1325465 b.b.buf.out_a_B_buf_f.buf2._y : 1 [by b.b.buf._out_a_B:=0]
1325473 b.b.buf._out_a_BX_t[0] : 0 [by b.b.buf.out_a_B_buf_f.buf2._y:=1]
1325478 b.b.buf.t_buf_func[4]._y : 1 [by b.b.buf._out_a_BX_t[0]:=0]
1325527 b.b.buf.t_buf_func[1]._y : 1 [by b.b.buf._out_a_BX_t[0]:=0]
1325528 b.out.d[1] : 0 [by b.b.buf.t_buf_func[1]._y:=1]
1325666 b.b.out_vtree.OR2_tf[1]._y : 1 [by b.out.d[1]:=0]
1325667 b.b.out_vtree.ct.in[1] : 0 [by b.b.out_vtree.OR2_tf[1]._y:=1]
1325731 b.b.out_vtree.ct.C2Els[0]._y : 1 [by b.b.out_vtree.ct.in[1]:=0]
1325854 b.b.out_vtree.ct.tmp[5] : 0 [by b.b.out_vtree.ct.C2Els[0]._y:=1]
1326545 b.out.d[4] : 0 [by b.b.buf.t_buf_func[4]._y:=1]
1326547 b.b.out_vtree.OR2_tf[4]._y : 1 [by b.out.d[4]:=0]
1326584 b.b.out_vtree.ct.in[4] : 0 [by b.b.out_vtree.OR2_tf[4]._y:=1]
1330053 b.b.buf.f_buf_func[3].y : 0 [by b.b.buf.f_buf_func[3]._y:=1]
1330196 b.b.out_vtree.OR2_tf[3]._y : 1 [by b.b.buf.f_buf_func[3].y:=0]
1330247 b.b.out_vtree.ct.in[3] : 0 [by b.b.out_vtree.OR2_tf[3]._y:=1]
1376011 b.b.buf.t_buf_func[2]._y : 1 [by b.b.buf._out_a_BX_t[0]:=0]
1376453 b.out.d[2] : 0 [by b.b.buf.t_buf_func[2]._y:=1]
1376464 b.b.out_vtree.OR2_tf[2]._y : 1 [by b.out.d[2]:=0]
1376465 b.b.out_vtree.ct.in[2] : 0 [by b.b.out_vtree.OR2_tf[2]._y:=1]
1376474 b.b.out_vtree.ct.C3Els[0]._y : 1 [by b.b.out_vtree.ct.in[2]:=0]
1376499 b.b.out_vtree.ct.tmp[6] : 0 [by b.b.out_vtree.ct.C3Els[0]._y:=1]
1386752 b.b.out_vtree.ct.C2Els[1]._y : 1 [by b.b.out_vtree.ct.tmp[6]:=0]
1390273 b.b.dly.in : 0 [by b.b.out_vtree.ct.C2Els[1]._y:=1]
1390418 b.b.dly.and2[0]._y : 1 [by b.b.dly.in:=0]
1390648 b.b.dly.dly[0].a : 0 [by b.b.dly.and2[0]._y:=1]
1391339 b.b.dly.dly[0]._y : 1 [by b.b.dly.dly[0].a:=0]
1391353 b.b.dly.dly[0].__y : 0 [by b.b.dly.dly[0]._y:=1]
1392896 b.b.dly.dly[0].___y : 1 [by b.b.dly.dly[0].__y:=0]
1394507 b.b.dly.dly[0].y : 0 [by b.b.dly.dly[0].___y:=1]
1406441 b.b.buf.inack_ctl._y : 1 [by b.b.dly.in:=0]
1406452 b.in.a : 0 [by b.b.buf.inack_ctl._y:=1]
1406453 b.b.buf._en : 1 [by b.in.a:=0]
1406454 b.b.buf.en_buf_f.buf2._y : 0 [by b.b.buf._en:=1]
1407093 b.b.buf._en_X_f[0] : 1 [by b.b.buf.en_buf_f.buf2._y:=0]
1412019 b.b.dly.mu2[0]._y : 1 [by b.b.dly.dly[0].y:=0]
1412954 b.b.buf.en_buf_t.buf2._y : 0 [by b.b.buf._en:=1]
1413086 b.b.buf._en_X_t[0] : 1 [by b.b.buf.en_buf_t.buf2._y:=0]
1413812 b.b.dly._a[1] : 0 [by b.b.dly.mu2[0]._y:=1]
1413813 b.b.dly.and2[1]._y : 1 [by b.b.dly._a[1]:=0]
1413830 b.b.dly.dly[1].a : 0 [by b.b.dly.and2[1]._y:=1]
1413982 b.b.dly.dly[1]._y : 1 [by b.b.dly.dly[1].a:=0]
1416965 b.b.dly.dly[1].__y : 0 [by b.b.dly.dly[1]._y:=1]
1416968 b.b.dly.dly[1].___y : 1 [by b.b.dly.dly[1].__y:=0]
1417392 b.b.dly.dly[1].y : 0 [by b.b.dly.dly[1].___y:=1]
1417398 b.b.dly.dly[2]._y : 1 [by b.b.dly.dly[1].y:=0]
1419986 b.b.dly.dly[2].__y : 0 [by b.b.dly.dly[2]._y:=1]
1422447 b.b.dly.dly[2].___y : 1 [by b.b.dly.dly[2].__y:=0]
1423277 b.b.dly.dly[2].y : 0 [by b.b.dly.dly[2].___y:=1]
1446209 b.b.dly.mu2[1]._y : 1 [by b.b.dly.dly[2].y:=0]
1446211 b.b.dly._a[2] : 0 [by b.b.dly.mu2[1]._y:=1]
1446405 b.b.dly.and2[2]._y : 1 [by b.b.dly._a[2]:=0]
1447008 b.b.dly.dly[3].a : 0 [by b.b.dly.and2[2]._y:=1]
1447146 b.b.dly.dly[3]._y : 1 [by b.b.dly.dly[3].a:=0]
1447163 b.b.dly.dly[3].__y : 0 [by b.b.dly.dly[3]._y:=1]
1447180 b.b.dly.dly[3].___y : 1 [by b.b.dly.dly[3].__y:=0]
1447606 b.b.dly.dly[3].y : 0 [by b.b.dly.dly[3].___y:=1]
1447607 b.b.dly.dly[4]._y : 1 [by b.b.dly.dly[3].y:=0]
1447608 b.b.dly.dly[4].__y : 0 [by b.b.dly.dly[4]._y:=1]
1448634 b.b.dly.dly[4].___y : 1 [by b.b.dly.dly[4].__y:=0]
1448635 b.b.dly.dly[4].y : 0 [by b.b.dly.dly[4].___y:=1]
1448654 b.b.dly.dly[5]._y : 1 [by b.b.dly.dly[4].y:=0]
1448822 b.b.dly.dly[5].__y : 0 [by b.b.dly.dly[5]._y:=1]
1449361 b.b.dly.dly[5].___y : 1 [by b.b.dly.dly[5].__y:=0]
1449522 b.b.dly.dly[5].y : 0 [by b.b.dly.dly[5].___y:=1]
1449695 b.b.dly.dly[6]._y : 1 [by b.b.dly.dly[5].y:=0]
1452242 b.b.dly.dly[6].__y : 0 [by b.b.dly.dly[6]._y:=1]
1467303 b.b.dly.dly[6].___y : 1 [by b.b.dly.dly[6].__y:=0]
1467304 b.b.dly.dly[6].y : 0 [by b.b.dly.dly[6].___y:=1]
1467305 b.b.dly.mu2[2]._y : 1 [by b.b.dly.dly[6].y:=0]
1467695 b.b.dly._a[3] : 0 [by b.b.dly.mu2[2]._y:=1]
1467902 b.b.dly.and2[3]._y : 1 [by b.b.dly._a[3]:=0]
1468735 b.b.dly.dly[7].a : 0 [by b.b.dly.and2[3]._y:=1]
1468763 b.b.dly.dly[7]._y : 1 [by b.b.dly.dly[7].a:=0]
1468770 b.b.dly.dly[7].__y : 0 [by b.b.dly.dly[7]._y:=1]
1469184 b.b.dly.dly[7].___y : 1 [by b.b.dly.dly[7].__y:=0]
1469188 b.b.dly.dly[7].y : 0 [by b.b.dly.dly[7].___y:=1]
1470967 b.b.dly.dly[8]._y : 1 [by b.b.dly.dly[7].y:=0]
1493841 b.b.dly.dly[8].__y : 0 [by b.b.dly.dly[8]._y:=1]
1494007 b.b.dly.dly[8].___y : 1 [by b.b.dly.dly[8].__y:=0]
1533877 b.b.dly.dly[8].y : 0 [by b.b.dly.dly[8].___y:=1]
1542522 b.b.dly.dly[9]._y : 1 [by b.b.dly.dly[8].y:=0]
1543455 b.b.dly.dly[9].__y : 0 [by b.b.dly.dly[9]._y:=1]
1544311 b.b.dly.dly[9].___y : 1 [by b.b.dly.dly[9].__y:=0]
1544450 b.b.dly.dly[9].y : 0 [by b.b.dly.dly[9].___y:=1]
1570659 b.b.dly.dly[10]._y : 1 [by b.b.dly.dly[9].y:=0]
1570854 b.b.dly.dly[10].__y : 0 [by b.b.dly.dly[10]._y:=1]
1570856 b.b.dly.dly[10].___y : 1 [by b.b.dly.dly[10].__y:=0]
1624305 b.b.dly.dly[10].y : 0 [by b.b.dly.dly[10].___y:=1]
1624311 b.b.dly.dly[11]._y : 1 [by b.b.dly.dly[10].y:=0]
1624565 b.b.dly.dly[11].__y : 0 [by b.b.dly.dly[11]._y:=1]
1624573 b.b.dly.dly[11].___y : 1 [by b.b.dly.dly[11].__y:=0]
1624574 b.b.dly.dly[11].y : 0 [by b.b.dly.dly[11].___y:=1]
1624580 b.b.dly.dly[12]._y : 1 [by b.b.dly.dly[11].y:=0]
1675616 b.b.dly.dly[12].__y : 0 [by b.b.dly.dly[12]._y:=1]
1678706 b.b.dly.dly[12].___y : 1 [by b.b.dly.dly[12].__y:=0]
1678932 b.b.dly.dly[12].y : 0 [by b.b.dly.dly[12].___y:=1]
1679751 b.b.dly.dly[13]._y : 1 [by b.b.dly.dly[12].y:=0]
1679752 b.b.dly.dly[13].__y : 0 [by b.b.dly.dly[13]._y:=1]
1679758 b.b.dly.dly[13].___y : 1 [by b.b.dly.dly[13].__y:=0]
1679760 b.b.dly.dly[13].y : 0 [by b.b.dly.dly[13].___y:=1]
1683322 b.b.dly.dly[14]._y : 1 [by b.b.dly.dly[13].y:=0]
1683337 b.b.dly.dly[14].__y : 0 [by b.b.dly.dly[14]._y:=1]
1704138 b.b.dly.dly[14].___y : 1 [by b.b.dly.dly[14].__y:=0]
1704245 b.b.dly.mu2[3].b : 0 [by b.b.dly.dly[14].___y:=1]
1704338 b.b.dly.mu2[3]._y : 1 [by b.b.dly.mu2[3].b:=0]
1705990 b.out.r : 0 [by b.b.dly.mu2[3]._y:=1]
[] Out ack removed
1705990 b.out.a : 0
1709929 b.b.buf._out_a_B : 1 [by b.out.a:=0]
1710687 b.b.buf.out_a_B_buf_t.buf2._y : 0 [by b.b.buf._out_a_B:=1]
1711403 b.b.buf._out_a_BX_f[0] : 1 [by b.b.buf.out_a_B_buf_t.buf2._y:=0]
1712552 b.b.buf.out_a_B_buf_f.buf2._y : 0 [by b.b.buf._out_a_B:=1]
1712553 b.b.buf._out_a_BX_t[0] : 1 [by b.b.buf.out_a_B_buf_f.buf2._y:=0]
[] Again! Setting data
1712553 b.in.d.d[0].t : 1
1712553 b.in.d.d[4].t : 1
1712553 b.in.d.d[2].t : 1
1712553 b.in.d.d[1].t : 1
1712553 b.in.d.d[3].t : 1
1712554 b.b.buf.t_buf_func[0]._y : 0 [by b.in.d.d[0].t:=1]
1712554 b.b.buf.vc.OR2_tf[2]._y : 0 [by b.in.d.d[2].t:=1]
1712554 b.b.buf.vc.OR2_tf[1]._y : 0 [by b.in.d.d[1].t:=1]
1712559 b.b.buf.t_buf_func[2]._y : 0 [by b.in.d.d[2].t:=1]
1712561 b.b.buf.vc.ct.in[2] : 1 [by b.b.buf.vc.OR2_tf[2]._y:=0]
1712572 b.out.d[2] : 1 [by b.b.buf.t_buf_func[2]._y:=0]
1712575 b.b.buf.t_buf_func[3]._y : 0 [by b.in.d.d[3].t:=1]
1712619 b.b.buf.vc.ct.in[1] : 1 [by b.b.buf.vc.OR2_tf[1]._y:=0]
1712679 b.out.d[3] : 1 [by b.b.buf.t_buf_func[3]._y:=0]
1712720 b.b.out_vtree.OR2_tf[3]._y : 0 [by b.out.d[3]:=1]
1712721 b.b.out_vtree.ct.in[3] : 1 [by b.b.out_vtree.OR2_tf[3]._y:=0]
1713696 b.b.out_vtree.OR2_tf[2]._y : 0 [by b.out.d[2]:=1]
1713697 b.b.out_vtree.ct.in[2] : 1 [by b.b.out_vtree.OR2_tf[2]._y:=0]
1714293 b.b.buf.vc.OR2_tf[0]._y : 0 [by b.in.d.d[0].t:=1]
1724705 b.b.buf.vc.OR2_tf[4]._y : 0 [by b.in.d.d[4].t:=1]
1734152 b.b.buf.vc.OR2_tf[3]._y : 0 [by b.in.d.d[3].t:=1]
1734153 b.b.buf.vc.ct.in[3] : 1 [by b.b.buf.vc.OR2_tf[3]._y:=0]
1735062 b.out.d[0] : 1 [by b.b.buf.t_buf_func[0]._y:=0]
1737877 b.b.buf.vc.ct.in[4] : 1 [by b.b.buf.vc.OR2_tf[4]._y:=0]
1740752 b.b.buf.t_buf_func[4]._y : 0 [by b.in.d.d[4].t:=1]
1741013 b.b.buf.vc.ct.C3Els[0]._y : 0 [by b.b.buf.vc.ct.in[4]:=1]
1741578 b.out.d[4] : 1 [by b.b.buf.t_buf_func[4]._y:=0]
1742846 b.b.buf.vc.ct.tmp[6] : 1 [by b.b.buf.vc.ct.C3Els[0]._y:=0]
1752042 b.b.buf.t_buf_func[1]._y : 0 [by b.in.d.d[1].t:=1]
1752100 b.out.d[1] : 1 [by b.b.buf.t_buf_func[1]._y:=0]
1754543 b.b.out_vtree.OR2_tf[1]._y : 0 [by b.out.d[1]:=1]
1754887 b.b.out_vtree.OR2_tf[0]._y : 0 [by b.out.d[0]:=1]
1758126 b.b.out_vtree.OR2_tf[4]._y : 0 [by b.out.d[4]:=1]
1758140 b.b.out_vtree.ct.in[4] : 1 [by b.b.out_vtree.OR2_tf[4]._y:=0]
1758496 b.b.out_vtree.ct.C3Els[0]._y : 0 [by b.b.out_vtree.ct.in[4]:=1]
1771316 b.b.out_vtree.ct.in[1] : 1 [by b.b.out_vtree.OR2_tf[1]._y:=0]
1778671 b.b.buf.vc.ct.in[0] : 1 [by b.b.buf.vc.OR2_tf[0]._y:=0]
1778776 b.b.buf.vc.ct.C2Els[0]._y : 0 [by b.b.buf.vc.ct.in[0]:=1]
1778885 b.b.buf.vc.ct.tmp[5] : 1 [by b.b.buf.vc.ct.C2Els[0]._y:=0]
1778886 b.b.buf.vc.ct.C2Els[1]._y : 0 [by b.b.buf.vc.ct.tmp[5]:=1]
1778895 b.b.buf._in_v : 1 [by b.b.buf.vc.ct.C2Els[1]._y:=0]
1792086 b.b.out_vtree.ct.in[0] : 1 [by b.b.out_vtree.OR2_tf[0]._y:=0]
1792087 b.b.out_vtree.ct.C2Els[0]._y : 0 [by b.b.out_vtree.ct.in[0]:=1]
1794334 b.b.out_vtree.ct.tmp[6] : 1 [by b.b.out_vtree.ct.C3Els[0]._y:=0]
1816848 b.b.buf.in_v_buf._y : 0 [by b.b.buf._in_v:=1]
1816849 b.in.v : 1 [by b.b.buf.in_v_buf._y:=0]
1828481 b.b.out_vtree.ct.tmp[5] : 1 [by b.b.out_vtree.ct.C2Els[0]._y:=0]
1831570 b.b.out_vtree.ct.C2Els[1]._y : 0 [by b.b.out_vtree.ct.tmp[5]:=1]
1880296 b.b.dly.in : 1 [by b.b.out_vtree.ct.C2Els[1]._y:=0]
1881046 b.b.dly.and2[0]._y : 0 [by b.b.dly.in:=1]
1881097 b.b.dly.dly[0].a : 1 [by b.b.dly.and2[0]._y:=0]
1881107 b.b.dly.dly[0]._y : 0 [by b.b.dly.dly[0].a:=1]
1881427 b.b.dly.dly[0].__y : 1 [by b.b.dly.dly[0]._y:=0]
1887051 b.b.buf.inack_ctl._y : 0 [by b.b.dly.in:=1]
1887052 b.in.a : 1 [by b.b.buf.inack_ctl._y:=0]
1887053 b.b.buf._en : 0 [by b.in.a:=1]
1888740 b.b.buf.en_buf_t.buf2._y : 1 [by b.b.buf._en:=0]
1888755 b.b.buf._en_X_t[0] : 0 [by b.b.buf.en_buf_t.buf2._y:=1]
1888783 b.b.buf.en_buf_f.buf2._y : 1 [by b.b.buf._en:=0]
1889009 b.b.dly.dly[0].___y : 0 [by b.b.dly.dly[0].__y:=1]
1889463 b.b.dly.dly[0].y : 1 [by b.b.dly.dly[0].___y:=0]
1889779 b.b.dly.mu2[0]._y : 0 [by b.b.dly.dly[0].y:=1]
1889780 b.b.dly._a[1] : 1 [by b.b.dly.mu2[0]._y:=0]
1890163 b.b.dly.and2[1]._y : 0 [by b.b.dly._a[1]:=1]
1897626 b.b.dly.dly[1].a : 1 [by b.b.dly.and2[1]._y:=0]
1897646 b.b.dly.dly[1]._y : 0 [by b.b.dly.dly[1].a:=1]
1898969 b.b.dly.dly[1].__y : 1 [by b.b.dly.dly[1]._y:=0]
1899056 b.b.dly.dly[1].___y : 0 [by b.b.dly.dly[1].__y:=1]
1905778 b.b.dly.dly[1].y : 1 [by b.b.dly.dly[1].___y:=0]
1905790 b.b.dly.dly[2]._y : 0 [by b.b.dly.dly[1].y:=1]
1905935 b.b.dly.dly[2].__y : 1 [by b.b.dly.dly[2]._y:=0]
1906836 b.b.dly.dly[2].___y : 0 [by b.b.dly.dly[2].__y:=1]
1908185 b.b.dly.dly[2].y : 1 [by b.b.dly.dly[2].___y:=0]
1908404 b.b.dly.mu2[1]._y : 0 [by b.b.dly.dly[2].y:=1]
1913057 b.b.buf._en_X_f[0] : 0 [by b.b.buf.en_buf_f.buf2._y:=1]
1916735 b.b.dly._a[2] : 1 [by b.b.dly.mu2[1]._y:=0]
1948316 b.b.dly.and2[2]._y : 0 [by b.b.dly._a[2]:=1]
1948334 b.b.dly.dly[3].a : 1 [by b.b.dly.and2[2]._y:=0]
1950528 b.b.dly.dly[3]._y : 0 [by b.b.dly.dly[3].a:=1]
1988500 b.b.dly.dly[3].__y : 1 [by b.b.dly.dly[3]._y:=0]
1988620 b.b.dly.dly[3].___y : 0 [by b.b.dly.dly[3].__y:=1]
1994935 b.b.dly.dly[3].y : 1 [by b.b.dly.dly[3].___y:=0]
1996999 b.b.dly.dly[4]._y : 0 [by b.b.dly.dly[3].y:=1]
1997591 b.b.dly.dly[4].__y : 1 [by b.b.dly.dly[4]._y:=0]
1997598 b.b.dly.dly[4].___y : 0 [by b.b.dly.dly[4].__y:=1]
1997599 b.b.dly.dly[4].y : 1 [by b.b.dly.dly[4].___y:=0]
1997723 b.b.dly.dly[5]._y : 0 [by b.b.dly.dly[4].y:=1]
2003653 b.b.dly.dly[5].__y : 1 [by b.b.dly.dly[5]._y:=0]
2004705 b.b.dly.dly[5].___y : 0 [by b.b.dly.dly[5].__y:=1]
2005065 b.b.dly.dly[5].y : 1 [by b.b.dly.dly[5].___y:=0]
2015259 b.b.dly.dly[6]._y : 0 [by b.b.dly.dly[5].y:=1]
2016356 b.b.dly.dly[6].__y : 1 [by b.b.dly.dly[6]._y:=0]
2036248 b.b.dly.dly[6].___y : 0 [by b.b.dly.dly[6].__y:=1]
2036252 b.b.dly.dly[6].y : 1 [by b.b.dly.dly[6].___y:=0]
2047916 b.b.dly.mu2[2]._y : 0 [by b.b.dly.dly[6].y:=1]
2085835 b.b.dly._a[3] : 1 [by b.b.dly.mu2[2]._y:=0]
2103496 b.b.dly.and2[3]._y : 0 [by b.b.dly._a[3]:=1]
2106877 b.b.dly.dly[7].a : 1 [by b.b.dly.and2[3]._y:=0]
2107133 b.b.dly.dly[7]._y : 0 [by b.b.dly.dly[7].a:=1]
2122063 b.b.dly.dly[7].__y : 1 [by b.b.dly.dly[7]._y:=0]
2122100 b.b.dly.dly[7].___y : 0 [by b.b.dly.dly[7].__y:=1]
2122112 b.b.dly.dly[7].y : 1 [by b.b.dly.dly[7].___y:=0]
2122121 b.b.dly.dly[8]._y : 0 [by b.b.dly.dly[7].y:=1]
2122548 b.b.dly.dly[8].__y : 1 [by b.b.dly.dly[8]._y:=0]
2122790 b.b.dly.dly[8].___y : 0 [by b.b.dly.dly[8].__y:=1]
2123625 b.b.dly.dly[8].y : 1 [by b.b.dly.dly[8].___y:=0]
2170361 b.b.dly.dly[9]._y : 0 [by b.b.dly.dly[8].y:=1]
2171921 b.b.dly.dly[9].__y : 1 [by b.b.dly.dly[9]._y:=0]
2209014 b.b.dly.dly[9].___y : 0 [by b.b.dly.dly[9].__y:=1]
2209274 b.b.dly.dly[9].y : 1 [by b.b.dly.dly[9].___y:=0]
2218262 b.b.dly.dly[10]._y : 0 [by b.b.dly.dly[9].y:=1]
2218263 b.b.dly.dly[10].__y : 1 [by b.b.dly.dly[10]._y:=0]
2254313 b.b.dly.dly[10].___y : 0 [by b.b.dly.dly[10].__y:=1]
2254697 b.b.dly.dly[10].y : 1 [by b.b.dly.dly[10].___y:=0]
2254716 b.b.dly.dly[11]._y : 0 [by b.b.dly.dly[10].y:=1]
2254725 b.b.dly.dly[11].__y : 1 [by b.b.dly.dly[11]._y:=0]
2276679 b.b.dly.dly[11].___y : 0 [by b.b.dly.dly[11].__y:=1]
2276867 b.b.dly.dly[11].y : 1 [by b.b.dly.dly[11].___y:=0]
2322643 b.b.dly.dly[12]._y : 0 [by b.b.dly.dly[11].y:=1]
2326243 b.b.dly.dly[12].__y : 1 [by b.b.dly.dly[12]._y:=0]
2326391 b.b.dly.dly[12].___y : 0 [by b.b.dly.dly[12].__y:=1]
2345268 b.b.dly.dly[12].y : 1 [by b.b.dly.dly[12].___y:=0]
2345283 b.b.dly.dly[13]._y : 0 [by b.b.dly.dly[12].y:=1]
2355892 b.b.dly.dly[13].__y : 1 [by b.b.dly.dly[13]._y:=0]
2356779 b.b.dly.dly[13].___y : 0 [by b.b.dly.dly[13].__y:=1]
2364761 b.b.dly.dly[13].y : 1 [by b.b.dly.dly[13].___y:=0]
2364762 b.b.dly.dly[14]._y : 0 [by b.b.dly.dly[13].y:=1]
2371488 b.b.dly.dly[14].__y : 1 [by b.b.dly.dly[14]._y:=0]
2371853 b.b.dly.dly[14].___y : 0 [by b.b.dly.dly[14].__y:=1]
2380811 b.b.dly.mu2[3].b : 1 [by b.b.dly.dly[14].___y:=0]
2382195 b.b.dly.mu2[3]._y : 0 [by b.b.dly.mu2[3].b:=1]
2382216 b.out.r : 1 [by b.b.dly.mu2[3]._y:=0]
[] Removing input data
2382216 b.in.d.d[0].t : 0
2382216 b.in.d.d[4].t : 0
2382216 b.in.d.d[2].t : 0
2382216 b.in.d.d[1].t : 0
2382216 b.in.d.d[3].t : 0
2382219 b.b.buf.vc.OR2_tf[4]._y : 1 [by b.in.d.d[4].t:=0]
2382221 b.b.buf.vc.ct.in[4] : 0 [by b.b.buf.vc.OR2_tf[4]._y:=1]
2382257 b.b.buf.vc.OR2_tf[0]._y : 1 [by b.in.d.d[0].t:=0]
2382260 b.b.buf.vc.ct.in[0] : 0 [by b.b.buf.vc.OR2_tf[0]._y:=1]
2382798 b.b.buf.vc.OR2_tf[3]._y : 1 [by b.in.d.d[3].t:=0]
2382799 b.b.buf.vc.ct.in[3] : 0 [by b.b.buf.vc.OR2_tf[3]._y:=1]
2384093 b.b.buf.vc.OR2_tf[2]._y : 1 [by b.in.d.d[2].t:=0]
2387545 b.b.buf.vc.ct.in[2] : 0 [by b.b.buf.vc.OR2_tf[2]._y:=1]
2391725 b.b.buf.vc.OR2_tf[1]._y : 1 [by b.in.d.d[1].t:=0]
2392585 b.b.buf.vc.ct.in[1] : 0 [by b.b.buf.vc.OR2_tf[1]._y:=1]
2392586 b.b.buf.vc.ct.C2Els[0]._y : 1 [by b.b.buf.vc.ct.in[1]:=0]
2392661 b.b.buf.vc.ct.tmp[5] : 0 [by b.b.buf.vc.ct.C2Els[0]._y:=1]
2394678 b.b.buf.vc.ct.C3Els[0]._y : 1 [by b.b.buf.vc.ct.in[2]:=0]
2422629 b.b.buf.vc.ct.tmp[6] : 0 [by b.b.buf.vc.ct.C3Els[0]._y:=1]
2422703 b.b.buf.vc.ct.C2Els[1]._y : 1 [by b.b.buf.vc.ct.tmp[6]:=0]
2424973 b.b.buf._in_v : 0 [by b.b.buf.vc.ct.C2Els[1]._y:=1]
2425071 b.b.buf.in_v_buf._y : 1 [by b.b.buf._in_v:=0]
2430842 b.in.v : 0 [by b.b.buf.in_v_buf._y:=1]
[] Receiving out ack
2430842 b.out.a : 1
2462570 b.b.buf._out_a_B : 0 [by b.out.a:=1]
2466423 b.b.buf.out_a_B_buf_t.buf2._y : 1 [by b.b.buf._out_a_B:=0]
2468711 b.b.buf.out_a_B_buf_f.buf2._y : 1 [by b.b.buf._out_a_B:=0]
2468715 b.b.buf._out_a_BX_t[0] : 0 [by b.b.buf.out_a_B_buf_f.buf2._y:=1]
2468716 b.b.buf.t_buf_func[3]._y : 1 [by b.b.buf._out_a_BX_t[0]:=0]
2468718 b.out.d[3] : 0 [by b.b.buf.t_buf_func[3]._y:=1]
2468720 b.b.buf.t_buf_func[0]._y : 1 [by b.b.buf._out_a_BX_t[0]:=0]
2468751 b.b.buf.t_buf_func[4]._y : 1 [by b.b.buf._out_a_BX_t[0]:=0]
2468752 b.out.d[4] : 0 [by b.b.buf.t_buf_func[4]._y:=1]
2468756 b.out.d[0] : 0 [by b.b.buf.t_buf_func[0]._y:=1]
2468766 b.b.out_vtree.OR2_tf[4]._y : 1 [by b.out.d[4]:=0]
2468768 b.b.out_vtree.OR2_tf[0]._y : 1 [by b.out.d[0]:=0]
2468783 b.b.buf._out_a_BX_f[0] : 0 [by b.b.buf.out_a_B_buf_t.buf2._y:=1]
2468809 b.b.buf.t_buf_func[2]._y : 1 [by b.b.buf._out_a_BX_t[0]:=0]
2469006 b.b.buf.t_buf_func[1]._y : 1 [by b.b.buf._out_a_BX_t[0]:=0]
2480904 b.out.d[1] : 0 [by b.b.buf.t_buf_func[1]._y:=1]
2481799 b.out.d[2] : 0 [by b.b.buf.t_buf_func[2]._y:=1]
2481800 b.b.out_vtree.OR2_tf[2]._y : 1 [by b.out.d[2]:=0]
2482012 b.b.out_vtree.ct.in[2] : 0 [by b.b.out_vtree.OR2_tf[2]._y:=1]
2490325 b.b.out_vtree.ct.in[0] : 0 [by b.b.out_vtree.OR2_tf[0]._y:=1]
2490536 b.b.out_vtree.OR2_tf[3]._y : 1 [by b.out.d[3]:=0]
2492797 b.b.out_vtree.ct.in[4] : 0 [by b.b.out_vtree.OR2_tf[4]._y:=1]
2497948 b.b.out_vtree.ct.in[3] : 0 [by b.b.out_vtree.OR2_tf[3]._y:=1]
2500881 b.b.out_vtree.ct.C3Els[0]._y : 1 [by b.b.out_vtree.ct.in[3]:=0]
2501020 b.b.out_vtree.ct.tmp[6] : 0 [by b.b.out_vtree.ct.C3Els[0]._y:=1]
2523854 b.b.out_vtree.OR2_tf[1]._y : 1 [by b.out.d[1]:=0]
2523858 b.b.out_vtree.ct.in[1] : 0 [by b.b.out_vtree.OR2_tf[1]._y:=1]
2524213 b.b.out_vtree.ct.C2Els[0]._y : 1 [by b.b.out_vtree.ct.in[1]:=0]
2524291 b.b.out_vtree.ct.tmp[5] : 0 [by b.b.out_vtree.ct.C2Els[0]._y:=1]
2562496 b.b.out_vtree.ct.C2Els[1]._y : 1 [by b.b.out_vtree.ct.tmp[5]:=0]
2562522 b.b.dly.in : 0 [by b.b.out_vtree.ct.C2Els[1]._y:=1]
2562583 b.b.buf.inack_ctl._y : 1 [by b.b.dly.in:=0]
2562588 b.in.a : 0 [by b.b.buf.inack_ctl._y:=1]
2562660 b.b.buf._en : 1 [by b.in.a:=0]
2562679 b.b.buf.en_buf_t.buf2._y : 0 [by b.b.buf._en:=1]
2562771 b.b.buf.en_buf_f.buf2._y : 0 [by b.b.buf._en:=1]
2562778 b.b.buf._en_X_t[0] : 1 [by b.b.buf.en_buf_t.buf2._y:=0]
2562786 b.b.dly.and2[0]._y : 1 [by b.b.dly.in:=0]
2562835 b.b.dly.dly[0].a : 0 [by b.b.dly.and2[0]._y:=1]
2562870 b.b.dly.dly[0]._y : 1 [by b.b.dly.dly[0].a:=0]
2563138 b.b.buf._en_X_f[0] : 1 [by b.b.buf.en_buf_f.buf2._y:=0]
2569047 b.b.dly.dly[0].__y : 0 [by b.b.dly.dly[0]._y:=1]
2573871 b.b.dly.dly[0].___y : 1 [by b.b.dly.dly[0].__y:=0]
2573899 b.b.dly.dly[0].y : 0 [by b.b.dly.dly[0].___y:=1]
2574886 b.b.dly.mu2[0]._y : 1 [by b.b.dly.dly[0].y:=0]
2595389 b.b.dly._a[1] : 0 [by b.b.dly.mu2[0]._y:=1]
2595449 b.b.dly.and2[1]._y : 1 [by b.b.dly._a[1]:=0]
2605019 b.b.dly.dly[1].a : 0 [by b.b.dly.and2[1]._y:=1]
2607122 b.b.dly.dly[1]._y : 1 [by b.b.dly.dly[1].a:=0]
2624830 b.b.dly.dly[1].__y : 0 [by b.b.dly.dly[1]._y:=1]
2635747 b.b.dly.dly[1].___y : 1 [by b.b.dly.dly[1].__y:=0]
2635748 b.b.dly.dly[1].y : 0 [by b.b.dly.dly[1].___y:=1]
2661489 b.b.dly.dly[2]._y : 1 [by b.b.dly.dly[1].y:=0]
2661492 b.b.dly.dly[2].__y : 0 [by b.b.dly.dly[2]._y:=1]
2680156 b.b.dly.dly[2].___y : 1 [by b.b.dly.dly[2].__y:=0]
2681625 b.b.dly.dly[2].y : 0 [by b.b.dly.dly[2].___y:=1]
2681655 b.b.dly.mu2[1]._y : 1 [by b.b.dly.dly[2].y:=0]
2681661 b.b.dly._a[2] : 0 [by b.b.dly.mu2[1]._y:=1]
2681662 b.b.dly.and2[2]._y : 1 [by b.b.dly._a[2]:=0]
2681789 b.b.dly.dly[3].a : 0 [by b.b.dly.and2[2]._y:=1]
2681792 b.b.dly.dly[3]._y : 1 [by b.b.dly.dly[3].a:=0]
2681878 b.b.dly.dly[3].__y : 0 [by b.b.dly.dly[3]._y:=1]
2682810 b.b.dly.dly[3].___y : 1 [by b.b.dly.dly[3].__y:=0]
2684303 b.b.dly.dly[3].y : 0 [by b.b.dly.dly[3].___y:=1]
2693026 b.b.dly.dly[4]._y : 1 [by b.b.dly.dly[3].y:=0]
2707379 b.b.dly.dly[4].__y : 0 [by b.b.dly.dly[4]._y:=1]
2707653 b.b.dly.dly[4].___y : 1 [by b.b.dly.dly[4].__y:=0]
2707654 b.b.dly.dly[4].y : 0 [by b.b.dly.dly[4].___y:=1]
2715805 b.b.dly.dly[5]._y : 1 [by b.b.dly.dly[4].y:=0]
2735650 b.b.dly.dly[5].__y : 0 [by b.b.dly.dly[5]._y:=1]
2735652 b.b.dly.dly[5].___y : 1 [by b.b.dly.dly[5].__y:=0]
2736011 b.b.dly.dly[5].y : 0 [by b.b.dly.dly[5].___y:=1]
2738027 b.b.dly.dly[6]._y : 1 [by b.b.dly.dly[5].y:=0]
2762538 b.b.dly.dly[6].__y : 0 [by b.b.dly.dly[6]._y:=1]
2762540 b.b.dly.dly[6].___y : 1 [by b.b.dly.dly[6].__y:=0]
2776971 b.b.dly.dly[6].y : 0 [by b.b.dly.dly[6].___y:=1]
2776974 b.b.dly.mu2[2]._y : 1 [by b.b.dly.dly[6].y:=0]
2814263 b.b.dly._a[3] : 0 [by b.b.dly.mu2[2]._y:=1]
2814607 b.b.dly.and2[3]._y : 1 [by b.b.dly._a[3]:=0]
2816390 b.b.dly.dly[7].a : 0 [by b.b.dly.and2[3]._y:=1]
2816419 b.b.dly.dly[7]._y : 1 [by b.b.dly.dly[7].a:=0]
2816490 b.b.dly.dly[7].__y : 0 [by b.b.dly.dly[7]._y:=1]
2816852 b.b.dly.dly[7].___y : 1 [by b.b.dly.dly[7].__y:=0]
2816935 b.b.dly.dly[7].y : 0 [by b.b.dly.dly[7].___y:=1]
2865097 b.b.dly.dly[8]._y : 1 [by b.b.dly.dly[7].y:=0]
2865204 b.b.dly.dly[8].__y : 0 [by b.b.dly.dly[8]._y:=1]
2865207 b.b.dly.dly[8].___y : 1 [by b.b.dly.dly[8].__y:=0]
2865208 b.b.dly.dly[8].y : 0 [by b.b.dly.dly[8].___y:=1]
2865209 b.b.dly.dly[9]._y : 1 [by b.b.dly.dly[8].y:=0]
2869554 b.b.dly.dly[9].__y : 0 [by b.b.dly.dly[9]._y:=1]
2870412 b.b.dly.dly[9].___y : 1 [by b.b.dly.dly[9].__y:=0]
2870424 b.b.dly.dly[9].y : 0 [by b.b.dly.dly[9].___y:=1]
2906853 b.b.dly.dly[10]._y : 1 [by b.b.dly.dly[9].y:=0]
2957822 b.b.dly.dly[10].__y : 0 [by b.b.dly.dly[10]._y:=1]
2991168 b.b.dly.dly[10].___y : 1 [by b.b.dly.dly[10].__y:=0]
2996149 b.b.dly.dly[10].y : 0 [by b.b.dly.dly[10].___y:=1]
2996177 b.b.dly.dly[11]._y : 1 [by b.b.dly.dly[10].y:=0]
2996185 b.b.dly.dly[11].__y : 0 [by b.b.dly.dly[11]._y:=1]
3017540 b.b.dly.dly[11].___y : 1 [by b.b.dly.dly[11].__y:=0]
3051871 b.b.dly.dly[11].y : 0 [by b.b.dly.dly[11].___y:=1]
3052136 b.b.dly.dly[12]._y : 1 [by b.b.dly.dly[11].y:=0]
3052215 b.b.dly.dly[12].__y : 0 [by b.b.dly.dly[12]._y:=1]
3052223 b.b.dly.dly[12].___y : 1 [by b.b.dly.dly[12].__y:=0]
3052264 b.b.dly.dly[12].y : 0 [by b.b.dly.dly[12].___y:=1]
3052903 b.b.dly.dly[13]._y : 1 [by b.b.dly.dly[12].y:=0]
3086458 b.b.dly.dly[13].__y : 0 [by b.b.dly.dly[13]._y:=1]
3086475 b.b.dly.dly[13].___y : 1 [by b.b.dly.dly[13].__y:=0]
3110753 b.b.dly.dly[13].y : 0 [by b.b.dly.dly[13].___y:=1]
3155972 b.b.dly.dly[14]._y : 1 [by b.b.dly.dly[13].y:=0]
3177584 b.b.dly.dly[14].__y : 0 [by b.b.dly.dly[14]._y:=1]
3177585 b.b.dly.dly[14].___y : 1 [by b.b.dly.dly[14].__y:=0]
3177586 b.b.dly.mu2[3].b : 0 [by b.b.dly.dly[14].___y:=1]
3178012 b.b.dly.mu2[3]._y : 1 [by b.b.dly.mu2[3].b:=0]
3178350 b.out.r : 0 [by b.b.dly.mu2[3]._y:=1]
[] Out ack removed
3178350 b.out.a : 0
3178476 b.b.buf._out_a_B : 1 [by b.out.a:=0]
3178478 b.b.buf.out_a_B_buf_t.buf2._y : 0 [by b.b.buf._out_a_B:=1]
3178638 b.b.buf._out_a_BX_f[0] : 1 [by b.b.buf.out_a_B_buf_t.buf2._y:=0]
3179286 b.b.buf.out_a_B_buf_f.buf2._y : 0 [by b.b.buf._out_a_B:=1]
3207117 b.b.buf._out_a_BX_t[0] : 1 [by b.b.buf.out_a_B_buf_f.buf2._y:=0]

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/*************************************************************************
*
* This file is part of ACT dataflow neuro library.
* It's the testing facility for cell_lib_std.act
*
* Copyright (c) 2022 University of Groningen - Ole Richter
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
* Copyright (c) 2022 University of Groningen - Michele Mastella
* Copyright (c) 2022 University of Groningen - Madison Cotteret
*
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
*
* You may redistribute and modify this documentation and make products
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
* for applicable conditions.
*
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
*
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
* these sources, You must maintain the Source Location visible in its
* documentation.
*
**************************************************************************
*/
import "../../dataflow_neuro/interfaces.act";
import globals;
open tmpl::dataflow_neuro;
defproc qdi2bd_5(avMx1of2<5> in; bd<5> out; bool? dly_cfg[4])
{
bool _reset_B;
prs {
Reset => _reset_B-
}
qdi2bd<5,4> b(.in = in, .out = out, .reset_B = _reset_B, .dly_cfg = dly_cfg);
b.supply.vdd = Vdd;
b.supply.vss = GND;
}
qdi2bd_5 b;

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watchall
set b.out.a 0
set b.in.a 0
set-qdi-channel-neutral "b.in" 5
set b.dly_cfg[0] 1
set b.dly_cfg[1] 1
set b.dly_cfg[2] 1
set b.dly_cfg[3] 1
set Reset 0
cycle
system "echo '[] set Reset 1'"
set Reset 1
cycle
system "echo '[] set Reset 0'"
set Reset 0
mode run
cycle
status X
assert b.in.a 0
assert b.out.r 0
system "echo '[] Reset finished, setting data'"
set-qdi-channel-valid "b.in" 5 22
cycle
assert b.out.r 1
assert b.out.d[0] 0
assert b.out.d[1] 1
assert b.out.d[2] 1
assert b.out.d[3] 0
assert b.out.d[4] 1
assert b.in.a 1
system "echo '[] Removing input data'"
set-qdi-channel-neutral "b.in" 5
cycle
assert b.out.r 1
assert b.out.d[0] 0
assert b.out.d[1] 1
assert b.out.d[2] 1
assert b.out.d[3] 0
assert b.out.d[4] 1
system "echo '[] Receiving out ack'"
set b.out.a 1
cycle
assert b.out.r 0
assert b.in.a 0
system "echo '[] Out ack removed'"
set b.out.a 0
cycle
system "echo '[] Again! Setting data'"
set-qdi-channel-valid "b.in" 5 31
cycle
assert b.out.r 1
assert b.out.d[0] 1
assert b.out.d[1] 1
assert b.out.d[2] 1
assert b.out.d[3] 1
assert b.out.d[4] 1
assert b.in.a 1
system "echo '[] Removing input data'"
set-qdi-channel-neutral "b.in" 5
cycle
assert b.out.r 1
assert b.out.d[0] 1
assert b.out.d[1] 1
assert b.out.d[2] 1
assert b.out.d[3] 1
assert b.out.d[4] 1
system "echo '[] Receiving out ack'"
set b.out.a 1
cycle
assert b.out.r 0
assert b.in.a 0
system "echo '[] Out ack removed'"
set b.out.a 0
cycle