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register rw passed initial tests

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alexmadison
2022-04-02 18:31:45 +02:00
parent be3cc7a2d7
commit fa5f83f061
5 changed files with 13973 additions and 8 deletions
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10
dataflow_neuro/registers.act
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@ -414,10 +414,6 @@ defproc registerA_w_array(avMx1of2<NcA + NcW + 1> in; Mx1of2<NcW> data[M];
// BIG TODO
// I HAVE NOT BOTHERED WITH ANY SIGNAL BUFFERING IN HERE YET
// Input valid tree
// Note that I may need to check the validity of other downstream stuff,
// to be ultra careful about delays.
vtree<NcA + NcW + 1> input_valid(.in = in.d, .out = in.v,
.supply = supply);
@ -489,8 +485,6 @@ defproc registerA_wr_array(avMx1of2<NcA + NcW + 1> in; Mx1of2<NcW> data[M]; avMx
// I HAVE NOT BOTHERED WITH ANY SIGNAL BUFFERING IN HERE YET
// Input valid tree
// Note that I may need to check the validity of other downstream stuff,
// to be ultra careful about delays.
vtree<NcA + NcW + 1> input_valid(.in = in.d, .out = in.v,
.supply = supply);
@ -564,7 +558,7 @@ A_2C_B_X1 read_selectors[M];
// OrTrees for each output word bit on read
ortree<M> out_ortrees_t[NcW];
ortree<M> out_ortrees_f[NcW];
(i:M:
(i:NcW:
out_ortrees_t[i].out = out.d.d[i+NcA].t;
out_ortrees_f[i].out = out.d.d[i+NcA].f;
@ -579,7 +573,7 @@ AND2_X1 and_reads_f[NcW * M];
pint index;
(i:NcW:
(j:M:
index = i * j*NcW;
index = i + j*NcW;
and_reads_t[index].a = data[j].d[i].t;
and_reads_t[index].b = read_selectors[j].y;