5 Commits

Author	SHA1	Message	Date
Michele	aa67bd6168	register simulates correctly up to the fake clock generation	2022-03-05 20:28:50 +01:00
Michele	78a8f72d25	register compiles	2022-03-05 09:19:19 +01:00
Michele	7fe31f0ed8	started testing the register_w (doesn't compile)	2022-03-04 21:17:30 +01:00
Michele	b5fa707c4e	forgot proc in defproc	2022-03-04 19:04:11 +01:00
Michele	9c6a591dc7	started registers	2022-03-04 11:44:00 +01:00