alexmadison
|
ff077c5169
|
regenned with cores having new names
|
2022-07-06 18:25:23 +02:00 |
alexmadison
|
1cd1b1d054
|
wiping split modules
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2022-07-06 18:24:32 +02:00 |
alexmadison
|
72dab29f5c
|
regennmed tdc no read to have the same number of reg bits as normal tdcg
|
2022-07-06 17:43:21 +02:00 |
alexmadison
|
502d35b000
|
added slice before registers, so register sizes can be reduced
|
2022-07-06 17:26:26 +02:00 |
alexmadison
|
27a0d34153
|
genned texel dualcore glue noread netlist clean
|
2022-07-06 16:04:34 +02:00 |
alexmadison
|
b21b84e78d
|
added some watches
|
2022-07-06 15:46:41 +02:00 |
alexmadison
|
194a7ad196
|
created version of tdc_g without register read functionality
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2022-07-06 15:35:20 +02:00 |