refactored decoder into decoder dualrail

dataflow_neuro/coders.act

@@ -48,6 +48,45 @@ open std::data;
 namespace tmpl {
 	namespace dataflow_neuro {
 
+		/**
+		 * Dualrail decoder.
+		 * Nc is the number of dualrail input channels.
+		 * Then builds N output AND gates, connecting to the right input wires.
+		 */
+		export template<pint Nc, N>
+		defproc decoder_dualrail (Mx1of2<Nc> in; bool? out[N]; power supply) {
+			// signal buffers
+			sigbuf<N> in_tX[Nc];
+			sigbuf<N> in_fX[Nc];	
+			(i:Nc:
+				in_tX[i].supply = supply;
+				in_tX[i].in = in.d[i].t;
+
+				in_fX[i].supply = supply;
+				in_fX[i].in = in.d[i].f;
+			)
+
+			// AND trees
+			pint bitval;
+			andtree<Nc> atree[N];
+			(k:0..N-1:atree[k].supply = supply;)
+			(i:0..N-1:
+				(j:0..Nc-1:
+					bitval = (i & ( 1 << j )) >> j; // Get binary digit of integer i, column j
+					[bitval = 1 ->
+						atree[i].in[j] = in_tX[j].out[i];
+						// atree[i].in[j] = addr_buf.out.d.d[j].t;
+						[]bitval = 0 ->
+						atree[i].in[j] = in_fX[j].out[i];
+						// atree[i].in[j] = addr_buf.out.d.d[j].f;
+						[]bitval >= 2 -> {false : "fuck"};
+						]
+					atree[i].out = out[i];
+					)
+				)
+		}
+
+
 		/**
 		 * 2D decoder which uses a configurable delay from the VCtrees to buffer ack.
 		 *	Nx is the x size of the decoder array
@@ -63,9 +102,6 @@ namespace tmpl {
 
 			// Buffer to recieve concat(x,y) address packet
 			buffer<NxC+NyC> addr_buf(.in = in, .reset_B = reset_B, .supply = supply);
-			// NEED TO BUFFER OUTPUTS FROM BUFFER I RECKON
-
-
 
 			// Validity trees
 			vtree<NxC> vtree_x (.supply = supply);
@@ -91,37 +127,14 @@ namespace tmpl {
 			// FOR TESTING PURPOSES
 			// !!!!!!!!!!!!!!!!
 
-			// AND trees
-			pint bitval;
-			andtree<NxC> atree_x[Nx];
-			(k:0..Nx-1:atree_x[k].supply = supply;)
-			(i:0..Nx-1:
-				(j:0..NxC-1:
-					bitval = (i & ( 1 << j )) >> j; // Get binary digit of integer i, column j
-					[bitval = 1 -> 
-						atree_x[i].in[j] = addr_buf.out.d.d[j].t;
-						[]bitval = 0 ->
-						atree_x[i].in[j] = addr_buf.out.d.d[j].f;
-						[]bitval >= 2 -> {false : "fuck"};
-						]
-					atree_x[i].out = outx[i];
-					)
-				)
 
-			andtree<NyC> atree_y[Ny];
+			// Decoder X/Y And trees
-			(k:0..Ny-1:atree_y[k].supply = supply;)
+			decoder_dualrail<NxC,Nx> d_dr_x(.out = outx, .supply = supply);
-			(i:0..Ny-1:
+			(i:0..NxC-1:d_dr_x.in.d[i] = addr_buf.out.d.d[i];)
-				(j:0..NyC-1:
-					bitval = (i & ( 1 << j )) >> j; // Get binary digit of integer i, column j
-					[bitval = 1 -> 
-						atree_y[i].in[j] = addr_buf.out.d.d[j+NxC].t;
-						[]bitval = 0 ->
-						atree_y[i].in[j] = addr_buf.out.d.d[j+NxC].f;
-						]
-					atree_y[i].out = outy[i];
-					)
-				)
 
+			decoder_dualrail<NyC,Ny> d_dr_y(.out = outy, .supply = supply);
+			(i:0..NyC-1:d_dr_y.in.d[i] = addr_buf.out.d.d[i+NxC];)
+			
 		}
 
 
@@ -348,7 +361,7 @@ namespace tmpl {
 
 
 		export template<pint NxC, NyC, Nx, Ny, ACK_STRENGTH>
-		defproc encoder2D(a1of1 x[Nx]; a1of1 y[Ny]; avMx1of2<(NxC + NyC)> out; power supply; bool reset_B)		{
+		defproc encoder2D(a1of1 inx[Nx]; a1of1 iny[Ny]; avMx1of2<(NxC + NyC)> out; power supply; bool reset_B)		{
 			// Reset buffers
 			pint H = 2*(NxC + NyC); //Reset strength? to be investigated
 			bool _reset_BX,_reset_BXX[H];
@@ -359,10 +372,10 @@ namespace tmpl {
 			a1of1 _arb_out_x, _arb_out_y;
 			a1of1 _x_temp[Nx],_y_temp[Ny]; // For wiring the reqs to the arbtrees
 			(i:Nx:
-				_x_temp[i].r = x[i].r;				
+				_x_temp[i].r = inx[i].r;				
 			)
 			(i:Ny:
-				_y_temp[i].r = y[i].r;				
+				_y_temp[i].r = iny[i].r;				
 			)
 			arbtree<Nx> Xarb(.in = _x_temp,.out = _arb_out_x,.supply = supply);
 			arbtree<Ny> Yarb(.in = _y_temp,.out = _arb_out_y,.supply = supply);
@@ -372,12 +385,12 @@ namespace tmpl {
 			sigbuf_1output<ACK_STRENGTH> y_ack_arb[Ny];
 			(i:Nx:
 				x_ack_arb[i].in = _x_temp[i].a;
-				x_ack_arb[i].out = x[i].a;
+				x_ack_arb[i].out = inx[i].a;
 				x_ack_arb[i].supply = supply;
 			)
 			(i:Ny:
 				y_ack_arb[i].in = _y_temp[i].a;
-				y_ack_arb[i].out = y[i].a;
+				y_ack_arb[i].out = iny[i].a;
 				y_ack_arb[i].supply = supply;
 			)
 
@@ -408,7 +421,7 @@ namespace tmpl {
 
 			// X_req ORtree
 			bool _x_req_array[Nx], _x_v_B;
-			(i:Nx:_x_req_array[i] = x[i].r;)
+			(i:Nx:_x_req_array[i] = inx[i].r;)
 			ortree<Nx> x_req_ortree(.in = _x_req_array,.out = _x_v,.supply = supply); //todo BUFF
 			INV_X1 not_x_req_ortree(.a = _x_v,.y = _x_v_B);
 
@@ -450,12 +463,12 @@ namespace tmpl {
 			// Encoders
 			bool x_acks[Nx];
 			Mx1of2<NxC> x_enc_out;
-			(i:Nx:x_acks[i] = x[i].a;)
+			(i:Nx:x_acks[i] = inx[i].a;)
 			dualrail_encoder<NxC, Nx> x_encoder(.in = x_acks, .out = x_enc_out, .supply = supply);
 
 			bool y_acks[Ny];
 			Mx1of2<NyC> y_enc_out;
-			(i:Ny:y_acks[i] = y[i].a;)
+			(i:Ny:y_acks[i] = iny[i].a;)
 			dualrail_encoder<NyC, Ny> y_encoder(.in = y_acks, .out = y_enc_out, .supply = supply);
 
 			// Valid trees

test/unit_tests/fifo-decoder-neurons-encoder-fifo/test.act

@@ -57,15 +57,14 @@ defproc fifo_decoder_neurons_encoder_fifo (avMx1of2<7> in; avMx1of2<7> out; bool
     and_grid<Nx, Ny> _and_grid(.inx = decoder.outx, .iny = decoder.outy, .supply = supply);
     // Pretend that each "synapse" immediately makes its one neuron "spike".
     // that is, connect the output of each encoder target to the decoder input.
-    nrn_hs_2D_array<Nx,Ny,16> neuron_grid(.reset_B = _reset_B, .supply = supply);
+    nrn_hs_2D_array<Nx,Ny,10> neuron_grid(.reset_B = _reset_B, .supply = supply);
     (i:Nx*Ny:
         // Connect the output bool to the input req of each neuron handshaker
         // Leave ack dangling.
         neuron_grid.in[i].r = _and_grid.out[i];
     )
 
-
+    encoder2D<NxC,NyC,Nx,Ny,4> encoder(.inx = neuron_grid.outx, .iny = neuron_grid.outy,
-    encoder2D<NxC,NyC,Nx,Ny,4> encoder(.x = neuron_grid.outx, .y = neuron_grid.outy,
         .reset_B = _reset_B, .supply = supply);
     fifo<NxC + NyC,5> fifo_post(.in = encoder.out, .out = out, .reset_B = _reset_B, .supply = supply);