488 lines
31 KiB
Verilog
488 lines
31 KiB
Verilog
module tmpl_0_0dataflow__neuro_0_0merge_331_4(Iin1_d_d0_d0 , Iin1_d_d0_d1 , Iin1_d_d1_d0 , Iin1_d_d1_d1 , Iin1_d_d2_d0 , Iin1_d_d2_d1 , Iin1_d_d3_d0 , Iin1_d_d3_d1 , Iin1_d_d4_d0 , Iin1_d_d4_d1 , Iin1_d_d5_d0 , Iin1_d_d5_d1 , Iin1_d_d6_d0 , Iin1_d_d6_d1 , Iin1_d_d7_d0 , Iin1_d_d7_d1 , Iin1_d_d8_d0 , Iin1_d_d8_d1 , Iin1_d_d9_d0 , Iin1_d_d9_d1 , Iin1_d_d10_d0 , Iin1_d_d10_d1 , Iin1_d_d11_d0 , Iin1_d_d11_d1 , Iin1_d_d12_d0 , Iin1_d_d12_d1 , Iin1_d_d13_d0 , Iin1_d_d13_d1 , Iin1_d_d14_d0 , Iin1_d_d14_d1 , Iin1_d_d15_d0 , Iin1_d_d15_d1 , Iin1_d_d16_d0 , Iin1_d_d16_d1 , Iin1_d_d17_d0 , Iin1_d_d17_d1 , Iin1_d_d18_d0 , Iin1_d_d18_d1 , Iin1_d_d19_d0 , Iin1_d_d19_d1 , Iin1_d_d20_d0 , Iin1_d_d20_d1 , Iin1_d_d21_d0 , Iin1_d_d21_d1 , Iin1_d_d22_d0 , Iin1_d_d22_d1 , Iin1_d_d23_d0 , Iin1_d_d23_d1 , Iin1_d_d24_d0 , Iin1_d_d24_d1 , Iin1_d_d25_d0 , Iin1_d_d25_d1 , Iin1_d_d26_d0 , Iin1_d_d26_d1 , Iin1_d_d27_d0 , Iin1_d_d27_d1 , Iin1_d_d28_d0 , Iin1_d_d28_d1 , Iin1_d_d29_d0 , Iin1_d_d29_d1 , Iin1_d_d30_d0 , Iin1_d_d30_d1 , Iin1_a , Iin1_v , Iin2_d_d0_d0 , Iin2_d_d0_d1 , Iin2_d_d1_d0 , Iin2_d_d1_d1 , Iin2_d_d2_d0 , Iin2_d_d2_d1 , Iin2_d_d3_d0 , Iin2_d_d3_d1 , Iin2_d_d4_d0 , Iin2_d_d4_d1 , Iin2_d_d5_d0 , Iin2_d_d5_d1 , Iin2_d_d6_d0 , Iin2_d_d6_d1 , Iin2_d_d7_d0 , Iin2_d_d7_d1 , Iin2_d_d8_d0 , Iin2_d_d8_d1 , Iin2_d_d9_d0 , Iin2_d_d9_d1 , Iin2_d_d10_d0 , Iin2_d_d10_d1 , Iin2_d_d11_d0 , Iin2_d_d11_d1 , Iin2_d_d12_d0 , Iin2_d_d12_d1 , Iin2_d_d13_d0 , Iin2_d_d13_d1 , Iin2_d_d14_d0 , Iin2_d_d14_d1 , Iin2_d_d15_d0 , Iin2_d_d15_d1 , Iin2_d_d16_d0 , Iin2_d_d16_d1 , Iin2_d_d17_d0 , Iin2_d_d17_d1 , Iin2_d_d18_d0 , Iin2_d_d18_d1 , Iin2_d_d19_d0 , Iin2_d_d19_d1 , Iin2_d_d20_d0 , Iin2_d_d20_d1 , Iin2_d_d21_d0 , Iin2_d_d21_d1 , Iin2_d_d22_d0 , Iin2_d_d22_d1 , Iin2_d_d23_d0 , Iin2_d_d23_d1 , Iin2_d_d24_d0 , Iin2_d_d24_d1 , Iin2_d_d25_d0 , Iin2_d_d25_d1 , Iin2_d_d26_d0 , Iin2_d_d26_d1 , Iin2_d_d27_d0 , Iin2_d_d27_d1 , Iin2_d_d28_d0 , Iin2_d_d28_d1 , Iin2_d_d29_d0 , Iin2_d_d29_d1 , Iin2_d_d30_d0 , Iin2_d_d30_d1 , Iin2_a , Iin2_v , Iout_d_d0_d0 , Iout_d_d0_d1 , Iout_d_d1_d0 , Iout_d_d1_d1 , Iout_d_d2_d0 , Iout_d_d2_d1 , Iout_d_d3_d0 , Iout_d_d3_d1 , Iout_d_d4_d0 , Iout_d_d4_d1 , Iout_d_d5_d0 , Iout_d_d5_d1 , Iout_d_d6_d0 , Iout_d_d6_d1 , Iout_d_d7_d0 , Iout_d_d7_d1 , Iout_d_d8_d0 , Iout_d_d8_d1 , Iout_d_d9_d0 , Iout_d_d9_d1 , Iout_d_d10_d0 , Iout_d_d10_d1 , Iout_d_d11_d0 , Iout_d_d11_d1 , Iout_d_d12_d0 , Iout_d_d12_d1 , Iout_d_d13_d0 , Iout_d_d13_d1 , Iout_d_d14_d0 , Iout_d_d14_d1 , Iout_d_d15_d0 , Iout_d_d15_d1 , Iout_d_d16_d0 , Iout_d_d16_d1 , Iout_d_d17_d0 , Iout_d_d17_d1 , Iout_d_d18_d0 , Iout_d_d18_d1 , Iout_d_d19_d0 , Iout_d_d19_d1 , Iout_d_d20_d0 , Iout_d_d20_d1 , Iout_d_d21_d0 , Iout_d_d21_d1 , Iout_d_d22_d0 , Iout_d_d22_d1 , Iout_d_d23_d0 , Iout_d_d23_d1 , Iout_d_d24_d0 , Iout_d_d24_d1 , Iout_d_d25_d0 , Iout_d_d25_d1 , Iout_d_d26_d0 , Iout_d_d26_d1 , Iout_d_d27_d0 , Iout_d_d27_d1 , Iout_d_d28_d0 , Iout_d_d28_d1 , Iout_d_d29_d0 , Iout_d_d29_d1 , Iout_d_d30_d0 , Iout_d_d30_d1 , Iout_a , Iout_v , reset_B, vdd, vss);
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input vdd;
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input vss;
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input Iin1_d_d0_d0 ;
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input Iin1_d_d0_d1 ;
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input Iin1_d_d1_d0 ;
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input Iin1_d_d1_d1 ;
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input Iin1_d_d2_d0 ;
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input Iin1_d_d2_d1 ;
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input Iin1_d_d3_d0 ;
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input Iin1_d_d3_d1 ;
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input Iin1_d_d4_d0 ;
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input Iin1_d_d4_d1 ;
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input Iin1_d_d5_d0 ;
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input Iin1_d_d5_d1 ;
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input Iin1_d_d6_d0 ;
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input Iin1_d_d6_d1 ;
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input Iin1_d_d7_d0 ;
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input Iin1_d_d7_d1 ;
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input Iin1_d_d8_d0 ;
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input Iin1_d_d8_d1 ;
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input Iin1_d_d9_d0 ;
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input Iin1_d_d9_d1 ;
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input Iin1_d_d10_d0 ;
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input Iin1_d_d10_d1 ;
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input Iin1_d_d11_d0 ;
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input Iin1_d_d11_d1 ;
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input Iin1_d_d12_d0 ;
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input Iin1_d_d12_d1 ;
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input Iin1_d_d13_d0 ;
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input Iin1_d_d13_d1 ;
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input Iin1_d_d14_d0 ;
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input Iin1_d_d14_d1 ;
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input Iin1_d_d15_d0 ;
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input Iin1_d_d15_d1 ;
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input Iin1_d_d16_d0 ;
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input Iin1_d_d16_d1 ;
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input Iin1_d_d17_d0 ;
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input Iin1_d_d17_d1 ;
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input Iin1_d_d18_d0 ;
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input Iin1_d_d18_d1 ;
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input Iin1_d_d19_d0 ;
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input Iin1_d_d19_d1 ;
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input Iin1_d_d20_d0 ;
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input Iin1_d_d20_d1 ;
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input Iin1_d_d21_d0 ;
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input Iin1_d_d21_d1 ;
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input Iin1_d_d22_d0 ;
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input Iin1_d_d22_d1 ;
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input Iin1_d_d23_d0 ;
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input Iin1_d_d23_d1 ;
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input Iin1_d_d24_d0 ;
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input Iin1_d_d24_d1 ;
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input Iin1_d_d25_d0 ;
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input Iin1_d_d25_d1 ;
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input Iin1_d_d26_d0 ;
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input Iin1_d_d26_d1 ;
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input Iin1_d_d27_d0 ;
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input Iin1_d_d27_d1 ;
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input Iin1_d_d28_d0 ;
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input Iin1_d_d28_d1 ;
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input Iin1_d_d29_d0 ;
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input Iin1_d_d29_d1 ;
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input Iin1_d_d30_d0 ;
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input Iin1_d_d30_d1 ;
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input Iin2_d_d0_d0 ;
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input Iin2_d_d0_d1 ;
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input Iin2_d_d1_d0 ;
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input Iin2_d_d1_d1 ;
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input Iin2_d_d2_d0 ;
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input Iin2_d_d2_d1 ;
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input Iin2_d_d3_d0 ;
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input Iin2_d_d3_d1 ;
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input Iin2_d_d4_d0 ;
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input Iin2_d_d4_d1 ;
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input Iin2_d_d5_d0 ;
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input Iin2_d_d5_d1 ;
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input Iin2_d_d6_d0 ;
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input Iin2_d_d6_d1 ;
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input Iin2_d_d7_d0 ;
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input Iin2_d_d7_d1 ;
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input Iin2_d_d8_d0 ;
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input Iin2_d_d8_d1 ;
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input Iin2_d_d9_d0 ;
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input Iin2_d_d9_d1 ;
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input Iin2_d_d10_d0 ;
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input Iin2_d_d10_d1 ;
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input Iin2_d_d11_d0 ;
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input Iin2_d_d11_d1 ;
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input Iin2_d_d12_d0 ;
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input Iin2_d_d12_d1 ;
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input Iin2_d_d13_d0 ;
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input Iin2_d_d13_d1 ;
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input Iin2_d_d14_d0 ;
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input Iin2_d_d14_d1 ;
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input Iin2_d_d15_d0 ;
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input Iin2_d_d15_d1 ;
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input Iin2_d_d16_d0 ;
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input Iin2_d_d16_d1 ;
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input Iin2_d_d17_d0 ;
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input Iin2_d_d17_d1 ;
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input Iin2_d_d18_d0 ;
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input Iin2_d_d18_d1 ;
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input Iin2_d_d19_d0 ;
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input Iin2_d_d19_d1 ;
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input Iin2_d_d20_d0 ;
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input Iin2_d_d20_d1 ;
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input Iin2_d_d21_d0 ;
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input Iin2_d_d21_d1 ;
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input Iin2_d_d22_d0 ;
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input Iin2_d_d22_d1 ;
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input Iin2_d_d23_d0 ;
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input Iin2_d_d23_d1 ;
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input Iin2_d_d24_d0 ;
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input Iin2_d_d24_d1 ;
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input Iin2_d_d25_d0 ;
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input Iin2_d_d25_d1 ;
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input Iin2_d_d26_d0 ;
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input Iin2_d_d26_d1 ;
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input Iin2_d_d27_d0 ;
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input Iin2_d_d27_d1 ;
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input Iin2_d_d28_d0 ;
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input Iin2_d_d28_d1 ;
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input Iin2_d_d29_d0 ;
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input Iin2_d_d29_d1 ;
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input Iin2_d_d30_d0 ;
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input Iin2_d_d30_d1 ;
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input Iout_a ;
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input Iout_v ;
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input reset_B;
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// -- signals ---
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output Iout_d_d9_d1 ;
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wire Iin1_d_d9_d0 ;
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output Iout_d_d27_d0 ;
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wire Iin1_d_d19_d1 ;
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wire Iin1_d_d14_d1 ;
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wire Iin2_d_d2_d0 ;
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output Iout_d_d10_d0 ;
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wire Iin1_d_d17_d1 ;
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wire Iin1_d_d7_d0 ;
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output Iout_d_d25_d0 ;
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wire Iin2_d_d26_d1 ;
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wire I_out_temp_d_d0 ;
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wire Iin2_d_d11_d0 ;
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wire Iin2_d_d21_d0 ;
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wire Iin2_d_d0_d1 ;
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wire Iin2_d_d9_d0 ;
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wire Iin2_d_d22_d0 ;
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output Iout_d_d24_d1 ;
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output Iout_d_d20_d1 ;
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wire Iin1_d_d28_d1 ;
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wire I_out_a_BX0 ;
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wire Iin1_d_d16_d0 ;
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wire Iin1_d_d20_d0 ;
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output Iout_d_d23_d1 ;
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output Iout_d_d7_d0 ;
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wire I_in2_arb_X0 ;
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wire reset_B;
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wire I_in1_arb_X0 ;
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wire Iin1_d_d10_d0 ;
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wire Iin1_d_d14_d0 ;
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output Iout_d_d1_d0 ;
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output Iout_d_d9_d0 ;
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wire Iin2_d_d13_d1 ;
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wire Iin1_d_d7_d1 ;
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output Iin2_a ;
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wire Iin1_d_d30_d1 ;
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wire Iin1_d_d3_d0 ;
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wire Iin2_d_d11_d1 ;
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wire Iin1_d_d15_d0 ;
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wire Iin2_d_d15_d1 ;
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wire Iin2_d_d14_d1 ;
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output Iout_d_d19_d0 ;
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wire Iin2_d_d27_d0 ;
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wire _reset_BX ;
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wire Iin1_d_d24_d0 ;
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wire Iin2_d_d19_d1 ;
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output Iout_d_d4_d1 ;
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wire Iin1_d_d15_d1 ;
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wire Iin2_d_d6_d1 ;
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wire Iin2_d_d4_d1 ;
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wire Iin2_d_d8_d0 ;
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wire Iin1_d_d11_d0 ;
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wire Iin2_d_d23_d0 ;
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output Iout_d_d17_d1 ;
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wire Iin1_d_d23_d1 ;
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wire Iin2_d_d12_d0 ;
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output Iout_d_d28_d0 ;
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wire Iin2_d_d23_d1 ;
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wire Iin2_d_d22_d1 ;
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output Iout_d_d11_d1 ;
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output Iout_d_d6_d1 ;
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wire Iin1_d_d22_d1 ;
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wire Iin2_d_d4_d0 ;
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output Iout_d_d6_d0 ;
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wire Iin2_d_d18_d1 ;
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output Iout_d_d4_d0 ;
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output Iout_d_d11_d0 ;
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output Iout_d_d17_d0 ;
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wire Iin1_d_d27_d0 ;
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wire _in1_arb ;
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wire Iin2_d_d5_d1 ;
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wire Iin1_d_d24_d1 ;
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wire Iin1_d_d25_d1 ;
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output Iout_d_d13_d0 ;
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wire Iin2_d_d20_d0 ;
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wire Iin1_d_d0_d1 ;
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wire Iin2_d_d9_d1 ;
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wire Iin2_d_d5_d0 ;
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wire Iin2_d_d6_d0 ;
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wire Iin2_d_d19_d0 ;
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wire Iin2_d_d3_d1 ;
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wire Iin1_d_d26_d1 ;
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wire Iin1_d_d6_d1 ;
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output Iout_d_d8_d0 ;
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wire Iin1_d_d25_d0 ;
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output Iout_d_d29_d1 ;
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output Iout_d_d16_d0 ;
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wire Iin1_d_d19_d0 ;
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output Iout_d_d30_d0 ;
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wire Iin1_d_d1_d0 ;
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wire Iin1_d_d2_d0 ;
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output Iout_d_d22_d1 ;
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output Iout_d_d24_d0 ;
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wire Iin1_d_d5_d1 ;
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output Iout_d_d15_d1 ;
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output Iout_d_d7_d1 ;
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wire Iin1_d_d18_d0 ;
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wire Iin1_d_d22_d0 ;
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output Iout_d_d23_d0 ;
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wire _in2_arb_temp ;
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wire _en ;
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wire Iin1_d_d12_d1 ;
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wire Iout_a ;
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wire Iout_v ;
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output Iout_d_d28_d1 ;
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output Iout_d_d18_d1 ;
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output Iout_d_d13_d1 ;
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wire Iin1_d_d4_d0 ;
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wire Iin1_d_d13_d0 ;
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wire Iin1_d_d17_d0 ;
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wire Iin1_d_d10_d1 ;
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output Iout_d_d14_d1 ;
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output Iout_d_d3_d0 ;
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wire Iin1_d_d1_d1 ;
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wire Iin1_d_d21_d1 ;
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wire Iin1_d_d6_d0 ;
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wire Iin2_d_d10_d0 ;
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wire Iin2_d_d30_d0 ;
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wire Iin1_d_d18_d1 ;
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wire I_en_X0 ;
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wire Iin2_d_d0_d0 ;
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wire Iin1_d_d30_d0 ;
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output Iout_d_d21_d1 ;
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wire _out_a_B ;
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wire Iin2_d_d24_d1 ;
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wire Iin2_d_d3_d0 ;
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wire Iin2_d_d10_d1 ;
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wire Iin1_d_d27_d1 ;
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wire Iin1_d_d23_d0 ;
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wire Iin2_d_d25_d1 ;
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output Iout_d_d3_d1 ;
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wire Iin2_d_d1_d1 ;
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output Iout_d_d1_d1 ;
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wire Iin1_d_d8_d0 ;
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wire Iin1_d_d3_d1 ;
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output Iin1_v ;
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wire I_reset_BXX0 ;
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wire _in1_arb_temp ;
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wire Iin2_d_d7_d0 ;
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wire Iin2_d_d24_d0 ;
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wire Iin1_d_d9_d1 ;
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wire Iin1_d_d11_d1 ;
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wire Iin1_d_d13_d1 ;
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wire Iin2_d_d17_d1 ;
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output Iout_d_d16_d1 ;
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output Iout_d_d12_d0 ;
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wire _in1_a_B ;
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wire Iin2_d_d16_d1 ;
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wire Iin1_d_d0_d0 ;
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output Iout_d_d19_d1 ;
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output Iout_d_d10_d1 ;
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output Iout_d_d0_d0 ;
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wire Iin2_d_d18_d0 ;
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output Iout_d_d20_d0 ;
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wire Iin1_d_d26_d0 ;
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wire Iin2_d_d28_d1 ;
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wire Iin1_d_d5_d0 ;
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wire Iin2_d_d13_d0 ;
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wire Iin2_d_d14_d0 ;
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wire Iin2_d_d17_d0 ;
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output Iout_d_d18_d0 ;
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output Iin2_v ;
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wire Iin2_d_d7_d1 ;
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output Iout_d_d30_d1 ;
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output Iout_d_d5_d1 ;
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output Iout_d_d2_d1 ;
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output Iout_d_d15_d0 ;
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output Iout_d_d27_d1 ;
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wire Iin2_d_d25_d0 ;
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output Iout_d_d25_d1 ;
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wire Iin1_d_d29_d1 ;
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output Iout_d_d21_d0 ;
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output Iout_d_d22_d0 ;
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wire Iin2_d_d15_d0 ;
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wire Iin1_d_d21_d0 ;
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output Iout_d_d29_d0 ;
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wire Iin2_d_d12_d1 ;
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wire Iin2_d_d16_d0 ;
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wire Iin2_d_d26_d0 ;
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wire _in2_a_B ;
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wire Iin1_d_d20_d1 ;
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wire Iin2_d_d21_d1 ;
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wire Iin2_d_d1_d0 ;
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wire Iin1_d_d12_d0 ;
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output Iout_d_d14_d0 ;
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wire Iin2_d_d29_d0 ;
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wire Iin1_d_d16_d1 ;
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wire Iin2_d_d8_d1 ;
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output Iout_d_d0_d1 ;
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wire Iin1_d_d2_d1 ;
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wire Iin1_d_d8_d1 ;
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output Iout_d_d8_d1 ;
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wire Iin1_d_d28_d0 ;
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wire Iin2_d_d29_d1 ;
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output Iout_d_d26_d1 ;
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output Iin1_a ;
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output Iout_d_d2_d0 ;
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output Iout_d_d12_d1 ;
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wire Iin1_d_d29_d0 ;
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output Iout_d_d5_d0 ;
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output Iout_d_d26_d0 ;
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wire Iin1_d_d4_d1 ;
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wire Iin2_d_d30_d1 ;
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wire Iin2_d_d27_d1 ;
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wire Iin2_d_d20_d1 ;
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wire Iin2_d_d2_d1 ;
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wire Iin2_d_d28_d0 ;
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wire _in2_arb ;
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// --- instances
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A_2C2N2N_RB_X1 Imerge_func_f0 (.y(Iout_d_d0_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d0_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d0_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f1 (.y(Iout_d_d1_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d1_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d1_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f2 (.y(Iout_d_d2_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d2_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d2_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f3 (.y(Iout_d_d3_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d3_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d3_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f4 (.y(Iout_d_d4_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d4_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d4_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f5 (.y(Iout_d_d5_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d5_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d5_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f6 (.y(Iout_d_d6_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d6_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d6_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f7 (.y(Iout_d_d7_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d7_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d7_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f8 (.y(Iout_d_d8_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d8_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d8_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f9 (.y(Iout_d_d9_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d9_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d9_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f10 (.y(Iout_d_d10_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d10_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d10_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f11 (.y(Iout_d_d11_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d11_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d11_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f12 (.y(Iout_d_d12_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d12_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d12_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f13 (.y(Iout_d_d13_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d13_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d13_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f14 (.y(Iout_d_d14_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d14_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d14_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f15 (.y(Iout_d_d15_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d15_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d15_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f16 (.y(Iout_d_d16_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d16_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d16_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f17 (.y(Iout_d_d17_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d17_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d17_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f18 (.y(Iout_d_d18_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d18_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d18_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f19 (.y(Iout_d_d19_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d19_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d19_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f20 (.y(Iout_d_d20_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d20_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d20_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f21 (.y(Iout_d_d21_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d21_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d21_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f22 (.y(Iout_d_d22_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d22_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d22_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f23 (.y(Iout_d_d23_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d23_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d23_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f24 (.y(Iout_d_d24_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d24_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d24_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f25 (.y(Iout_d_d25_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d25_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d25_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f26 (.y(Iout_d_d26_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d26_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d26_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f27 (.y(Iout_d_d27_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d27_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d27_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f28 (.y(Iout_d_d28_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d28_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d28_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f29 (.y(Iout_d_d29_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d29_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d29_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_f30 (.y(Iout_d_d30_d0 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d30_d0 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d30_d0 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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tmpl_0_0dataflow__neuro_0_0sigbuf_362_4 Ireset_bufarray (.in(_reset_BX), .Iout0 (I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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tmpl_0_0dataflow__neuro_0_0sigbuf_362_4 Iarb2function2 (.in(_in2_arb), .Iout0 (I_in2_arb_X0 ), .vdd(vdd), .vss(vss));
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AND2_X1 IAND_arb2 (.y(_in2_arb), .a(_in1_a_B), .b(_in2_arb_temp), .vdd(vdd), .vss(vss));
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tmpl_0_0dataflow__neuro_0_0sigbuf_362_4 Iarb2function1 (.in(_in1_arb), .Iout0 (I_in1_arb_X0 ), .vdd(vdd), .vss(vss));
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AND2_X1 IAND_arb1 (.y(_in1_arb), .a(_in2_a_B), .b(_in1_arb_temp), .vdd(vdd), .vss(vss));
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tmpl_0_0dataflow__neuro_0_0sigbuf_362_4 Ien_buffer (.in(_en), .Iout0 (I_en_X0 ), .vdd(vdd), .vss(vss));
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BUF_X1 Ireset_buf (.y(_reset_BX), .a(reset_B), .vdd(vdd), .vss(vss));
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tmpl_0_0dataflow__neuro_0_0vtree_331_4 Ivc1 (.Iin_d0_d0 (Iin1_d_d0_d0 ), .Iin_d0_d1 (Iin1_d_d0_d1 ), .Iin_d1_d0 (Iin1_d_d1_d0 ), .Iin_d1_d1 (Iin1_d_d1_d1 ), .Iin_d2_d0 (Iin1_d_d2_d0 ), .Iin_d2_d1 (Iin1_d_d2_d1 ), .Iin_d3_d0 (Iin1_d_d3_d0 ), .Iin_d3_d1 (Iin1_d_d3_d1 ), .Iin_d4_d0 (Iin1_d_d4_d0 ), .Iin_d4_d1 (Iin1_d_d4_d1 ), .Iin_d5_d0 (Iin1_d_d5_d0 ), .Iin_d5_d1 (Iin1_d_d5_d1 ), .Iin_d6_d0 (Iin1_d_d6_d0 ), .Iin_d6_d1 (Iin1_d_d6_d1 ), .Iin_d7_d0 (Iin1_d_d7_d0 ), .Iin_d7_d1 (Iin1_d_d7_d1 ), .Iin_d8_d0 (Iin1_d_d8_d0 ), .Iin_d8_d1 (Iin1_d_d8_d1 ), .Iin_d9_d0 (Iin1_d_d9_d0 ), .Iin_d9_d1 (Iin1_d_d9_d1 ), .Iin_d10_d0 (Iin1_d_d10_d0 ), .Iin_d10_d1 (Iin1_d_d10_d1 ), .Iin_d11_d0 (Iin1_d_d11_d0 ), .Iin_d11_d1 (Iin1_d_d11_d1 ), .Iin_d12_d0 (Iin1_d_d12_d0 ), .Iin_d12_d1 (Iin1_d_d12_d1 ), .Iin_d13_d0 (Iin1_d_d13_d0 ), .Iin_d13_d1 (Iin1_d_d13_d1 ), .Iin_d14_d0 (Iin1_d_d14_d0 ), .Iin_d14_d1 (Iin1_d_d14_d1 ), .Iin_d15_d0 (Iin1_d_d15_d0 ), .Iin_d15_d1 (Iin1_d_d15_d1 ), .Iin_d16_d0 (Iin1_d_d16_d0 ), .Iin_d16_d1 (Iin1_d_d16_d1 ), .Iin_d17_d0 (Iin1_d_d17_d0 ), .Iin_d17_d1 (Iin1_d_d17_d1 ), .Iin_d18_d0 (Iin1_d_d18_d0 ), .Iin_d18_d1 (Iin1_d_d18_d1 ), .Iin_d19_d0 (Iin1_d_d19_d0 ), .Iin_d19_d1 (Iin1_d_d19_d1 ), .Iin_d20_d0 (Iin1_d_d20_d0 ), .Iin_d20_d1 (Iin1_d_d20_d1 ), .Iin_d21_d0 (Iin1_d_d21_d0 ), .Iin_d21_d1 (Iin1_d_d21_d1 ), .Iin_d22_d0 (Iin1_d_d22_d0 ), .Iin_d22_d1 (Iin1_d_d22_d1 ), .Iin_d23_d0 (Iin1_d_d23_d0 ), .Iin_d23_d1 (Iin1_d_d23_d1 ), .Iin_d24_d0 (Iin1_d_d24_d0 ), .Iin_d24_d1 (Iin1_d_d24_d1 ), .Iin_d25_d0 (Iin1_d_d25_d0 ), .Iin_d25_d1 (Iin1_d_d25_d1 ), .Iin_d26_d0 (Iin1_d_d26_d0 ), .Iin_d26_d1 (Iin1_d_d26_d1 ), .Iin_d27_d0 (Iin1_d_d27_d0 ), .Iin_d27_d1 (Iin1_d_d27_d1 ), .Iin_d28_d0 (Iin1_d_d28_d0 ), .Iin_d28_d1 (Iin1_d_d28_d1 ), .Iin_d29_d0 (Iin1_d_d29_d0 ), .Iin_d29_d1 (Iin1_d_d29_d1 ), .Iin_d30_d0 (Iin1_d_d30_d0 ), .Iin_d30_d1 (Iin1_d_d30_d1 ), .out(Iin1_v ), .vdd(vdd), .vss(vss));
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INV_X1 Iin1ack_ctl_inv (.y(_in1_a_B), .a(Iin1_a ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t0 (.y(Iout_d_d0_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d0_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d0_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t1 (.y(Iout_d_d1_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d1_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d1_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t2 (.y(Iout_d_d2_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d2_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d2_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t3 (.y(Iout_d_d3_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d3_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d3_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t4 (.y(Iout_d_d4_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d4_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d4_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t5 (.y(Iout_d_d5_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d5_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d5_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t6 (.y(Iout_d_d6_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d6_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d6_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t7 (.y(Iout_d_d7_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d7_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d7_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t8 (.y(Iout_d_d8_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d8_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d8_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t9 (.y(Iout_d_d9_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d9_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d9_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t10 (.y(Iout_d_d10_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d10_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d10_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t11 (.y(Iout_d_d11_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d11_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d11_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t12 (.y(Iout_d_d12_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d12_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d12_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t13 (.y(Iout_d_d13_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d13_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d13_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t14 (.y(Iout_d_d14_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d14_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d14_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t15 (.y(Iout_d_d15_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d15_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d15_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t16 (.y(Iout_d_d16_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d16_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d16_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t17 (.y(Iout_d_d17_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d17_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d17_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t18 (.y(Iout_d_d18_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d18_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d18_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t19 (.y(Iout_d_d19_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d19_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d19_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t20 (.y(Iout_d_d20_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d20_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d20_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t21 (.y(Iout_d_d21_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d21_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d21_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t22 (.y(Iout_d_d22_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d22_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d22_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t23 (.y(Iout_d_d23_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d23_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d23_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t24 (.y(Iout_d_d24_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d24_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d24_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t25 (.y(Iout_d_d25_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d25_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d25_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t26 (.y(Iout_d_d26_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d26_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d26_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t27 (.y(Iout_d_d27_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d27_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d27_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t28 (.y(Iout_d_d28_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d28_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d28_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t29 (.y(Iout_d_d29_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d29_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d29_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_2C2N2N_RB_X1 Imerge_func_t30 (.y(Iout_d_d30_d1 ), .c1(I_en_X0 ), .c2(I_out_a_BX0 ), .na1(I_in1_arb_X0 ), .na2(Iin1_d_d30_d1 ), .nb1(I_in2_arb_X0 ), .nb2(Iin2_d_d30_d1 ), .pr_B(I_reset_BXX0 ), .sr_B(I_reset_BXX0 ), .vdd(vdd), .vss(vss));
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A_4C_RB_X4 Iin1ack_ctl (.y(Iin1_a ), .c1(_in1_arb), .c2(_en), .c3(Iin1_v ), .c4(Iout_v ), .pr_B(_reset_BX), .sr_B(_reset_BX), .vdd(vdd), .vss(vss));
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A_4P1N1N_X1 Ien_ctl (.y(_en), .na1(Iin1_a ), .nb1(Iin2_a ), .p1(Iin1_a ), .p2(Iin2_a ), .p3(Iout_a ), .p4(Iout_v ), .vdd(vdd), .vss(vss));
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tmpl_0_0dataflow__neuro_0_0sigbuf_362_4 Iout_a_buffer (.in(_out_a_B), .Iout0 (I_out_a_BX0 ), .vdd(vdd), .vss(vss));
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tmpl_0_0dataflow__neuro_0_0arbiter__handshake Ivalidity_arb (.Iin1_d_d0 (Iin1_v ), .Iin1_a (_in1_arb_temp), .Iin2_d_d0 (Iin2_v ), .Iin2_a (_in2_arb_temp), .Iout_d_d0 (I_out_temp_d_d0 ), .Iout_a (I_out_temp_d_d0 ), .vdd(vdd), .vss(vss));
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INV_X1 Iout_a_inverter (.y(_out_a_B), .a(Iout_a ), .vdd(vdd), .vss(vss));
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tmpl_0_0dataflow__neuro_0_0vtree_331_4 Ivc2 (.Iin_d0_d0 (Iin2_d_d0_d0 ), .Iin_d0_d1 (Iin2_d_d0_d1 ), .Iin_d1_d0 (Iin2_d_d1_d0 ), .Iin_d1_d1 (Iin2_d_d1_d1 ), .Iin_d2_d0 (Iin2_d_d2_d0 ), .Iin_d2_d1 (Iin2_d_d2_d1 ), .Iin_d3_d0 (Iin2_d_d3_d0 ), .Iin_d3_d1 (Iin2_d_d3_d1 ), .Iin_d4_d0 (Iin2_d_d4_d0 ), .Iin_d4_d1 (Iin2_d_d4_d1 ), .Iin_d5_d0 (Iin2_d_d5_d0 ), .Iin_d5_d1 (Iin2_d_d5_d1 ), .Iin_d6_d0 (Iin2_d_d6_d0 ), .Iin_d6_d1 (Iin2_d_d6_d1 ), .Iin_d7_d0 (Iin2_d_d7_d0 ), .Iin_d7_d1 (Iin2_d_d7_d1 ), .Iin_d8_d0 (Iin2_d_d8_d0 ), .Iin_d8_d1 (Iin2_d_d8_d1 ), .Iin_d9_d0 (Iin2_d_d9_d0 ), .Iin_d9_d1 (Iin2_d_d9_d1 ), .Iin_d10_d0 (Iin2_d_d10_d0 ), .Iin_d10_d1 (Iin2_d_d10_d1 ), .Iin_d11_d0 (Iin2_d_d11_d0 ), .Iin_d11_d1 (Iin2_d_d11_d1 ), .Iin_d12_d0 (Iin2_d_d12_d0 ), .Iin_d12_d1 (Iin2_d_d12_d1 ), .Iin_d13_d0 (Iin2_d_d13_d0 ), .Iin_d13_d1 (Iin2_d_d13_d1 ), .Iin_d14_d0 (Iin2_d_d14_d0 ), .Iin_d14_d1 (Iin2_d_d14_d1 ), .Iin_d15_d0 (Iin2_d_d15_d0 ), .Iin_d15_d1 (Iin2_d_d15_d1 ), .Iin_d16_d0 (Iin2_d_d16_d0 ), .Iin_d16_d1 (Iin2_d_d16_d1 ), .Iin_d17_d0 (Iin2_d_d17_d0 ), .Iin_d17_d1 (Iin2_d_d17_d1 ), .Iin_d18_d0 (Iin2_d_d18_d0 ), .Iin_d18_d1 (Iin2_d_d18_d1 ), .Iin_d19_d0 (Iin2_d_d19_d0 ), .Iin_d19_d1 (Iin2_d_d19_d1 ), .Iin_d20_d0 (Iin2_d_d20_d0 ), .Iin_d20_d1 (Iin2_d_d20_d1 ), .Iin_d21_d0 (Iin2_d_d21_d0 ), .Iin_d21_d1 (Iin2_d_d21_d1 ), .Iin_d22_d0 (Iin2_d_d22_d0 ), .Iin_d22_d1 (Iin2_d_d22_d1 ), .Iin_d23_d0 (Iin2_d_d23_d0 ), .Iin_d23_d1 (Iin2_d_d23_d1 ), .Iin_d24_d0 (Iin2_d_d24_d0 ), .Iin_d24_d1 (Iin2_d_d24_d1 ), .Iin_d25_d0 (Iin2_d_d25_d0 ), .Iin_d25_d1 (Iin2_d_d25_d1 ), .Iin_d26_d0 (Iin2_d_d26_d0 ), .Iin_d26_d1 (Iin2_d_d26_d1 ), .Iin_d27_d0 (Iin2_d_d27_d0 ), .Iin_d27_d1 (Iin2_d_d27_d1 ), .Iin_d28_d0 (Iin2_d_d28_d0 ), .Iin_d28_d1 (Iin2_d_d28_d1 ), .Iin_d29_d0 (Iin2_d_d29_d0 ), .Iin_d29_d1 (Iin2_d_d29_d1 ), .Iin_d30_d0 (Iin2_d_d30_d0 ), .Iin_d30_d1 (Iin2_d_d30_d1 ), .out(Iin2_v ), .vdd(vdd), .vss(vss));
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A_4C_RB_X4 Iin2ack_ctl (.y(Iin2_a ), .c1(_in2_arb), .c2(_en), .c3(Iin2_v ), .c4(Iout_v ), .pr_B(_reset_BX), .sr_B(_reset_BX), .vdd(vdd), .vss(vss));
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INV_X1 Iin2ack_ctl_inv (.y(_in2_a_B), .a(Iin2_a ), .vdd(vdd), .vss(vss));
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endmodule |