actlib_dataflow_neuro/test/unit_tests
alexmadison 194a7ad196 created version of tdc_g without register read functionality 2022-07-06 15:35:20 +02:00
..
andtree_5
andtree_15
append_5_3_2 append unit test with fifos 2022-03-25 18:57:35 +01:00
arbiter
arbiter_2
arbiter_handshake_adv
arbiter_handshake_simple
arbiter_tree_simple_nosim arbiter_test redone without fifos 2022-03-08 11:36:25 +01:00
arbiter_tree_test started register_v2 with reading and writing abilities 2022-03-09 13:05:08 +01:00
arbtree_5 before the git gets fucked 2022-04-04 17:35:34 +02:00
async_instantiate
bd-fifo-register-fifo-bd bd fifo register unit test working... 2022-04-05 10:02:37 +02:00
bd2qdi_5 bd2qdi ole backseat reved 2022-03-25 15:43:46 +01:00
buf_15
buf_s_5 before the git gets fucked 2022-04-04 17:35:34 +02:00
buffer_register_7 buffer register unit tests init 2022-04-01 20:47:04 +02:00
buffer_token
ctree_15
decoder_2d_dly_8_16 before the git gets fucked 2022-04-04 17:35:34 +02:00
decoder_2d_dly_and_2_4 before the git gets fucked 2022-04-04 17:35:34 +02:00
decoder_2d_hs before the git gets fucked 2022-04-04 17:35:34 +02:00
decoder_2d_hybrid decoder 2d hybrid unit tests working 2022-03-31 18:00:08 +02:00
delayprog_4 before the git gets fucked 2022-04-04 17:35:34 +02:00
demux_7 added more demuxs 2022-04-04 17:27:19 +02:00
demux_bit_7 added more demuxs 2022-04-04 17:27:19 +02:00
demux_td_2 before the git gets fucked 2022-04-04 17:35:34 +02:00
demux_td_2_SIGN
dropper_static dropper static with unit tests 2022-04-04 15:13:39 +02:00
encoder1d_7 encoder1d passed unit tests 2022-04-11 19:49:22 +02:00
encoder1d_bd encoder1d with bd simmed 2022-04-21 16:09:13 +02:00
encoder2D_2x2 encoder8x8sim 2022-03-18 11:39:30 +01:00
encoder2D_8x7 before the git gets fucked 2022-04-04 17:35:34 +02:00
encoder2D_8x8 encoder2d revd mdsn 2022-03-22 16:29:30 +01:00
encoder_7 renamed encoder to dualrail_encoder 2022-03-04 14:53:14 +01:00
fifo-decoder-neurons-encoder-fifo before the git gets fucked 2022-04-04 17:35:34 +02:00
fifo-decoder_hs-neurons-encoder-fifo nrn_hs fifo etc unit test working 2022-03-31 16:20:23 +02:00
fifo-decoder_hybrid-neurons-encoder-fifo hybrid decoder in fifo train working 2022-03-31 18:06:47 +02:00
fifo-register-fifo fifo reg fifo unit test working 2022-04-04 09:49:51 +02:00
fifo3_8bit
fifo_demux_bit_7_fifo Auto stash before merge of "dev" and "origin/dev" 2022-04-15 12:48:50 +02:00
fifo_t_5
fifo_t_15
flipflop flipflop updated 2022-03-30 16:03:01 +02:00
fork_15
line_end_pull_up Added stuff for line end pull U/D 2022-03-04 12:33:49 +01:00
merge_t_2_adv
merge_t_2_simple
nrn_hs_2D_array_3x5 before the git gets fucked 2022-04-04 17:35:34 +02:00
nrn_hs_2d Auto stash before merge of "dev" and "origin/dev" 2022-04-15 12:48:50 +02:00
ortree_15
qdi2bd_5 before the git gets fucked 2022-04-04 17:35:34 +02:00
registerA_w registerA_w unit test working 2022-04-01 20:46:45 +02:00
registerA_w_array before the git gets fucked 2022-04-04 17:35:34 +02:00
registerA_wr_array register rw passed initial tests 2022-04-02 18:31:45 +02:00
register_write pushing register 2022-03-30 15:01:50 +02:00
register_wrw before the git gets fucked 2022-04-04 17:35:34 +02:00
sadc_encoder removed inverted inputs from sadc encoder, regenned with proper reset sigs I hope 2022-07-01 17:26:55 +02:00
sadc_hs added tests for dynapse sadc hs 2022-07-05 10:53:17 +02:00
sigbuf_15
std_instantiate
texel_dualcore added reset sigs to neuron syn cores 2022-05-02 18:49:57 +02:00
texel_dualcore_glue removed extra supply vss lines from tiehi/lows 2022-06-29 18:25:44 +02:00
texel_dualcore_glue_mapper test merge of sram rw output working 2022-05-10 15:34:04 +02:00
texel_dualcore_glue_noread created version of tdc_g without register read functionality 2022-07-06 15:35:20 +02:00
texel_dualcore_glue_slimreg generated a tdc_glue with only 8 registers 2022-07-06 14:06:19 +02:00
texel_dualcore_glue_small tdc glue small for testing 2022-06-23 17:54:10 +02:00
texel_dualcore_innovus regenned texel dualcore innovus fairly finaly?? 2022-05-02 19:45:34 +02:00
texel_encoder1d_bd_sadc added sadc encoder with inputs low active for dynapse sadcs 2022-06-29 13:18:42 +02:00
texel_in30 added monitor decoders 2022-04-08 17:55:12 +02:00
texel_in30_noNrn texel30 with manual neurons passing tests 2022-04-08 18:36:58 +02:00
texel_small Auto stash before merge of "dev" and "origin/dev" 2022-04-15 12:48:50 +02:00
vtree_5 added a vtree_5 test 2022-03-05 20:29:02 +01:00
vtree_15
.DS_Store Auto stash before rebase of "origin/dev" 2022-03-30 15:03:55 +02:00
buf_15.v Added stuff for line end pull U/D 2022-03-04 12:33:49 +01:00
buf_15_friendly2.v encoder sim still not working 2022-03-08 18:49:04 +01:00
buff.v added more demuxs 2022-04-04 17:27:19 +02:00
helper.scm added set bd channel without setting r 2022-04-10 13:59:27 +02:00
init.prs
init_qdi.prsim before the git gets fucked 2022-04-04 17:35:34 +02:00
nrn_hs_2d.v Auto stash before merge of "dev" and "origin/dev" 2022-04-15 12:48:50 +02:00
nrn_hs_2d_clean.v Auto stash before merge of "dev" and "origin/dev" 2022-04-15 12:48:50 +02:00
texel_small.net Auto stash before merge of "dev" and "origin/dev" 2022-04-15 12:48:50 +02:00
texel_small.v Auto stash before merge of "dev" and "origin/dev" 2022-04-15 12:48:50 +02:00
texel_small_clean.v Auto stash before merge of "dev" and "origin/dev" 2022-04-15 12:48:50 +02:00