389 lines
26 KiB
Verilog
389 lines
26 KiB
Verilog
module tmpl_0_0dataflow__neuro_0_0fifo_330_73_4(Iin_d_d0_d0 , Iin_d_d0_d1 , Iin_d_d1_d0 , Iin_d_d1_d1 , Iin_d_d2_d0 , Iin_d_d2_d1 , Iin_d_d3_d0 , Iin_d_d3_d1 , Iin_d_d4_d0 , Iin_d_d4_d1 , Iin_d_d5_d0 , Iin_d_d5_d1 , Iin_d_d6_d0 , Iin_d_d6_d1 , Iin_d_d7_d0 , Iin_d_d7_d1 , Iin_d_d8_d0 , Iin_d_d8_d1 , Iin_d_d9_d0 , Iin_d_d9_d1 , Iin_d_d10_d0 , Iin_d_d10_d1 , Iin_d_d11_d0 , Iin_d_d11_d1 , Iin_d_d12_d0 , Iin_d_d12_d1 , Iin_d_d13_d0 , Iin_d_d13_d1 , Iin_d_d14_d0 , Iin_d_d14_d1 , Iin_d_d15_d0 , Iin_d_d15_d1 , Iin_d_d16_d0 , Iin_d_d16_d1 , Iin_d_d17_d0 , Iin_d_d17_d1 , Iin_d_d18_d0 , Iin_d_d18_d1 , Iin_d_d19_d0 , Iin_d_d19_d1 , Iin_d_d20_d0 , Iin_d_d20_d1 , Iin_d_d21_d0 , Iin_d_d21_d1 , Iin_d_d22_d0 , Iin_d_d22_d1 , Iin_d_d23_d0 , Iin_d_d23_d1 , Iin_d_d24_d0 , Iin_d_d24_d1 , Iin_d_d25_d0 , Iin_d_d25_d1 , Iin_d_d26_d0 , Iin_d_d26_d1 , Iin_d_d27_d0 , Iin_d_d27_d1 , Iin_d_d28_d0 , Iin_d_d28_d1 , Iin_d_d29_d0 , Iin_d_d29_d1 , Iin_a , Iin_v , Iout_d_d0_d0 , Iout_d_d0_d1 , Iout_d_d1_d0 , Iout_d_d1_d1 , Iout_d_d2_d0 , Iout_d_d2_d1 , Iout_d_d3_d0 , Iout_d_d3_d1 , Iout_d_d4_d0 , Iout_d_d4_d1 , Iout_d_d5_d0 , Iout_d_d5_d1 , Iout_d_d6_d0 , Iout_d_d6_d1 , Iout_d_d7_d0 , Iout_d_d7_d1 , Iout_d_d8_d0 , Iout_d_d8_d1 , Iout_d_d9_d0 , Iout_d_d9_d1 , Iout_d_d10_d0 , Iout_d_d10_d1 , Iout_d_d11_d0 , Iout_d_d11_d1 , Iout_d_d12_d0 , Iout_d_d12_d1 , Iout_d_d13_d0 , Iout_d_d13_d1 , Iout_d_d14_d0 , Iout_d_d14_d1 , Iout_d_d15_d0 , Iout_d_d15_d1 , Iout_d_d16_d0 , Iout_d_d16_d1 , Iout_d_d17_d0 , Iout_d_d17_d1 , Iout_d_d18_d0 , Iout_d_d18_d1 , Iout_d_d19_d0 , Iout_d_d19_d1 , Iout_d_d20_d0 , Iout_d_d20_d1 , Iout_d_d21_d0 , Iout_d_d21_d1 , Iout_d_d22_d0 , Iout_d_d22_d1 , Iout_d_d23_d0 , Iout_d_d23_d1 , Iout_d_d24_d0 , Iout_d_d24_d1 , Iout_d_d25_d0 , Iout_d_d25_d1 , Iout_d_d26_d0 , Iout_d_d26_d1 , Iout_d_d27_d0 , Iout_d_d27_d1 , Iout_d_d28_d0 , Iout_d_d28_d1 , Iout_d_d29_d0 , Iout_d_d29_d1 , Iout_a , Iout_v , reset_B, vdd, vss);
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input vdd;
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input vss;
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input Iin_d_d0_d0 ;
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input Iin_d_d0_d1 ;
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input Iin_d_d1_d0 ;
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input Iin_d_d1_d1 ;
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input Iin_d_d2_d0 ;
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input Iin_d_d2_d1 ;
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input Iin_d_d3_d0 ;
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input Iin_d_d3_d1 ;
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input Iin_d_d4_d0 ;
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input Iin_d_d4_d1 ;
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input Iin_d_d5_d0 ;
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input Iin_d_d5_d1 ;
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input Iin_d_d6_d0 ;
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input Iin_d_d6_d1 ;
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input Iin_d_d7_d0 ;
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input Iin_d_d7_d1 ;
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input Iin_d_d8_d0 ;
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input Iin_d_d8_d1 ;
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input Iin_d_d9_d0 ;
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input Iin_d_d9_d1 ;
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input Iin_d_d10_d0 ;
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input Iin_d_d10_d1 ;
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input Iin_d_d11_d0 ;
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input Iin_d_d11_d1 ;
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input Iin_d_d12_d0 ;
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input Iin_d_d12_d1 ;
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input Iin_d_d13_d0 ;
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input Iin_d_d13_d1 ;
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input Iin_d_d14_d0 ;
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input Iin_d_d14_d1 ;
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input Iin_d_d15_d0 ;
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input Iin_d_d15_d1 ;
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input Iin_d_d16_d0 ;
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input Iin_d_d16_d1 ;
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input Iin_d_d17_d0 ;
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input Iin_d_d17_d1 ;
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input Iin_d_d18_d0 ;
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input Iin_d_d18_d1 ;
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input Iin_d_d19_d0 ;
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input Iin_d_d19_d1 ;
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input Iin_d_d20_d0 ;
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input Iin_d_d20_d1 ;
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input Iin_d_d21_d0 ;
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input Iin_d_d21_d1 ;
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input Iin_d_d22_d0 ;
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input Iin_d_d22_d1 ;
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input Iin_d_d23_d0 ;
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input Iin_d_d23_d1 ;
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input Iin_d_d24_d0 ;
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input Iin_d_d24_d1 ;
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input Iin_d_d25_d0 ;
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input Iin_d_d25_d1 ;
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input Iin_d_d26_d0 ;
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input Iin_d_d26_d1 ;
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input Iin_d_d27_d0 ;
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input Iin_d_d27_d1 ;
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input Iin_d_d28_d0 ;
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input Iin_d_d28_d1 ;
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input Iin_d_d29_d0 ;
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input Iin_d_d29_d1 ;
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input Iout_a ;
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input Iout_v ;
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input reset_B;
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// -- signals ---
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output Iout_d_d4_d0 ;
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output Iout_d_d1_d0 ;
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wire Ififo_element2_in_d_d15_d1 ;
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wire Ififo_element2_in_d_d1_d1 ;
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output Iin_a ;
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wire Iout_v ;
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output Iout_d_d23_d1 ;
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wire Ififo_element2_in_d_d15_d0 ;
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wire Ififo_element2_in_d_d14_d0 ;
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wire Ififo_element1_in_d_d10_d0 ;
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output Iout_d_d26_d1 ;
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output Iout_d_d14_d1 ;
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output Iout_d_d14_d0 ;
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wire Iin_d_d22_d0 ;
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wire Iin_d_d24_d1 ;
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wire Iin_d_d27_d1 ;
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wire Ififo_element1_in_d_d26_d0 ;
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wire Ififo_element1_in_d_d29_d0 ;
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output Iout_d_d29_d0 ;
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wire Ififo_element2_in_d_d28_d1 ;
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wire Ififo_element2_in_d_d22_d1 ;
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wire reset_B;
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wire Iin_d_d16_d1 ;
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wire Ififo_element1_in_d_d27_d1 ;
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output Iout_d_d24_d0 ;
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output Iout_d_d21_d1 ;
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output Iout_d_d11_d1 ;
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wire Ififo_element2_in_d_d6_d1 ;
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wire Iin_d_d7_d0 ;
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wire Ififo_element1_in_d_d23_d1 ;
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output Iout_d_d7_d1 ;
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wire Ififo_element2_in_d_d18_d0 ;
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wire Iin_d_d3_d0 ;
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wire Ififo_element1_in_d_d20_d0 ;
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output Iout_d_d3_d0 ;
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wire Iin_d_d9_d1 ;
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wire Iin_d_d10_d1 ;
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wire Iin_d_d26_d0 ;
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wire Ififo_element1_in_d_d4_d0 ;
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output Iout_d_d13_d1 ;
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wire Ififo_element2_in_d_d27_d0 ;
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wire Iin_d_d1_d1 ;
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wire Iin_d_d27_d0 ;
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wire Iin_d_d28_d0 ;
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wire Iin_d_d10_d0 ;
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wire Iin_d_d23_d0 ;
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wire Iin_d_d26_d1 ;
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output Iout_d_d12_d1 ;
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wire Ififo_element2_in_d_d13_d0 ;
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wire Ififo_element2_in_d_d12_d1 ;
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wire Ififo_element2_in_d_d2_d1 ;
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wire Iin_d_d0_d1 ;
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wire Iin_d_d11_d1 ;
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wire Iin_d_d14_d0 ;
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wire Iin_d_d22_d1 ;
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wire Ififo_element1_in_d_d21_d0 ;
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wire Ififo_element1_in_d_d2_d0 ;
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wire Ififo_element1_in_d_d19_d0 ;
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output Iout_d_d20_d1 ;
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wire Iin_d_d25_d1 ;
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wire Ififo_element1_in_d_d1_d0 ;
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wire Ififo_element1_in_d_d6_d0 ;
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output Iout_d_d5_d0 ;
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wire Ififo_element2_in_d_d24_d1 ;
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wire Ififo_element2_in_d_d23_d1 ;
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wire Ififo_element2_in_d_d20_d1 ;
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output Iout_d_d28_d0 ;
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output Iout_d_d15_d1 ;
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wire Ififo_element2_in_d_d14_d1 ;
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wire Ififo_element1_in_d_d12_d1 ;
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wire Ififo_element2_in_d_d21_d0 ;
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wire Iin_d_d3_d1 ;
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wire Iin_d_d5_d0 ;
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wire Ififo_element1_in_d_d1_d1 ;
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wire Ififo_element1_in_d_d3_d0 ;
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output Iout_d_d19_d0 ;
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wire Ififo_element2_in_d_d4_d1 ;
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wire Iin_d_d2_d1 ;
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wire Iin_d_d29_d1 ;
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wire Ififo_element1_in_d_d12_d0 ;
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wire Ififo_element1_in_d_d24_d1 ;
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wire Iout_a ;
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output Iout_d_d19_d1 ;
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wire Ififo_element2_in_d_d26_d1 ;
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wire Ififo_element2_in_d_d16_d1 ;
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wire Ififo_element2_in_d_d4_d0 ;
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wire Iin_d_d18_d0 ;
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output Iout_d_d13_d0 ;
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wire Iin_d_d5_d1 ;
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wire Iin_d_d29_d0 ;
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wire Ififo_element1_in_d_d28_d1 ;
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wire Iin_d_d4_d0 ;
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wire Ififo_element1_in_d_d0_d0 ;
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wire Ififo_element2_in_d_d0_d0 ;
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output Iout_d_d27_d1 ;
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wire Ififo_element2_in_d_d7_d0 ;
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wire Iin_d_d7_d1 ;
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wire Iin_d_d2_d0 ;
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wire Ififo_element1_in_d_d10_d1 ;
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output Iout_d_d21_d0 ;
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output Iout_d_d16_d1 ;
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output Iout_d_d9_d0 ;
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output Iout_d_d8_d0 ;
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wire Iin_d_d24_d0 ;
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wire Iin_d_d25_d0 ;
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wire Ififo_element1_in_d_d5_d0 ;
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wire Ififo_element1_in_d_d9_d0 ;
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output Iout_d_d22_d0 ;
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wire Ififo_element2_in_d_d25_d0 ;
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wire Ififo_element2_in_d_d5_d0 ;
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wire Iin_d_d13_d0 ;
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wire Ififo_element1_in_d_d0_d1 ;
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wire Ififo_element1_in_d_d13_d0 ;
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wire Ififo_element1_in_d_d15_d1 ;
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wire Ififo_element2_in_d_d11_d0 ;
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wire Ififo_element2_in_d_d10_d0 ;
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wire Iin_d_d6_d0 ;
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wire Ififo_element1_in_d_d5_d1 ;
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wire Ififo_element1_in_d_d8_d1 ;
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wire Ififo_element1_in_d_d27_d0 ;
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output Iout_d_d20_d0 ;
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output Iout_d_d4_d1 ;
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output Iout_d_d2_d1 ;
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wire Ififo_element2_in_d_d12_d0 ;
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wire Ififo_element1_in_d_d17_d1 ;
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output Iout_d_d18_d0 ;
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wire Ififo_element1_in_d_d17_d0 ;
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wire Ififo_element1_in_d_d23_d0 ;
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output Iout_d_d10_d1 ;
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wire Ififo_element2_in_d_d21_d1 ;
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wire Ififo_element2_in_d_d11_d1 ;
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wire Ififo_element2_in_d_d6_d0 ;
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wire Ififo_element2_in_d_d13_d1 ;
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wire I_reset_BXX2 ;
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output Iout_d_d25_d1 ;
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output Iout_d_d8_d1 ;
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output Iout_d_d6_d1 ;
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wire Ififo_element2_in_d_d3_d0 ;
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wire Ififo_element1_in_d_d9_d1 ;
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wire Ififo_element1_in_d_d24_d0 ;
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wire Ififo_element1_in_d_d11_d1 ;
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wire Ififo_element1_in_d_d22_d1 ;
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wire Iin_d_d11_d0 ;
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wire Iin_d_d28_d1 ;
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wire Ififo_element1_in_d_d19_d1 ;
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wire Iin_d_d21_d0 ;
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wire Ififo_element1_in_d_d4_d1 ;
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wire Ififo_element2_in_d_d0_d1 ;
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output Iout_d_d7_d0 ;
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wire Ififo_element2_in_d_d23_d0 ;
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wire Ififo_element2_in_d_d22_d0 ;
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wire Ififo_element1_in_d_d22_d0 ;
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wire Ififo_element2_in_d_d19_d0 ;
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wire Iin_d_d1_d0 ;
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wire Iin_d_d6_d1 ;
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wire Iin_d_d17_d0 ;
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wire Ififo_element1_in_v ;
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output Iout_d_d17_d0 ;
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output Iout_d_d16_d0 ;
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wire Iin_d_d0_d0 ;
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wire Iin_d_d15_d1 ;
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wire Ififo_element1_in_a ;
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output Iout_d_d18_d1 ;
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output Iout_d_d17_d1 ;
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wire Iin_d_d16_d0 ;
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output Iout_d_d9_d1 ;
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wire Ififo_element2_in_d_d18_d1 ;
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wire Ififo_element2_in_d_d8_d0 ;
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wire Ififo_element1_in_d_d6_d1 ;
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wire Ififo_element1_in_d_d25_d1 ;
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output Iout_d_d15_d0 ;
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wire Ififo_element1_in_d_d7_d0 ;
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wire Ififo_element1_in_d_d21_d1 ;
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wire Ififo_element1_in_d_d28_d0 ;
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output Iout_d_d29_d1 ;
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output Iout_d_d28_d1 ;
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wire Ififo_element2_in_a ;
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wire Iin_d_d12_d0 ;
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wire Ififo_element1_in_d_d15_d0 ;
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wire Ififo_element1_in_d_d20_d1 ;
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output Iout_d_d12_d0 ;
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wire Ififo_element2_in_d_d29_d0 ;
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wire Iin_d_d20_d0 ;
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wire Ififo_element1_in_d_d14_d1 ;
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wire Ififo_element2_in_v ;
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wire Ififo_element2_in_d_d8_d1 ;
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wire Iin_d_d12_d1 ;
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wire Iin_d_d20_d1 ;
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output Iout_d_d23_d0 ;
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wire Ififo_element1_in_d_d3_d1 ;
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output Iout_d_d5_d1 ;
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wire Ififo_element2_in_d_d26_d0 ;
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wire Ififo_element2_in_d_d2_d0 ;
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wire _reset_BX ;
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wire Iin_d_d23_d1 ;
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output Iin_v ;
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wire Ififo_element1_in_d_d7_d1 ;
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wire Ififo_element1_in_d_d13_d1 ;
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output Iout_d_d1_d1 ;
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wire Ififo_element2_in_d_d3_d1 ;
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wire Iin_d_d14_d1 ;
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wire Iin_d_d15_d0 ;
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output Iout_d_d25_d0 ;
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output Iout_d_d22_d1 ;
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wire Ififo_element2_in_d_d27_d1 ;
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wire Iin_d_d9_d0 ;
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wire Ififo_element1_in_d_d2_d1 ;
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wire Ififo_element1_in_d_d16_d1 ;
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wire Ififo_element1_in_d_d18_d1 ;
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output Iout_d_d6_d0 ;
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wire Ififo_element1_in_d_d16_d0 ;
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wire Ififo_element1_in_d_d25_d0 ;
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output Iout_d_d0_d0 ;
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wire Ififo_element2_in_d_d17_d0 ;
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wire Ififo_element2_in_d_d9_d1 ;
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wire Iin_d_d4_d1 ;
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wire Iin_d_d19_d0 ;
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wire Ififo_element1_in_d_d26_d1 ;
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wire Ififo_element1_in_d_d29_d1 ;
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output Iout_d_d27_d0 ;
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output Iout_d_d11_d0 ;
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wire Iin_d_d8_d0 ;
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wire Ififo_element1_in_d_d18_d0 ;
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wire Ififo_element2_in_d_d19_d1 ;
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wire Ififo_element2_in_d_d17_d1 ;
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wire Ififo_element2_in_d_d9_d0 ;
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wire Iin_d_d17_d1 ;
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output Iout_d_d2_d0 ;
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output Iout_d_d0_d1 ;
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wire Ififo_element2_in_d_d16_d0 ;
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wire Ififo_element2_in_d_d10_d1 ;
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wire Iin_d_d19_d1 ;
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output Iout_d_d24_d1 ;
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wire Ififo_element2_in_d_d24_d0 ;
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wire Ififo_element2_in_d_d20_d0 ;
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wire Ififo_element2_in_d_d7_d1 ;
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wire Iin_d_d21_d1 ;
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wire Ififo_element1_in_d_d8_d0 ;
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output Iout_d_d26_d0 ;
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wire Ififo_element2_in_d_d25_d1 ;
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wire Iin_d_d8_d1 ;
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wire Ififo_element2_in_d_d5_d1 ;
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wire Ififo_element1_in_d_d14_d0 ;
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output Iout_d_d10_d0 ;
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output Iout_d_d3_d1 ;
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wire Ififo_element2_in_d_d29_d1 ;
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wire Ififo_element2_in_d_d28_d0 ;
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wire Ififo_element2_in_d_d1_d0 ;
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wire Iin_d_d18_d1 ;
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wire Ififo_element1_in_d_d11_d0 ;
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wire Iin_d_d13_d1 ;
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// --- instances
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tmpl_0_0dataflow__neuro_0_0sigbuf_33_4 Ireset_bufarray (.in(_reset_BX), .Iout0 (I_reset_BXX2 ), .vdd(vdd), .vss(vss));
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BUF_X1 Ireset_buf (.y(_reset_BX), .a(reset_B), .vdd(vdd), .vss(vss));
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tmpl_0_0dataflow__neuro_0_0buffer_330_4 Ififo_element0 (.Iin_d_d0_d0 (Iin_d_d0_d0 ), .Iin_d_d0_d1 (Iin_d_d0_d1 ), .Iin_d_d1_d0 (Iin_d_d1_d0 ), .Iin_d_d1_d1 (Iin_d_d1_d1 ), .Iin_d_d2_d0 (Iin_d_d2_d0 ), .Iin_d_d2_d1 (Iin_d_d2_d1 ), .Iin_d_d3_d0 (Iin_d_d3_d0 ), .Iin_d_d3_d1 (Iin_d_d3_d1 ), .Iin_d_d4_d0 (Iin_d_d4_d0 ), .Iin_d_d4_d1 (Iin_d_d4_d1 ), .Iin_d_d5_d0 (Iin_d_d5_d0 ), .Iin_d_d5_d1 (Iin_d_d5_d1 ), .Iin_d_d6_d0 (Iin_d_d6_d0 ), .Iin_d_d6_d1 (Iin_d_d6_d1 ), .Iin_d_d7_d0 (Iin_d_d7_d0 ), .Iin_d_d7_d1 (Iin_d_d7_d1 ), .Iin_d_d8_d0 (Iin_d_d8_d0 ), .Iin_d_d8_d1 (Iin_d_d8_d1 ), .Iin_d_d9_d0 (Iin_d_d9_d0 ), .Iin_d_d9_d1 (Iin_d_d9_d1 ), .Iin_d_d10_d0 (Iin_d_d10_d0 ), .Iin_d_d10_d1 (Iin_d_d10_d1 ), .Iin_d_d11_d0 (Iin_d_d11_d0 ), .Iin_d_d11_d1 (Iin_d_d11_d1 ), .Iin_d_d12_d0 (Iin_d_d12_d0 ), .Iin_d_d12_d1 (Iin_d_d12_d1 ), .Iin_d_d13_d0 (Iin_d_d13_d0 ), .Iin_d_d13_d1 (Iin_d_d13_d1 ), .Iin_d_d14_d0 (Iin_d_d14_d0 ), .Iin_d_d14_d1 (Iin_d_d14_d1 ), .Iin_d_d15_d0 (Iin_d_d15_d0 ), .Iin_d_d15_d1 (Iin_d_d15_d1 ), .Iin_d_d16_d0 (Iin_d_d16_d0 ), .Iin_d_d16_d1 (Iin_d_d16_d1 ), .Iin_d_d17_d0 (Iin_d_d17_d0 ), .Iin_d_d17_d1 (Iin_d_d17_d1 ), .Iin_d_d18_d0 (Iin_d_d18_d0 ), .Iin_d_d18_d1 (Iin_d_d18_d1 ), .Iin_d_d19_d0 (Iin_d_d19_d0 ), .Iin_d_d19_d1 (Iin_d_d19_d1 ), .Iin_d_d20_d0 (Iin_d_d20_d0 ), .Iin_d_d20_d1 (Iin_d_d20_d1 ), .Iin_d_d21_d0 (Iin_d_d21_d0 ), .Iin_d_d21_d1 (Iin_d_d21_d1 ), .Iin_d_d22_d0 (Iin_d_d22_d0 ), .Iin_d_d22_d1 (Iin_d_d22_d1 ), .Iin_d_d23_d0 (Iin_d_d23_d0 ), .Iin_d_d23_d1 (Iin_d_d23_d1 ), .Iin_d_d24_d0 (Iin_d_d24_d0 ), .Iin_d_d24_d1 (Iin_d_d24_d1 ), .Iin_d_d25_d0 (Iin_d_d25_d0 ), .Iin_d_d25_d1 (Iin_d_d25_d1 ), .Iin_d_d26_d0 (Iin_d_d26_d0 ), .Iin_d_d26_d1 (Iin_d_d26_d1 ), .Iin_d_d27_d0 (Iin_d_d27_d0 ), .Iin_d_d27_d1 (Iin_d_d27_d1 ), .Iin_d_d28_d0 (Iin_d_d28_d0 ), .Iin_d_d28_d1 (Iin_d_d28_d1 ), .Iin_d_d29_d0 (Iin_d_d29_d0 ), .Iin_d_d29_d1 (Iin_d_d29_d1 ), .Iin_a (Iin_a ), .Iin_v (Iin_v ), .Iout_d_d0_d0 (Ififo_element1_in_d_d0_d0 ), .Iout_d_d0_d1 (Ififo_element1_in_d_d0_d1 ), .Iout_d_d1_d0 (Ififo_element1_in_d_d1_d0 ), .Iout_d_d1_d1 (Ififo_element1_in_d_d1_d1 ), .Iout_d_d2_d0 (Ififo_element1_in_d_d2_d0 ), .Iout_d_d2_d1 (Ififo_element1_in_d_d2_d1 ), .Iout_d_d3_d0 (Ififo_element1_in_d_d3_d0 ), .Iout_d_d3_d1 (Ififo_element1_in_d_d3_d1 ), .Iout_d_d4_d0 (Ififo_element1_in_d_d4_d0 ), .Iout_d_d4_d1 (Ififo_element1_in_d_d4_d1 ), .Iout_d_d5_d0 (Ififo_element1_in_d_d5_d0 ), .Iout_d_d5_d1 (Ififo_element1_in_d_d5_d1 ), .Iout_d_d6_d0 (Ififo_element1_in_d_d6_d0 ), .Iout_d_d6_d1 (Ififo_element1_in_d_d6_d1 ), .Iout_d_d7_d0 (Ififo_element1_in_d_d7_d0 ), .Iout_d_d7_d1 (Ififo_element1_in_d_d7_d1 ), .Iout_d_d8_d0 (Ififo_element1_in_d_d8_d0 ), .Iout_d_d8_d1 (Ififo_element1_in_d_d8_d1 ), .Iout_d_d9_d0 (Ififo_element1_in_d_d9_d0 ), .Iout_d_d9_d1 (Ififo_element1_in_d_d9_d1 ), .Iout_d_d10_d0 (Ififo_element1_in_d_d10_d0 ), .Iout_d_d10_d1 (Ififo_element1_in_d_d10_d1 ), .Iout_d_d11_d0 (Ififo_element1_in_d_d11_d0 ), .Iout_d_d11_d1 (Ififo_element1_in_d_d11_d1 ), .Iout_d_d12_d0 (Ififo_element1_in_d_d12_d0 ), .Iout_d_d12_d1 (Ififo_element1_in_d_d12_d1 ), .Iout_d_d13_d0 (Ififo_element1_in_d_d13_d0 ), .Iout_d_d13_d1 (Ififo_element1_in_d_d13_d1 ), .Iout_d_d14_d0 (Ififo_element1_in_d_d14_d0 ), .Iout_d_d14_d1 (Ififo_element1_in_d_d14_d1 ), .Iout_d_d15_d0 (Ififo_element1_in_d_d15_d0 ), .Iout_d_d15_d1 (Ififo_element1_in_d_d15_d1 ), .Iout_d_d16_d0 (Ififo_element1_in_d_d16_d0 ), .Iout_d_d16_d1 (Ififo_element1_in_d_d16_d1 ), .Iout_d_d17_d0 (Ififo_element1_in_d_d17_d0 ), .Iout_d_d17_d1 (Ififo_element1_in_d_d17_d1 ), .Iout_d_d18_d0 (Ififo_element1_in_d_d18_d0 ), .Iout_d_d18_d1 (Ififo_element1_in_d_d18_d1 ), .Iout_d_d19_d0 (Ififo_element1_in_d_d19_d0 ), .Iout_d_d19_d1 (Ififo_element1_in_d_d19_d1 ), .Iout_d_d20_d0 (Ififo_element1_in_d_d20_d0 ), .Iout_d_d20_d1 (Ififo_element1_in_d_d20_d1 ), .Iout_d_d21_d0 (Ififo_element1_in_d_d21_d0 ), .Iout_d_d21_d1 (Ififo_element1_in_d_d21_d1 ), .Iout_d_d22_d0 (Ififo_element1_in_d_d22_d0 ), .Iout_d_d22_d1 (Ififo_element1_in_d_d22_d1 ), .Iout_d_d23_d0 (Ififo_element1_in_d_d23_d0 ), .Iout_d_d23_d1 (Ififo_element1_in_d_d23_d1 ), .Iout_d_d24_d0 (Ififo_element1_in_d_d24_d0 ), .Iout_d_d24_d1 (Ififo_element1_in_d_d24_d1 ), .Iout_d_d25_d0 (Ififo_element1_in_d_d25_d0 ), .Iout_d_d25_d1 (Ififo_element1_in_d_d25_d1 ), .Iout_d_d26_d0 (Ififo_element1_in_d_d26_d0 ), .Iout_d_d26_d1 (Ififo_element1_in_d_d26_d1 ), .Iout_d_d27_d0 (Ififo_element1_in_d_d27_d0 ), .Iout_d_d27_d1 (Ififo_element1_in_d_d27_d1 ), .Iout_d_d28_d0 (Ififo_element1_in_d_d28_d0 ), .Iout_d_d28_d1 (Ififo_element1_in_d_d28_d1 ), .Iout_d_d29_d0 (Ififo_element1_in_d_d29_d0 ), .Iout_d_d29_d1 (Ififo_element1_in_d_d29_d1 ), .Iout_a (Ififo_element1_in_a ), .Iout_v (Ififo_element1_in_v ), .reset_B(I_reset_BXX2 ), .vdd(vdd), .vss(vss));
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tmpl_0_0dataflow__neuro_0_0buffer_330_4 Ififo_element1 (.Iin_d_d0_d0 (Ififo_element1_in_d_d0_d0 ), .Iin_d_d0_d1 (Ififo_element1_in_d_d0_d1 ), .Iin_d_d1_d0 (Ififo_element1_in_d_d1_d0 ), .Iin_d_d1_d1 (Ififo_element1_in_d_d1_d1 ), .Iin_d_d2_d0 (Ififo_element1_in_d_d2_d0 ), .Iin_d_d2_d1 (Ififo_element1_in_d_d2_d1 ), .Iin_d_d3_d0 (Ififo_element1_in_d_d3_d0 ), .Iin_d_d3_d1 (Ififo_element1_in_d_d3_d1 ), .Iin_d_d4_d0 (Ififo_element1_in_d_d4_d0 ), .Iin_d_d4_d1 (Ififo_element1_in_d_d4_d1 ), .Iin_d_d5_d0 (Ififo_element1_in_d_d5_d0 ), .Iin_d_d5_d1 (Ififo_element1_in_d_d5_d1 ), .Iin_d_d6_d0 (Ififo_element1_in_d_d6_d0 ), .Iin_d_d6_d1 (Ififo_element1_in_d_d6_d1 ), .Iin_d_d7_d0 (Ififo_element1_in_d_d7_d0 ), .Iin_d_d7_d1 (Ififo_element1_in_d_d7_d1 ), .Iin_d_d8_d0 (Ififo_element1_in_d_d8_d0 ), .Iin_d_d8_d1 (Ififo_element1_in_d_d8_d1 ), .Iin_d_d9_d0 (Ififo_element1_in_d_d9_d0 ), .Iin_d_d9_d1 (Ififo_element1_in_d_d9_d1 ), .Iin_d_d10_d0 (Ififo_element1_in_d_d10_d0 ), .Iin_d_d10_d1 (Ififo_element1_in_d_d10_d1 ), .Iin_d_d11_d0 (Ififo_element1_in_d_d11_d0 ), .Iin_d_d11_d1 (Ififo_element1_in_d_d11_d1 ), .Iin_d_d12_d0 (Ififo_element1_in_d_d12_d0 ), .Iin_d_d12_d1 (Ififo_element1_in_d_d12_d1 ), .Iin_d_d13_d0 (Ififo_element1_in_d_d13_d0 ), .Iin_d_d13_d1 (Ififo_element1_in_d_d13_d1 ), .Iin_d_d14_d0 (Ififo_element1_in_d_d14_d0 ), .Iin_d_d14_d1 (Ififo_element1_in_d_d14_d1 ), .Iin_d_d15_d0 (Ififo_element1_in_d_d15_d0 ), .Iin_d_d15_d1 (Ififo_element1_in_d_d15_d1 ), .Iin_d_d16_d0 (Ififo_element1_in_d_d16_d0 ), .Iin_d_d16_d1 (Ififo_element1_in_d_d16_d1 ), .Iin_d_d17_d0 (Ififo_element1_in_d_d17_d0 ), .Iin_d_d17_d1 (Ififo_element1_in_d_d17_d1 ), .Iin_d_d18_d0 (Ififo_element1_in_d_d18_d0 ), .Iin_d_d18_d1 (Ififo_element1_in_d_d18_d1 ), .Iin_d_d19_d0 (Ififo_element1_in_d_d19_d0 ), .Iin_d_d19_d1 (Ififo_element1_in_d_d19_d1 ), .Iin_d_d20_d0 (Ififo_element1_in_d_d20_d0 ), .Iin_d_d20_d1 (Ififo_element1_in_d_d20_d1 ), .Iin_d_d21_d0 (Ififo_element1_in_d_d21_d0 ), .Iin_d_d21_d1 (Ififo_element1_in_d_d21_d1 ), .Iin_d_d22_d0 (Ififo_element1_in_d_d22_d0 ), .Iin_d_d22_d1 (Ififo_element1_in_d_d22_d1 ), .Iin_d_d23_d0 (Ififo_element1_in_d_d23_d0 ), .Iin_d_d23_d1 (Ififo_element1_in_d_d23_d1 ), .Iin_d_d24_d0 (Ififo_element1_in_d_d24_d0 ), .Iin_d_d24_d1 (Ififo_element1_in_d_d24_d1 ), .Iin_d_d25_d0 (Ififo_element1_in_d_d25_d0 ), .Iin_d_d25_d1 (Ififo_element1_in_d_d25_d1 ), .Iin_d_d26_d0 (Ififo_element1_in_d_d26_d0 ), .Iin_d_d26_d1 (Ififo_element1_in_d_d26_d1 ), .Iin_d_d27_d0 (Ififo_element1_in_d_d27_d0 ), .Iin_d_d27_d1 (Ififo_element1_in_d_d27_d1 ), .Iin_d_d28_d0 (Ififo_element1_in_d_d28_d0 ), .Iin_d_d28_d1 (Ififo_element1_in_d_d28_d1 ), .Iin_d_d29_d0 (Ififo_element1_in_d_d29_d0 ), .Iin_d_d29_d1 (Ififo_element1_in_d_d29_d1 ), .Iin_a (Ififo_element1_in_a ), .Iin_v (Ififo_element1_in_v ), .Iout_d_d0_d0 (Ififo_element2_in_d_d0_d0 ), .Iout_d_d0_d1 (Ififo_element2_in_d_d0_d1 ), .Iout_d_d1_d0 (Ififo_element2_in_d_d1_d0 ), .Iout_d_d1_d1 (Ififo_element2_in_d_d1_d1 ), .Iout_d_d2_d0 (Ififo_element2_in_d_d2_d0 ), .Iout_d_d2_d1 (Ififo_element2_in_d_d2_d1 ), .Iout_d_d3_d0 (Ififo_element2_in_d_d3_d0 ), .Iout_d_d3_d1 (Ififo_element2_in_d_d3_d1 ), .Iout_d_d4_d0 (Ififo_element2_in_d_d4_d0 ), .Iout_d_d4_d1 (Ififo_element2_in_d_d4_d1 ), .Iout_d_d5_d0 (Ififo_element2_in_d_d5_d0 ), .Iout_d_d5_d1 (Ififo_element2_in_d_d5_d1 ), .Iout_d_d6_d0 (Ififo_element2_in_d_d6_d0 ), .Iout_d_d6_d1 (Ififo_element2_in_d_d6_d1 ), .Iout_d_d7_d0 (Ififo_element2_in_d_d7_d0 ), .Iout_d_d7_d1 (Ififo_element2_in_d_d7_d1 ), .Iout_d_d8_d0 (Ififo_element2_in_d_d8_d0 ), .Iout_d_d8_d1 (Ififo_element2_in_d_d8_d1 ), .Iout_d_d9_d0 (Ififo_element2_in_d_d9_d0 ), .Iout_d_d9_d1 (Ififo_element2_in_d_d9_d1 ), .Iout_d_d10_d0 (Ififo_element2_in_d_d10_d0 ), .Iout_d_d10_d1 (Ififo_element2_in_d_d10_d1 ), .Iout_d_d11_d0 (Ififo_element2_in_d_d11_d0 ), .Iout_d_d11_d1 (Ififo_element2_in_d_d11_d1 ), .Iout_d_d12_d0 (Ififo_element2_in_d_d12_d0 ), .Iout_d_d12_d1 (Ififo_element2_in_d_d12_d1 ), .Iout_d_d13_d0 (Ififo_element2_in_d_d13_d0 ), .Iout_d_d13_d1 (Ififo_element2_in_d_d13_d1 ), .Iout_d_d14_d0 (Ififo_element2_in_d_d14_d0 ), .Iout_d_d14_d1 (Ififo_element2_in_d_d14_d1 ), .Iout_d_d15_d0 (Ififo_element2_in_d_d15_d0 ), .Iout_d_d15_d1 (Ififo_element2_in_d_d15_d1 ), .Iout_d_d16_d0 (Ififo_element2_in_d_d16_d0 ), .Iout_d_d16_d1 (Ififo_element2_in_d_d16_d1 ), .Iout_d_d17_d0 (Ififo_element2_in_d_d17_d0 ), .Iout_d_d17_d1 (Ififo_element2_in_d_d17_d1 ), .Iout_d_d18_d0 (Ififo_element2_in_d_d18_d0 ), .Iout_d_d18_d1 (Ififo_element2_in_d_d18_d1 ), .Iout_d_d19_d0 (Ififo_element2_in_d_d19_d0 ), .Iout_d_d19_d1 (Ififo_element2_in_d_d19_d1 ), .Iout_d_d20_d0 (Ififo_element2_in_d_d20_d0 ), .Iout_d_d20_d1 (Ififo_element2_in_d_d20_d1 ), .Iout_d_d21_d0 (Ififo_element2_in_d_d21_d0 ), .Iout_d_d21_d1 (Ififo_element2_in_d_d21_d1 ), .Iout_d_d22_d0 (Ififo_element2_in_d_d22_d0 ), .Iout_d_d22_d1 (Ififo_element2_in_d_d22_d1 ), .Iout_d_d23_d0 (Ififo_element2_in_d_d23_d0 ), .Iout_d_d23_d1 (Ififo_element2_in_d_d23_d1 ), .Iout_d_d24_d0 (Ififo_element2_in_d_d24_d0 ), .Iout_d_d24_d1 (Ififo_element2_in_d_d24_d1 ), .Iout_d_d25_d0 (Ififo_element2_in_d_d25_d0 ), .Iout_d_d25_d1 (Ififo_element2_in_d_d25_d1 ), .Iout_d_d26_d0 (Ififo_element2_in_d_d26_d0 ), .Iout_d_d26_d1 (Ififo_element2_in_d_d26_d1 ), .Iout_d_d27_d0 (Ififo_element2_in_d_d27_d0 ), .Iout_d_d27_d1 (Ififo_element2_in_d_d27_d1 ), .Iout_d_d28_d0 (Ififo_element2_in_d_d28_d0 ), .Iout_d_d28_d1 (Ififo_element2_in_d_d28_d1 ), .Iout_d_d29_d0 (Ififo_element2_in_d_d29_d0 ), .Iout_d_d29_d1 (Ififo_element2_in_d_d29_d1 ), .Iout_a (Ififo_element2_in_a ), .Iout_v (Ififo_element2_in_v ), .reset_B(I_reset_BXX2 ), .vdd(vdd), .vss(vss));
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tmpl_0_0dataflow__neuro_0_0buffer_330_4 Ififo_element2 (.Iin_d_d0_d0 (Ififo_element2_in_d_d0_d0 ), .Iin_d_d0_d1 (Ififo_element2_in_d_d0_d1 ), .Iin_d_d1_d0 (Ififo_element2_in_d_d1_d0 ), .Iin_d_d1_d1 (Ififo_element2_in_d_d1_d1 ), .Iin_d_d2_d0 (Ififo_element2_in_d_d2_d0 ), .Iin_d_d2_d1 (Ififo_element2_in_d_d2_d1 ), .Iin_d_d3_d0 (Ififo_element2_in_d_d3_d0 ), .Iin_d_d3_d1 (Ififo_element2_in_d_d3_d1 ), .Iin_d_d4_d0 (Ififo_element2_in_d_d4_d0 ), .Iin_d_d4_d1 (Ififo_element2_in_d_d4_d1 ), .Iin_d_d5_d0 (Ififo_element2_in_d_d5_d0 ), .Iin_d_d5_d1 (Ififo_element2_in_d_d5_d1 ), .Iin_d_d6_d0 (Ififo_element2_in_d_d6_d0 ), .Iin_d_d6_d1 (Ififo_element2_in_d_d6_d1 ), .Iin_d_d7_d0 (Ififo_element2_in_d_d7_d0 ), .Iin_d_d7_d1 (Ififo_element2_in_d_d7_d1 ), .Iin_d_d8_d0 (Ififo_element2_in_d_d8_d0 ), .Iin_d_d8_d1 (Ififo_element2_in_d_d8_d1 ), .Iin_d_d9_d0 (Ififo_element2_in_d_d9_d0 ), .Iin_d_d9_d1 (Ififo_element2_in_d_d9_d1 ), .Iin_d_d10_d0 (Ififo_element2_in_d_d10_d0 ), .Iin_d_d10_d1 (Ififo_element2_in_d_d10_d1 ), .Iin_d_d11_d0 (Ififo_element2_in_d_d11_d0 ), .Iin_d_d11_d1 (Ififo_element2_in_d_d11_d1 ), .Iin_d_d12_d0 (Ififo_element2_in_d_d12_d0 ), .Iin_d_d12_d1 (Ififo_element2_in_d_d12_d1 ), .Iin_d_d13_d0 (Ififo_element2_in_d_d13_d0 ), .Iin_d_d13_d1 (Ififo_element2_in_d_d13_d1 ), .Iin_d_d14_d0 (Ififo_element2_in_d_d14_d0 ), .Iin_d_d14_d1 (Ififo_element2_in_d_d14_d1 ), .Iin_d_d15_d0 (Ififo_element2_in_d_d15_d0 ), .Iin_d_d15_d1 (Ififo_element2_in_d_d15_d1 ), .Iin_d_d16_d0 (Ififo_element2_in_d_d16_d0 ), .Iin_d_d16_d1 (Ififo_element2_in_d_d16_d1 ), .Iin_d_d17_d0 (Ififo_element2_in_d_d17_d0 ), .Iin_d_d17_d1 (Ififo_element2_in_d_d17_d1 ), .Iin_d_d18_d0 (Ififo_element2_in_d_d18_d0 ), .Iin_d_d18_d1 (Ififo_element2_in_d_d18_d1 ), .Iin_d_d19_d0 (Ififo_element2_in_d_d19_d0 ), .Iin_d_d19_d1 (Ififo_element2_in_d_d19_d1 ), .Iin_d_d20_d0 (Ififo_element2_in_d_d20_d0 ), .Iin_d_d20_d1 (Ififo_element2_in_d_d20_d1 ), .Iin_d_d21_d0 (Ififo_element2_in_d_d21_d0 ), .Iin_d_d21_d1 (Ififo_element2_in_d_d21_d1 ), .Iin_d_d22_d0 (Ififo_element2_in_d_d22_d0 ), .Iin_d_d22_d1 (Ififo_element2_in_d_d22_d1 ), .Iin_d_d23_d0 (Ififo_element2_in_d_d23_d0 ), .Iin_d_d23_d1 (Ififo_element2_in_d_d23_d1 ), .Iin_d_d24_d0 (Ififo_element2_in_d_d24_d0 ), .Iin_d_d24_d1 (Ififo_element2_in_d_d24_d1 ), .Iin_d_d25_d0 (Ififo_element2_in_d_d25_d0 ), .Iin_d_d25_d1 (Ififo_element2_in_d_d25_d1 ), .Iin_d_d26_d0 (Ififo_element2_in_d_d26_d0 ), .Iin_d_d26_d1 (Ififo_element2_in_d_d26_d1 ), .Iin_d_d27_d0 (Ififo_element2_in_d_d27_d0 ), .Iin_d_d27_d1 (Ififo_element2_in_d_d27_d1 ), .Iin_d_d28_d0 (Ififo_element2_in_d_d28_d0 ), .Iin_d_d28_d1 (Ififo_element2_in_d_d28_d1 ), .Iin_d_d29_d0 (Ififo_element2_in_d_d29_d0 ), .Iin_d_d29_d1 (Ififo_element2_in_d_d29_d1 ), .Iin_a (Ififo_element2_in_a ), .Iin_v (Ififo_element2_in_v ), .Iout_d_d0_d0 (Iout_d_d0_d0 ), .Iout_d_d0_d1 (Iout_d_d0_d1 ), .Iout_d_d1_d0 (Iout_d_d1_d0 ), .Iout_d_d1_d1 (Iout_d_d1_d1 ), .Iout_d_d2_d0 (Iout_d_d2_d0 ), .Iout_d_d2_d1 (Iout_d_d2_d1 ), .Iout_d_d3_d0 (Iout_d_d3_d0 ), .Iout_d_d3_d1 (Iout_d_d3_d1 ), .Iout_d_d4_d0 (Iout_d_d4_d0 ), .Iout_d_d4_d1 (Iout_d_d4_d1 ), .Iout_d_d5_d0 (Iout_d_d5_d0 ), .Iout_d_d5_d1 (Iout_d_d5_d1 ), .Iout_d_d6_d0 (Iout_d_d6_d0 ), .Iout_d_d6_d1 (Iout_d_d6_d1 ), .Iout_d_d7_d0 (Iout_d_d7_d0 ), .Iout_d_d7_d1 (Iout_d_d7_d1 ), .Iout_d_d8_d0 (Iout_d_d8_d0 ), .Iout_d_d8_d1 (Iout_d_d8_d1 ), .Iout_d_d9_d0 (Iout_d_d9_d0 ), .Iout_d_d9_d1 (Iout_d_d9_d1 ), .Iout_d_d10_d0 (Iout_d_d10_d0 ), .Iout_d_d10_d1 (Iout_d_d10_d1 ), .Iout_d_d11_d0 (Iout_d_d11_d0 ), .Iout_d_d11_d1 (Iout_d_d11_d1 ), .Iout_d_d12_d0 (Iout_d_d12_d0 ), .Iout_d_d12_d1 (Iout_d_d12_d1 ), .Iout_d_d13_d0 (Iout_d_d13_d0 ), .Iout_d_d13_d1 (Iout_d_d13_d1 ), .Iout_d_d14_d0 (Iout_d_d14_d0 ), .Iout_d_d14_d1 (Iout_d_d14_d1 ), .Iout_d_d15_d0 (Iout_d_d15_d0 ), .Iout_d_d15_d1 (Iout_d_d15_d1 ), .Iout_d_d16_d0 (Iout_d_d16_d0 ), .Iout_d_d16_d1 (Iout_d_d16_d1 ), .Iout_d_d17_d0 (Iout_d_d17_d0 ), .Iout_d_d17_d1 (Iout_d_d17_d1 ), .Iout_d_d18_d0 (Iout_d_d18_d0 ), .Iout_d_d18_d1 (Iout_d_d18_d1 ), .Iout_d_d19_d0 (Iout_d_d19_d0 ), .Iout_d_d19_d1 (Iout_d_d19_d1 ), .Iout_d_d20_d0 (Iout_d_d20_d0 ), .Iout_d_d20_d1 (Iout_d_d20_d1 ), .Iout_d_d21_d0 (Iout_d_d21_d0 ), .Iout_d_d21_d1 (Iout_d_d21_d1 ), .Iout_d_d22_d0 (Iout_d_d22_d0 ), .Iout_d_d22_d1 (Iout_d_d22_d1 ), .Iout_d_d23_d0 (Iout_d_d23_d0 ), .Iout_d_d23_d1 (Iout_d_d23_d1 ), .Iout_d_d24_d0 (Iout_d_d24_d0 ), .Iout_d_d24_d1 (Iout_d_d24_d1 ), .Iout_d_d25_d0 (Iout_d_d25_d0 ), .Iout_d_d25_d1 (Iout_d_d25_d1 ), .Iout_d_d26_d0 (Iout_d_d26_d0 ), .Iout_d_d26_d1 (Iout_d_d26_d1 ), .Iout_d_d27_d0 (Iout_d_d27_d0 ), .Iout_d_d27_d1 (Iout_d_d27_d1 ), .Iout_d_d28_d0 (Iout_d_d28_d0 ), .Iout_d_d28_d1 (Iout_d_d28_d1 ), .Iout_d_d29_d0 (Iout_d_d29_d0 ), .Iout_d_d29_d1 (Iout_d_d29_d1 ), .Iout_a (Iout_a ), .Iout_v (Iout_v ), .reset_B(I_reset_BXX2 ), .vdd(vdd), .vss(vss));
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endmodule |