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first tests passed

This commit is contained in:
alexmadison 2022-04-04 20:23:56 +02:00
parent ab52498755
commit 531ccf30c2
4 changed files with 11912 additions and 4680 deletions
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4
dataflow_neuro/chips.act
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@ -89,7 +89,7 @@ defproc chip_texel (bd<N_IN> in, out;
NC_SYN = NC_SYN_X + NC_SYN_Y;
slice_data<N_IN-1, 0, NC_SYN> slice_pre_dec(.in = _demux.out1, .supply = supply);
fifo<NC_SYN,N_BUFFERS> fifo_dmx2dec(.in = slice_pre_dec.out, .reset_B = reset_B, .supply = supply);
decoder_2d_hybrid<NC_SYN_X, NC_SYN_Y, N_SYN_X, N_SYN_Y, N_SYN_DLY_CFG> decoder(.in = fifo_dmx2dec.in,
decoder_2d_hybrid<NC_SYN_X, NC_SYN_Y, N_SYN_X, N_SYN_Y, N_SYN_DLY_CFG> decoder(.in = fifo_dmx2dec.out,
.out = synapses,
.hs_en = register.data[0].d[0].f, // Defaults to handshake disable
.supply = supply, .reset_B = reset_B);
@ -121,7 +121,7 @@ defproc chip_texel (bd<N_IN> in, out;
// qdi2bd
fifo<N_IN, N_BUFFERS> fifo_mrg2bd(.in = merge_loop8mrg.out,
.reset_B = reset_B, .supply = supply);
qdi2bd<N_IN, N_BD_DLY_CFG> _qdi2b(.in = fifo_mrg2bd.out, .out = out, .dly_cfg = bd_dly_cfg,
qdi2bd<N_IN, N_BD_DLY_CFG> _qdi2bd(.in = fifo_mrg2bd.out, .out = out, .dly_cfg = bd_dly_cfg,
.reset_B = reset_B, .supply = supply);
}

9811
test/unit_tests/chip_nomap/run/prsim.out
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6769
test/unit_tests/chip_nomap/run/test.prs
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8
test/unit_tests/chip_nomap/test.prsim
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@ -1,22 +1,26 @@
watchall
# set-bool-array "c.bd_dly_cfg" 4 15
set c.bd_dly_cfg[0] 1
set c.bd_dly_cfg[1] 1
set c.bd_dly_cfg[2] 1
set c.bd_dly_cfg[3] 1
set-bd-channel-neutral "c.in" 14
set-bd-channel-neutral "c.out" 14
# set-bd-channel-neutral "c.out" 14
set c.out.a 0
set c.loopback_en 1
set Reset 1
cycle
mode run
status X
system "echo '[] Set reset 0'"
status X
set Reset 0
cycle
set-bd-channel-valid "c.in" 14 16128
cycle
assert-bd-channel-valid "c.out" 14 16128