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continued registers.c

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Michele
2022-03-07 07:15:53 +01:00
parent 932e967f3d
commit ad318259a5
4 changed files with 284 additions and 264 deletions
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13
dataflow_neuro/registers.act
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@ -71,7 +71,7 @@ defproc register_rw (avMx1of2<1+log_nw+wl> in; d1of<wl> data[2<<log_nw]; power s
BUF_X1 reset_buf_BXX(.a=reset_mem_B, .y=_reset_mem_BX,.vdd=supply.vdd,.vss=supply.vss);
sigbuf<_nw*wl> reset_bufarray(.in=_reset_mem_BX, .out=_reset_mem_BXX,.supply=supply);
// Creating the different flip flop arrays
bool _out_encoder[_nw],_clock_word_temp[_nw],_clock_word[_nw];
bool _out_encoder[_nw],_clock_word_temp[_nw],_clock_word[_nw],_clock_buffer_out[_nw*wl];
andtree<log_nw> atree[_nw];
AND2_X1 and_encoder[_nw];
sigbuf<wl> clock_buffer[_nw];
@ -98,7 +98,16 @@ defproc register_rw (avMx1of2<1+log_nw+wl> in; d1of<wl> data[2<<log_nw]; power s
and_encoder[_word_idx].vss = supply.vss;
clock_buffer[_word_idx].in = _clock_word_temp[_word_idx];
clock_buffer[_word_idx].supply = supply;
// Describing all the FF and their connection
(_bit_idx:wl:
clock_buffer[_word_idx].out[_bit_idx] = _clock_buffer_out[_bit_idx*(1+_word_idx)];
// ff[_bit_idx*(1+_word_idx)].clk = _clock_buffer_out[_bit_idx*(1+_word_idx)];
// ff[_bit_idx*(1+_word_idx)].d = in.d.d[_bit_idx+1+log_nw].t;
// ff[_bit_idx*(1+_word_idx)].q = data[_word_idx].d[_bit_idx];
// ff[_bit_idx*(1+_word_idx)].reset_B = _reset_mem_BXX[_bit_idx*(1+_word_idx)];
// ff[_bit_idx*(1+_word_idx)].vdd = supply.vdd;
// ff[_bit_idx*(1+_word_idx)].vss = supply.vss;
)
)
}
}}