alexmadison 502d35b000 added slice before registers, so register sizes can be reduced

2022-07-06 17:26:26 +02:00

..

__all__.act

prepared things for having unit test ready

2022-02-21 13:01:45 +01:00

.DS_Store

Auto stash before rebase of "origin/dev"

2022-03-30 15:03:55 +02:00

cell_lib_async_test.act

prepared things for having unit test ready

2022-02-21 13:01:45 +01:00

cell_lib_async.act

removed PRs from keeps, again...

2022-06-20 15:43:56 +02:00

cell_lib_std_test.act

Added std test

2022-02-21 13:07:14 +01:00

cell_lib_std.act

put fake PRs in tiehi/los lol

2022-06-29 15:58:58 +02:00

chips_noread.act

added slice before registers, so register sizes can be reduced

2022-07-06 17:26:26 +02:00

chips.act

did some sram shit, doesnt matter

2022-06-22 19:16:04 +02:00

coders.act

added sadc encoder with inputs low active for dynapse sadcs

2022-06-29 13:18:42 +02:00

dummy.act

updated dummy neurons to have Buf X12 to avoid slow in acks

2022-06-22 19:14:39 +02:00

dynapse.act

added tests for dynapse sadc hs

2022-07-05 10:53:17 +02:00

interfaces.act

added more reset sigbugs

2022-04-12 10:25:05 +02:00

Makefile

prepared things for having unit test ready

2022-02-21 13:01:45 +01:00

primitives.act

added slice before registers, so register sizes can be reduced

2022-07-06 17:26:26 +02:00

registers.act

created version of tdc_g without register read functionality

2022-07-06 15:35:20 +02:00

treegates.act

fixed treegate buff issue lol

2022-06-27 11:56:12 +02:00