helloworld works
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23390aab88
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@ -3,8 +3,8 @@ begin sim
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begin extern
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string_tablex libs "test_bench_lib"
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begin test_bench_lib
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string path "$ACT_HOME/lib/actsim_test_bench_lib.so"
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string sim::testbench::fsource_init "source_init"
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string path "${ACT_HOME}/lib/actsim_test_bench_lib.so"
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string sim::testbench::finit "init_tb"
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string sim::testbench::fsource_next "source_next"
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string sim::testbench::fsource_get "source_get"
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string sim::testbench::fcheck_out_of_order "check_out_of_order"
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@ -39,8 +39,8 @@ function fcontrol_get(int dontcare) : int;
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function fcontrol_wait(int dontcare) : int;
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template<pint BIT_WIDTH;pint ID>
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defproc channel_source(chan!(int<BIT_WIDTH>) out; chan?(int) sim_step; chan!(int) done)
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export template<pint BIT_WIDTH;pint ID>
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defproc channel_source(chan!(int<BIT_WIDTH>) out; chan?(int) sim_step; chan!(int<1>) done)
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{
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int current_step, t,data;
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chp {
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@ -54,8 +54,8 @@ defproc channel_source(chan!(int<BIT_WIDTH>) out; chan?(int) sim_step; chan!(int
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}
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}
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template<pint BIT_WIDTH;pint ID>
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defproc channel_checker_in_order(chan?(int<BIT_WIDTH>) in; chan?(int) sim_step; chan!(int) done)
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export template<pint BIT_WIDTH;pint ID>
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defproc channel_checker_in_order(chan?(int<BIT_WIDTH>) in; chan?(int) sim_step; chan!(int<1>) done)
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{
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int current_step, t, check, data;
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chp {
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@ -72,7 +72,7 @@ defproc channel_checker_in_order(chan?(int<BIT_WIDTH>) in; chan?(int) sim_step;
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}
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}
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template<pint BIT_WIDTH;pint ID>
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export template<pint BIT_WIDTH;pint ID>
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defproc channel_checker_out_of_order(chan?(int<BIT_WIDTH>) in; chan?(int) sim_step; chan!(int<1>) done)
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{
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int current_step, t, check, data;
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@ -90,7 +90,7 @@ defproc channel_checker_out_of_order(chan?(int<BIT_WIDTH>) in; chan?(int) sim_st
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}
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}
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template<pint BIT_WIDTH;pint ID>
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export template<pint BIT_WIDTH;pint ID>
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defproc channel_dump(chan?(int<BIT_WIDTH>) in; chan?(int) sim_step)
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{
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int current_step, t,in_tmp;
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@ -103,31 +103,63 @@ defproc channel_dump(chan?(int<BIT_WIDTH>) in; chan?(int) sim_step)
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}
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}
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template<pint NUMBER_SOURCE,NUMBER_CHECKER,NUMBER_DUMP;pbool HALT_ON_FALIURE>
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defproc control(chan(int) sim_step_source[NUMBER_SOURCE]; chan(int) sim_step_checker[NUMBER_CHECKER]; chan(int) sim_step_dump[NUMBER_DUMP]; chan?(int<1>) done_source[NUMBER_SOURCE]; chan?(int<1>) done_checker[NUMBER_CHECKER])
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defproc channel_dump_dummy(chan?(int) sim_step)
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{
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chp {
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*[ sim_step? ]
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}
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}
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defproc channel_source_dummy(chan?(int) sim_step; chan!(int<1>) done)
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{
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chp {
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*[ sim_step?;done!1 ]
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}
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}
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defproc channel_checker_dummy(chan?(int) sim_step; chan!(int<1>) done)
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{
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chp {
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*[ sim_step?;done!1 ]
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}
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}
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export template<pint NUMBER_SOURCE,NUMBER_CHECKER,NUMBER_DUMP;pbool HALT_ON_FALIURE>
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defproc control(chan(int) sim_step_source[NUMBER_SOURCE+1]; chan(int) sim_step_checker[NUMBER_CHECKER+1]; chan(int) sim_step_dump[NUMBER_DUMP+1]; chan?(int<1>) done_source[NUMBER_SOURCE+1]; chan?(int<1>) done_checker[NUMBER_CHECKER+1])
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{
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int current_step, wait;
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int<1> t, success, failure_free;
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//This is a workaround to permit to have 0 instances of a type.
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channel_checker_dummy dummy1(.sim_step=sim_step_checker[NUMBER_CHECKER],.done=done_checker[NUMBER_CHECKER]);
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channel_source_dummy dummy2(.sim_step=sim_step_source[NUMBER_SOURCE],.done=done_source[NUMBER_SOURCE]);
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channel_dump_dummy dummy3(.sim_step=sim_step_dump[NUMBER_DUMP]);
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chp {
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t:=1;
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log("I entered control");
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t:=finit(1);
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failure_free:=1;
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*[ t = 1 -> current_step := fcontrol_get();
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*[ t = 1 -> current_step := fcontrol_get(0);
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log("I entered the t loop at current step:",current_step);
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[ current_step = 0 -> skip // reset here
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[] else ->
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(,j:1..NUMBER_SOURCE: sim_step_source[j]!current_step),
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(,j:1..NUMBER_CHECKER: sim_step_checker[j]!current_step),
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(,j:1..NUMBER_DUMP: sim_step_dump[j]!current_step);
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(;j:1..NUMBER_SOURCE: done_source[j]?success; failure_free := failure_free & success);
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(;j:1..NUMBER_CHECKER: done_checker[j]?success; failure_free := failure_free & success)
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(,j:0..NUMBER_SOURCE: sim_step_source[j]!current_step),
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(,j:0..NUMBER_CHECKER: sim_step_checker[j]!current_step),
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(,j:0..NUMBER_DUMP: sim_step_dump[j]!current_step);
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(;j:0..NUMBER_SOURCE: done_source[j]?success; failure_free := failure_free & success);
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(;j:0..NUMBER_CHECKER: done_checker[j]?success; failure_free := failure_free & success)
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];
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wait := fcontrol_wait();
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wait := fcontrol_wait(0);
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[ wait > 0 -> skip // exec cycle
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[] else -> skip
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];
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[ HALT_ON_FALIURE & ~failure_free -> t := 0; log("stopped testbech because of failure")
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[] else -> t:=fcontrol_next()
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[ HALT_ON_FALIURE & 0=failure_free -> t := 0; log("stopped testbech because of failure")
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[] else -> t:=fcontrol_next(0);
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log("I finished the t loop at current step:",current_step)
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]
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]
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];
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log("I finished the program")
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}
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}
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}
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@ -88,7 +88,7 @@ static unsigned int check_errors = 0;
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* verbose: 0 for normal pinting, 1 for verbose printing
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* it returns true on success
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*/
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struct expr_res init (int num, struct expr_res *args)
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struct expr_res init_tb (int num, struct expr_res *args)
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{
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struct expr_res t;
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t.v = 0;
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@ -25,10 +25,12 @@
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import "../../act/test_bench_lib.act";
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import globals;
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open sim::testbench;
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defproc test(){
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chan(int<5>) channel;
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//sim::testbench::control<1,1,0,1> control;
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//sim::testbench::channel_source<5,0> source(.out=channel,.sim_step=control.sim_step_source[0],.done=control.done_source[0]);
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//sim::testbench::channel_checker_in_order<5,0> sink(.in=channel,.sim_step=control.sim_step_checker,.done=control.done_checker[0]);
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control<1,1,0,true> control;
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channel_source<5,0> source(.out=channel,.sim_step=control.sim_step_source[0],.done=control.done_source[0]);
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channel_checker_in_order<5,0> sink(.in=channel,.sim_step=control.sim_step_checker[0],.done=control.done_checker[0]);
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}
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