alexmadison
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79a96ed511
|
added DLY4 cell
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2022-03-01 15:28:22 +01:00 |
Greatorex
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6dd5df58a1
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pushing in the meanwhile
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2022-02-21 18:27:41 +01:00 |
alexmadison
|
ded1742b72
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added some 3/4 cells and changed mux cells
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2022-02-21 17:50:23 +01:00 |
M. Mastella
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df97903436
|
test celement tree is working
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2022-02-21 16:44:08 +01:00 |
alexmadison
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30ffd8b16f
|
removed clock buffers
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2022-02-21 15:53:40 +01:00 |
Greatorex
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5fc6eaab9e
|
Added std test
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2022-02-21 13:07:14 +01:00 |
Greatorex
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aa92b8bea4
|
Auto stash before merge of "dev" and "origin/dev"
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2022-02-21 10:32:18 +01:00 |
Ole Richter
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48b691d7d4
|
added license, moved cell libs into repo
added buffer (not tested),
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2022-02-21 00:33:58 +01:00 |