Michele
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397c832b7b
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Added Flip Flop to std.act (still need to try it)
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2022-03-04 11:43:33 +01:00 |
alexmadison
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3bba9fefa4
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made buf with dly sorry
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2022-03-02 15:48:54 +01:00 |
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alexmadison
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31d2f35042
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i am a moron re dly cells
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2022-03-02 15:47:36 +01:00 |
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alexmadison
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79a96ed511
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added DLY4 cell
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2022-03-01 15:28:22 +01:00 |
 Greatorex
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6dd5df58a1
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pushing in the meanwhile
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2022-02-21 18:27:41 +01:00 |
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alexmadison
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ded1742b72
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added some 3/4 cells and changed mux cells
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2022-02-21 17:50:23 +01:00 |
 M. Mastella
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df97903436
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test celement tree is working
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2022-02-21 16:44:08 +01:00 |
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alexmadison
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30ffd8b16f
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removed clock buffers
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2022-02-21 15:53:40 +01:00 |
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Greatorex
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5fc6eaab9e
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Added std test
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2022-02-21 13:07:14 +01:00 |
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Greatorex
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aa92b8bea4
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Auto stash before merge of "dev" and "origin/dev"
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2022-02-21 10:32:18 +01:00 |
 Ole Richter
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48b691d7d4
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added license, moved cell libs into repo
added buffer (not tested),
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2022-02-21 00:33:58 +01:00 |