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andtree_5
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…
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andtree_15
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…
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append_5_3_2
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append unit test with fifos
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2022-03-25 18:57:35 +01:00 |
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arbiter
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…
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arbiter_2
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…
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arbiter_handshake_adv
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…
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arbiter_handshake_simple
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…
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arbiter_tree_simple_nosim
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arbiter_test redone without fifos
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2022-03-08 11:36:25 +01:00 |
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arbiter_tree_test
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started register_v2 with reading and writing abilities
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2022-03-09 13:05:08 +01:00 |
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arbtree_5
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Auto stash before rebase of "origin/dev"
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2022-03-30 15:03:55 +02:00 |
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async_instantiate
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…
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bd2qdi_5
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bd2qdi ole backseat reved
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2022-03-25 15:43:46 +01:00 |
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buf_15
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…
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buf_s_5
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…
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buffer_register_7
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buffer register unit tests init
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2022-04-01 20:47:04 +02:00 |
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buffer_token
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…
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ctree_15
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…
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decoder_2d_dly_8_16
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…
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decoder_2d_dly_and_2_4
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…
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decoder_2d_hs
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synapse handshake unit tests working
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2022-03-31 11:23:51 +02:00 |
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decoder_2d_hybrid
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decoder 2d hybrid unit tests working
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2022-03-31 18:00:08 +02:00 |
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delayprog_4
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…
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demux_7
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…
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demux_td_2
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demux_td reviewed and supplies added
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2022-03-08 10:11:52 +01:00 |
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demux_td_2_SIGN
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…
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encoder2D_2x2
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encoder8x8sim
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2022-03-18 11:39:30 +01:00 |
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encoder2D_8x7
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encoder2d revd mdsn
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2022-03-22 16:29:30 +01:00 |
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encoder2D_8x8
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encoder2d revd mdsn
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2022-03-22 16:29:30 +01:00 |
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encoder_7
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…
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fifo-decoder-neurons-encoder-fifo
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renamed encoder inputs from x to inx
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2022-03-30 10:14:29 +02:00 |
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fifo-decoder_hs-neurons-encoder-fifo
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nrn_hs fifo etc unit test working
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2022-03-31 16:20:23 +02:00 |
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fifo-decoder_hybrid-neurons-encoder-fifo
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hybrid decoder in fifo train working
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2022-03-31 18:06:47 +02:00 |
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fifo3_8bit
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…
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fifo_t_5
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…
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fifo_t_15
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…
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flipflop
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flipflop updated
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2022-03-30 16:03:01 +02:00 |
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fork_15
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…
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line_end_pull_up
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…
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merge_t_2_adv
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…
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merge_t_2_simple
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…
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nrn_hs_2D_array_3x5
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unit test for hs
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2022-03-29 11:25:14 +02:00 |
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ortree_15
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…
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qdi2bd_5
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qdi2bd ready for rev
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2022-03-25 17:15:03 +01:00 |
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registerA_w
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registerA_w unit test working
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2022-04-01 20:46:45 +02:00 |
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registerA_w_array
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register write array unit tests working
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2022-04-02 17:16:20 +02:00 |
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register_write
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pushing register
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2022-03-30 15:01:50 +02:00 |
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register_wrw
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pushing register
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2022-03-30 15:01:50 +02:00 |
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sigbuf_15
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…
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std_instantiate
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…
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vtree_5
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added a vtree_5 test
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2022-03-05 20:29:02 +01:00 |
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vtree_15
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…
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.DS_Store
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Auto stash before rebase of "origin/dev"
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2022-03-30 15:03:55 +02:00 |
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buf_15.v
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…
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buf_15_friendly2.v
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encoder sim still not working
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2022-03-08 18:49:04 +01:00 |
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helper.scm
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…
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init.prs
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…
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init_qdi.prsim
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…
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