bics/actlib_dataflow_neuro
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Author SHA1 Message Date
alexmadison 382714d11e decoder dly with and grid unit test 2022-03-03 17:10:55 +01:00
alexmadison c8412606b3 merged 2022-03-03 17:10:16 +01:00
alexmadison 893f71db92 AND grid init 2022-03-03 17:09:00 +01:00
alexmadison da5948f493 added N=1 cases 2022-03-03 17:05:56 +01:00
Michele 0e9f2ae506 started encoder on the coders.act 2022-03-03 15:10:31 +01:00
Michele e53fc88054 arbiter_tree works 2022-03-03 12:39:10 +01:00
Michele f7cd7006d0 removed arbiter_tree from primitives because is already in coders 2022-03-03 12:15:17 +01:00
Michele 24a6260862 Merged encoder_wip into dev 2022-03-03 12:14:48 +01:00
Michele f5859040d8 Arbiter tree test 2022-03-03 12:11:20 +01:00
Michele 3e1b63c201 continued handshaking tree, not finished 2022-03-03 12:11:20 +01:00
Michele b49b9d98c3 started arbiter tree 2022-03-03 12:11:20 +01:00
alexmadison 6fc3e4b99c removed arbiter tree 2022-03-03 11:56:59 +01:00
alexmadison af52c688a3 arbiter tree with arbiters, not tested 2022-03-03 11:56:34 +01:00
alexmadison d0a2fff096 arbiter init with or2s 2022-03-03 10:52:29 +01:00
alexmadison 7f40b48b49 arbtree init, using or2s for now 2022-03-03 10:47:37 +01:00
alexmadison 9c27248e12 decoder 2d dly init 2022-03-02 15:55:26 +01:00
alexmadison 3bba9fefa4 made buf with dly sorry 2022-03-02 15:48:54 +01:00
alexmadison 31d2f35042 i am a moron re dly cells 2022-03-02 15:47:36 +01:00
alexmadison c61a570f80 fixed wiring bug in prog delay 2022-03-02 15:11:22 +01:00
alexmadison 6bece2f459 renamed gates in or tree 2022-03-02 13:51:12 +01:00
alexmadison 659cd2479c oops accidentally hit all trees 2022-03-02 13:50:04 +01:00
alexmadison c5e582ff3e renamed vars in atree 2022-03-02 13:48:57 +01:00
alexmadison e52ec9ed61 renamed var in vtree for consciences 2022-03-02 11:51:45 +01:00
alexmadison c580d21efe fixed supply in fifo_t 2022-03-02 11:24:28 +01:00
alexmadison 1b7e39bc00 coders.act file init 2022-03-02 09:48:41 +01:00
alexmadison 8060051da0 Merge branch 'dev' of ssh://git.web.rug.nl:222/bics/actlib_dataflow_neuro into dev 2022-03-02 09:48:11 +01:00
alexmadison b456ea40fd changed delayprog to outin vs ya naming scheme 2022-03-02 09:48:05 +01:00
Michele 9f5bbc487d some more supplies added, need still to run all the codes 2022-03-01 19:02:10 +01:00
Michele c99ed439a6 added supply also to sigbuf in fifo 2022-03-01 18:57:06 +01:00
Michele d507deba84 Merge remote-tracking branch 'origin/dev' into dev 2022-03-01 18:51:10 +01:00
Michele 3d273b164d added power supply to sigbuf in fifo_t 2022-03-01 18:51:06 +01:00
Greatorex b15d8c11e9 Merge remote-tracking branch 'origin/dev' into dev 2022-03-01 17:56:39 +01:00
Greatorex ba5e695be5 finished and simmed demuxtd 2022-03-01 17:56:30 +01:00
Michele 357df7f66e merge tested with concurrent inputs work 2022-03-01 17:36:49 +01:00
Michele 018b308f61 Merge remote-tracking branch 'origin/dev' into dev 2022-03-01 17:14:15 +01:00
Michele 97784db492 merge with simple test is working 2022-03-01 17:14:10 +01:00
alexmadison 79a96ed511 added DLY4 cell 2022-03-01 15:28:22 +01:00
alexmadison 233c9a7d10 cleaned up minor 2022-03-01 15:27:27 +01:00
alexmadison 00869fc16e programmable delay tested 2022-03-01 15:26:43 +01:00
alexmadison 8268379572 bug to prev bug 2022-03-01 14:00:47 +01:00
alexmadison 18f84bc652 Merge branch 'dev' of ssh://git.web.rug.nl:222/bics/actlib_dataflow_neuro into dev 2022-03-01 13:55:47 +01:00
alexmadison 05f46ccf33 added try except for assert printing 2022-03-01 13:55:45 +01:00
Michele 0a8496d4f7 Merge remote-tracking branch 'origin/dev' into dev 2022-03-01 13:26:32 +01:00
Michele 340a20e49e Added merge, syntax clean but violating dual rail 2022-03-01 13:26:29 +01:00
alexmadison fc4ccea3c0 added and tree 2022-03-01 12:22:36 +01:00
alexmadison c947b28b03 added yours truely to the authors 2022-03-01 10:18:32 +01:00
alexmadison aeed4e5527 changed c->v tree in buf_s 2022-03-01 10:15:23 +01:00
alexmadison a8b1710f65 merged buf_s into primitives 2022-03-01 10:09:08 +01:00
alexmadison 66cbbe3da7 unit tests working 2022-03-01 09:58:20 +01:00
Michele 8b40e70058 differentiated between ctree and vtree, all primitives updated 2022-03-01 09:44:51 +01:00