continued handshaking tree, not finished

Weird behaviour of in2.r (it raises without reason)

.gitignore

@@ -1,2 +1,8 @@
+i386*
+*.i386*
+x86_64*
+*.x86_64*
+arm64_*
+*.arm64_*
 *~
-Makefile.deps
+*.deps

CHANGELOG.md

@@ -0,0 +1,7 @@
+# Changelog
+
+## [ Unreleased ]
+
+### Added
+### Changed
+### Removed

LICENSE

@@ -1,117 +1,312 @@
-GNU GENERAL PUBLIC LICENSE
-Version 2, June 1991
+CERN Open Hardware Licence Version 2 - Weakly Reciprocal
 
-Copyright (C) 1989, 1991 Free Software Foundation, Inc.
-51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA
-
-Everyone is permitted to copy and distribute verbatim copies of this license document, but changing it is not allowed.
 
 Preamble
 
-The licenses for most software are designed to take away your freedom to share and change it. By contrast, the GNU General Public License is intended to guarantee your freedom to share and change free software--to make sure the software is free for all its users. This General Public License applies to most of the Free Software Foundation's software and to any other program whose authors commit to using it. (Some other Free Software Foundation software is covered by the GNU Lesser General Public License instead.) You can apply it to your programs, too.
+CERN has developed this licence to promote collaboration among
+hardware designers and to provide a legal tool which supports the
+freedom to use, study, modify, share and distribute hardware designs
+and products based on those designs. Version 2 of the CERN Open
+Hardware Licence comes in three variants: CERN-OHL-P (permissive); and
+two reciprocal licences: this licence, CERN-OHL-W (weakly reciprocal)
+and CERN-OHL-S (strongly reciprocal).
 
-When we speak of free software, we are referring to freedom, not price. Our General Public Licenses are designed to make sure that you have the freedom to distribute copies of free software (and charge for this service if you wish), that you receive source code or can get it if you want it, that you can change the software or use pieces of it in new free programs; and that you know you can do these things.
+The CERN-OHL-W is copyright CERN 2020. Anyone is welcome to use it, in
+unmodified form only.
 
-To protect your rights, we need to make restrictions that forbid anyone to deny you these rights or to ask you to surrender the rights. These restrictions translate to certain responsibilities for you if you distribute copies of the software, or if you modify it.
+Use of this Licence does not imply any endorsement by CERN of any
+Licensor or their designs nor does it imply any involvement by CERN in
+their development.
 
-For example, if you distribute copies of such a program, whether gratis or for a fee, you must give the recipients all the rights that you have. You must make sure that they, too, receive or can get the source code. And you must show them these terms so they know their rights.
 
-We protect your rights with two steps: (1) copyright the software, and (2) offer you this license which gives you legal permission to copy, distribute and/or modify the software.
+1 Definitions
 
-Also, for each author's protection and ours, we want to make certain that everyone understands that there is no warranty for this free software. If the software is modified by someone else and passed on, we want its recipients to know that what they have is not the original, so that any problems introduced by others will not reflect on the original authors' reputations.
+  1.1 'Licence' means this CERN-OHL-W.
 
-Finally, any free program is threatened constantly by software patents. We wish to avoid the danger that redistributors of a free program will individually obtain patent licenses, in effect making the program proprietary. To prevent this, we have made it clear that any patent must be licensed for everyone's free use or not licensed at all.
+  1.2 'Compatible Licence' means
 
-The precise terms and conditions for copying, distribution and modification follow.
+       a) any earlier version of the CERN Open Hardware licence, or
 
-TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+       b) any version of the CERN-OHL-S or the CERN-OHL-W, or
 
-0. This License applies to any program or other work which contains a notice placed by the copyright holder saying it may be distributed under the terms of this General Public License. The "Program", below, refers to any such program or work, and a "work based on the Program" means either the Program or any derivative work under copyright law: that is to say, a work containing the Program or a portion of it, either verbatim or with modifications and/or translated into another language. (Hereinafter, translation is included without limitation in the term "modification".) Each licensee is addressed as "you".
+       c) any licence which permits You to treat the Source to which
+          it applies as licensed under CERN-OHL-S or CERN-OHL-W
+          provided that on Conveyance of any such Source, or any
+          associated Product You treat the Source in question as being
+          licensed under CERN-OHL-S or CERN-OHL-W as appropriate.
 
-Activities other than copying, distribution and modification are not covered by this License; they are outside its scope. The act of running the Program is not restricted, and the output from the Program is covered only if its contents constitute a work based on the Program (independent of having been made by running the Program). Whether that is true depends on what the Program does.
+  1.3 'Source' means information such as design materials or digital
+      code which can be applied to Make or test a Product or to
+      prepare a Product for use, Conveyance or sale, regardless of its
+      medium or how it is expressed. It may include Notices.
 
-1. You may copy and distribute verbatim copies of the Program's source code as you receive it, in any medium, provided that you conspicuously and appropriately publish on each copy an appropriate copyright notice and disclaimer of warranty; keep intact all the notices that refer to this License and to the absence of any warranty; and give any other recipients of the Program a copy of this License along with the Program.
+  1.4 'Covered Source' means Source that is explicitly made available
+      under this Licence.
 
-You may charge a fee for the physical act of transferring a copy, and you may at your option offer warranty protection in exchange for a fee.
+  1.5 'Product' means any device, component, work or physical object,
+      whether in finished or intermediate form, arising from the use,
+      application or processing of Covered Source.
 
-2. You may modify your copy or copies of the Program or any portion of it, thus forming a work based on the Program, and copy and distribute such modifications or work under the terms of Section 1 above, provided that you also meet all of these conditions:
+  1.6 'Make' means to create or configure something, whether by
+      manufacture, assembly, compiling, loading or applying Covered
+      Source or another Product or otherwise.
 
-     a) You must cause the modified files to carry prominent notices stating that you changed the files and the date of any change.
+  1.7 'Available Component' means any part, sub-assembly, library or
+      code which:
 
-     b) You must cause any work that you distribute or publish, that in whole or in part contains or is derived from the Program or any part thereof, to be licensed as a whole at no charge to all third parties under the terms of this License.
+       a) is licensed to You as Complete Source under a Compatible
+          Licence; or
 
-     c) If the modified program normally reads commands interactively when run, you must cause it, when started running for such interactive use in the most ordinary way, to print or display an announcement including an appropriate copyright notice and a notice that there is no warranty (or else, saying that you provide a warranty) and that users may redistribute the program under these conditions, and telling the user how to view a copy of this License. (Exception: if the Program itself is interactive but does not normally print such an announcement, your work based on the Program is not required to print an announcement.)
+       b) is available, at the time a Product or the Source containing
+          it is first Conveyed, to You and any other prospective
+          licensees
 
-These requirements apply to the modified work as a whole. If identifiable sections of that work are not derived from the Program, and can be reasonably considered independent and separate works in themselves, then this License, and its terms, do not apply to those sections when you distribute them as separate works. But when you distribute the same sections as part of a whole which is a work based on the Program, the distribution of the whole must be on the terms of this License, whose permissions for other licensees extend to the entire whole, and thus to each and every part regardless of who wrote it.
+           i) with sufficient rights and information (including any
+              configuration and programming files and information
+              about its characteristics and interfaces) to enable it
+              either to be Made itself, or to be sourced and used to
+              Make the Product; or
+          ii) as part of the normal distribution of a tool used to
+              design or Make the Product.
 
-Thus, it is not the intent of this section to claim rights or contest your rights to work written entirely by you; rather, the intent is to exercise the right to control the distribution of derivative or collective works based on the Program.
+  1.8 'External Material' means anything (including Source) which:
 
-In addition, mere aggregation of another work not based on the Program with the Program (or with a work based on the Program) on a volume of a storage or distribution medium does not bring the other work under the scope of this License.
+       a) is only combined with Covered Source in such a way that it
+          interfaces with the Covered Source using a documented
+          interface which is described in the Covered Source; and
 
-3. You may copy and distribute the Program (or a work based on it, under Section 2) in object code or executable form under the terms of Sections 1 and 2 above provided that you also do one of the following:
+       b) is not a derivative of or contains Covered Source, or, if it
+          is, it is solely to the extent necessary to facilitate such
+          interfacing.
 
-     a) Accompany it with the complete corresponding machine-readable source code, which must be distributed under the terms of Sections 1 and 2 above on a medium customarily used for software interchange; or,
+  1.9 'Complete Source' means the set of all Source necessary to Make
+      a Product, in the preferred form for making modifications,
+      including necessary installation and interfacing information
+      both for the Product, and for any included Available Components.
+      If the format is proprietary, it must also be made available in
+      a format (if the proprietary tool can create it) which is
+      viewable with a tool available to potential licensees and
+      licensed under a licence approved by the Free Software
+      Foundation or the Open Source Initiative. Complete Source need
+      not include the Source of any Available Component, provided that
+      You include in the Complete Source sufficient information to
+      enable a recipient to Make or source and use the Available
+      Component to Make the Product.
 
-     b) Accompany it with a written offer, valid for at least three years, to give any third party, for a charge no more than your cost of physically performing source distribution, a complete machine-readable copy of the corresponding source code, to be distributed under the terms of Sections 1 and 2 above on a medium customarily used for software interchange; or,
+ 1.10 'Source Location' means a location where a Licensor has placed
+      Covered Source, and which that Licensor reasonably believes will
+      remain easily accessible for at least three years for anyone to
+      obtain a digital copy.
 
-     c) Accompany it with the information you received as to the offer to distribute corresponding source code. (This alternative is allowed only for noncommercial distribution and only if you received the program in object code or executable form with such an offer, in accord with Subsection b above.)
+ 1.11 'Notice' means copyright, acknowledgement and trademark notices,
+      Source Location references, modification notices (subsection
+      3.3(b)) and all notices that refer to this Licence and to the
+      disclaimer of warranties that are included in the Covered
+      Source.
 
-The source code for a work means the preferred form of the work for making modifications to it. For an executable work, complete source code means all the source code for all modules it contains, plus any associated interface definition files, plus the scripts used to control compilation and installation of the executable. However, as a special exception, the source code distributed need not include anything that is normally distributed (in either source or binary form) with the major components (compiler, kernel, and so on) of the operating system on which the executable runs, unless that component itself accompanies the executable.
+ 1.12 'Licensee' or 'You' means any person exercising rights under
+      this Licence.
 
-If distribution of executable or object code is made by offering access to copy from a designated place, then offering equivalent access to copy the source code from the same place counts as distribution of the source code, even though third parties are not compelled to copy the source along with the object code.
+ 1.13 'Licensor' means a natural or legal person who creates or
+      modifies Covered Source. A person may be a Licensee and a
+      Licensor at the same time.
 
-4. You may not copy, modify, sublicense, or distribute the Program except as expressly provided under this License. Any attempt otherwise to copy, modify, sublicense or distribute the Program is void, and will automatically terminate your rights under this License. However, parties who have received copies, or rights, from you under this License will not have their licenses terminated so long as such parties remain in full compliance.
+ 1.14 'Convey' means to communicate to the public or distribute.
 
-5. You are not required to accept this License, since you have not signed it. However, nothing else grants you permission to modify or distribute the Program or its derivative works. These actions are prohibited by law if you do not accept this License. Therefore, by modifying or distributing the Program (or any work based on the Program), you indicate your acceptance of this License to do so, and all its terms and conditions for copying, distributing or modifying the Program or works based on it.
 
-6. Each time you redistribute the Program (or any work based on the Program), the recipient automatically receives a license from the original licensor to copy, distribute or modify the Program subject to these terms and conditions. You may not impose any further restrictions on the recipients' exercise of the rights granted herein. You are not responsible for enforcing compliance by third parties to this License.
+2 Applicability
 
-7. If, as a consequence of a court judgment or allegation of patent infringement or for any other reason (not limited to patent issues), conditions are imposed on you (whether by court order, agreement or otherwise) that contradict the conditions of this License, they do not excuse you from the conditions of this License. If you cannot distribute so as to satisfy simultaneously your obligations under this License and any other pertinent obligations, then as a consequence you may not distribute the Program at all. For example, if a patent license would not permit royalty-free redistribution of the Program by all those who receive copies directly or indirectly through you, then the only way you could satisfy both it and this License would be to refrain entirely from distribution of the Program.
+  2.1 This Licence governs the use, copying, modification, Conveying
+      of Covered Source and Products, and the Making of Products. By
+      exercising any right granted under this Licence, You irrevocably
+      accept these terms and conditions.
 
-If any portion of this section is held invalid or unenforceable under any particular circumstance, the balance of the section is intended to apply and the section as a whole is intended to apply in other circumstances.
+  2.2 This Licence is granted by the Licensor directly to You, and
+      shall apply worldwide and without limitation in time.
 
-It is not the purpose of this section to induce you to infringe any patents or other property right claims or to contest validity of any such claims; this section has the sole purpose of protecting the integrity of the free software distribution system, which is implemented by public license practices. Many people have made generous contributions to the wide range of software distributed through that system in reliance on consistent application of that system; it is up to the author/donor to decide if he or she is willing to distribute software through any other system and a licensee cannot impose that choice.
+  2.3 You shall not attempt to restrict by contract or otherwise the
+      rights granted under this Licence to other Licensees.
 
-This section is intended to make thoroughly clear what is believed to be a consequence of the rest of this License.
+  2.4 This Licence is not intended to restrict fair use, fair dealing,
+      or any other similar right.
 
-8. If the distribution and/or use of the Program is restricted in certain countries either by patents or by copyrighted interfaces, the original copyright holder who places the Program under this License may add an explicit geographical distribution limitation excluding those countries, so that distribution is permitted only in or among countries not thus excluded. In such case, this License incorporates the limitation as if written in the body of this License.
 
-9. The Free Software Foundation may publish revised and/or new versions of the General Public License from time to time. Such new versions will be similar in spirit to the present version, but may differ in detail to address new problems or concerns.
+3 Copying, Modifying and Conveying Covered Source
 
-Each version is given a distinguishing version number. If the Program specifies a version number of this License which applies to it and "any later version", you have the option of following the terms and conditions either of that version or of any later version published by the Free Software Foundation. If the Program does not specify a version number of this License, you may choose any version ever published by the Free Software Foundation.
+  3.1 You may copy and Convey verbatim copies of Covered Source, in
+      any medium, provided You retain all Notices.
 
-10. If you wish to incorporate parts of the Program into other free programs whose distribution conditions are different, write to the author to ask for permission. For software which is copyrighted by the Free Software Foundation, write to the Free Software Foundation; we sometimes make exceptions for this. Our decision will be guided by the two goals of preserving the free status of all derivatives of our free software and of promoting the sharing and reuse of software generally.
+  3.2 You may modify Covered Source, other than Notices, provided that
+      You irrevocably undertake to make that modified Covered Source
+      available from a Source Location should You Convey a Product in
+      circumstances where the recipient does not otherwise receive a
+      copy of the modified Covered Source. In each case subsection 3.3
+      shall apply.
 
-NO WARRANTY
+      You may only delete Notices if they are no longer applicable to
+      the corresponding Covered Source as modified by You and You may
+      add additional Notices applicable to Your modifications.
 
-11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
+  3.3 You may Convey modified Covered Source (with the effect that You
+      shall also become a Licensor) provided that You:
 
-12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+       a) retain Notices as required in subsection 3.2;
 
-END OF TERMS AND CONDITIONS
+       b) add a Notice to the modified Covered Source stating that You
+          have modified it, with the date and brief description of how
+          You have modified it;
 
-How to Apply These Terms to Your New Programs
+       c) add a Source Location Notice for the modified Covered Source
+          if You Convey in circumstances where the recipient does not
+          otherwise receive a copy of the modified Covered Source; and
 
-If you develop a new program, and you want it to be of the greatest possible use to the public, the best way to achieve this is to make it free software which everyone can redistribute and change under these terms.
+       d) license the modified Covered Source under the terms and
+          conditions of this Licence (or, as set out in subsection
+          8.3, a later version, if permitted by the licence of the
+          original Covered Source). Such modified Covered Source must
+          be licensed as a whole, but excluding Available Components
+          contained in it or External Material to which it is
+          interfaced, which remain licensed under their own applicable
+          licences.
 
-To do so, attach the following notices to the program. It is safest to attach them to the start of each source file to most effectively convey the exclusion of warranty; and each file should have at least the "copyright" line and a pointer to where the full notice is found.
 
-     one line to give the program's name and an idea of what it does. Copyright (C) yyyy name of author
+4 Making and Conveying Products
 
-     This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+  4.1 You may Make Products, and/or Convey them, provided that You
+      either provide each recipient with a copy of the Complete Source
+      or ensure that each recipient is notified of the Source Location
+      of the Complete Source. That Complete Source includes Covered
+      Source and You must accordingly satisfy Your obligations set out
+      in subsection 3.3. If specified in a Notice, the Product must
+      visibly and securely display the Source Location on it or its
+      packaging or documentation in the manner specified in that
+      Notice.
 
-     This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+  4.2 Where You Convey a Product which incorporates External Material,
+      the Complete Source for that Product which You are required to
+      provide under subsection 4.1 need not include any Source for the
+      External Material.
 
-     You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. Also add information on how to contact you by electronic and paper mail.
+  4.3 You may license Products under terms of Your choice, provided
+      that such terms do not restrict or attempt to restrict any
+      recipients' rights under this Licence to the Covered Source.
 
-If the program is interactive, make it output a short notice like this when it starts in an interactive mode:
 
-     Gnomovision version 69, Copyright (C) year name of author Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. This is free software, and you are welcome to redistribute it under certain conditions; type `show c' for details.
+5 Research and Development
 
-The hypothetical commands `show w' and `show c' should show the appropriate parts of the General Public License. Of course, the commands you use may be called something other than `show w' and `show c'; they could even be mouse-clicks or menu items--whatever suits your program.
+You may Convey Covered Source, modified Covered Source or Products to
+a legal entity carrying out development, testing or quality assurance
+work on Your behalf provided that the work is performed on terms which
+prevent the entity from both using the Source or Products for its own
+internal purposes and Conveying the Source or Products or any
+modifications to them to any person other than You. Any modifications
+made by the entity shall be deemed to be made by You pursuant to
+subsection 3.2.
 
-You should also get your employer (if you work as a programmer) or your school, if any, to sign a "copyright disclaimer" for the program, if necessary. Here is a sample; alter the names:
 
-     Yoyodyne, Inc., hereby disclaims all copyright interest in the program `Gnomovision' (which makes passes at compilers) written by James Hacker.
+6 DISCLAIMER AND LIABILITY
+
+  6.1 DISCLAIMER OF WARRANTY -- The Covered Source and any Products
+      are provided 'as is' and any express or implied warranties,
+      including, but not limited to, implied warranties of
+      merchantability, of satisfactory quality, non-infringement of
+      third party rights, and fitness for a particular purpose or use
+      are disclaimed in respect of any Source or Product to the
+      maximum extent permitted by law. The Licensor makes no
+      representation that any Source or Product does not or will not
+      infringe any patent, copyright, trade secret or other
+      proprietary right. The entire risk as to the use, quality, and
+      performance of any Source or Product shall be with You and not
+      the Licensor. This disclaimer of warranty is an essential part
+      of this Licence and a condition for the grant of any rights
+      granted under this Licence.
+
+  6.2 EXCLUSION AND LIMITATION OF LIABILITY -- The Licensor shall, to
+      the maximum extent permitted by law, have no liability for
+      direct, indirect, special, incidental, consequential, exemplary,
+      punitive or other damages of any character including, without
+      limitation, procurement of substitute goods or services, loss of
+      use, data or profits, or business interruption, however caused
+      and on any theory of contract, warranty, tort (including
+      negligence), product liability or otherwise, arising in any way
+      in relation to the Covered Source, modified Covered Source
+      and/or the Making or Conveyance of a Product, even if advised of
+      the possibility of such damages, and You shall hold the
+      Licensor(s) free and harmless from any liability, costs,
+      damages, fees and expenses, including claims by third parties,
+      in relation to such use.
+
+
+7 Patents
+
+  7.1 Subject to the terms and conditions of this Licence, each
+      Licensor hereby grants to You a perpetual, worldwide,
+      non-exclusive, no-charge, royalty-free, irrevocable (except as
+      stated in subsections 7.2 and 8.4) patent licence to Make, have
+      Made, use, offer to sell, sell, import, and otherwise transfer
+      the Covered Source and Products, where such licence applies only
+      to those patent claims licensable by such Licensor that are
+      necessarily infringed by exercising rights under the Covered
+      Source as Conveyed by that Licensor.
+
+  7.2 If You institute patent litigation against any entity (including
+      a cross-claim or counterclaim in a lawsuit) alleging that the
+      Covered Source or a Product constitutes direct or contributory
+      patent infringement, or You seek any declaration that a patent
+      licensed to You under this Licence is invalid or unenforceable
+      then any rights granted to You under this Licence shall
+      terminate as of the date such process is initiated.
+
+
+8 General
+
+  8.1 If any provisions of this Licence are or subsequently become
+      invalid or unenforceable for any reason, the remaining
+      provisions shall remain effective.
+
+  8.2 You shall not use any of the name (including acronyms and
+      abbreviations), image, or logo by which the Licensor or CERN is
+      known, except where needed to comply with section 3, or where
+      the use is otherwise allowed by law. Any such permitted use
+      shall be factual and shall not be made so as to suggest any kind
+      of endorsement or implication of involvement by the Licensor or
+      its personnel.
+
+  8.3 CERN may publish updated versions and variants of this Licence
+      which it considers to be in the spirit of this version, but may
+      differ in detail to address new problems or concerns. New
+      versions will be published with a unique version number and a
+      variant identifier specifying the variant. If the Licensor has
+      specified that a given variant applies to the Covered Source
+      without specifying a version, You may treat that Covered Source
+      as being released under any version of the CERN-OHL with that
+      variant. If no variant is specified, the Covered Source shall be
+      treated as being released under CERN-OHL-S. The Licensor may
+      also specify that the Covered Source is subject to a specific
+      version of the CERN-OHL or any later version in which case You
+      may apply this or any later version of CERN-OHL with the same
+      variant identifier published by CERN.
+
+      You may treat Covered Source licensed under CERN-OHL-W as
+      licensed under CERN-OHL-S if and only if all Available
+      Components referenced in the Covered Source comply with the
+      corresponding definition of Available Component for CERN-OHL-S.
+
+  8.4 This Licence shall terminate with immediate effect if You fail
+      to comply with any of its terms and conditions.
+
+  8.5 However, if You cease all breaches of this Licence, then Your
+      Licence from any Licensor is reinstated unless such Licensor has
+      terminated this Licence by giving You, while You remain in
+      breach, a notice specifying the breach and requiring You to cure
+      it within 30 days, and You have failed to come into compliance
+      in all material respects by the end of the 30 day period. Should
+      You repeat the breach after receipt of a cure notice and
+      subsequent reinstatement, this Licence will terminate
+      immediately and permanently. Section 6 shall continue to apply
+      after any termination.
+
+  8.6 This Licence shall not be enforceable except by a Licensor
+      acting as such, and third party beneficiary rights are
+      specifically excluded.
 
-signature of Ty Coon, 1 April 1989 Ty Coon, President of Vice

Makefile

@@ -1,27 +1,29 @@
-#-------------------------------------------------------------------------      
+# -----------------------------------------------------------------------------
 #  
-#  Copyright (c) 2021 Rajit Manohar
-#  Copyright (c) 2021 University of Groningen - Ole Richter                                           
+#  Copyright (c) 2022 University of Groningen - Ole Richter
 #
-#  This program is free software; you can redistribute it and/or                
-#  modify it under the terms of the GNU General Public License                  
-#  as published by the Free Software Foundation; either version 2               
-#  of the License, or (at your option) any later version.                       
+#  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
 #
-#  This program is distributed in the hope that it will be useful,              
-#  but WITHOUT ANY WARRANTY; without even the implied warranty of               
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                
-#  GNU General Public License for more details.                                 
+#  You may redistribute and modify this documentation and make products
+#  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+#  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+#  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+#  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+#  for applicable conditions.
 #
-#  You should have received a copy of the GNU General Public License            
-#  along with this program; if not, write to the Free Software                  
-#  Foundation, Inc., 51 Franklin Street, Fifth Floor,                           
-#  Boston, MA  02110-1301, USA.                                                 
+#  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
 #
-#-------------------------------------------------------------------------
-TARGETACT=
+#  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+#  these sources, You must maintain the Source Location visible in its
+#  documentation.
+#
+# -----------------------------------------------------------------------------
 
-SUBDIRS=
+TARGETACT=LICENSE
+# tmpl because its a template based appoach no syntesis so it would be wrong in syn
+TARGETACTSUBDIR=tmpl/dataflow_neuro
+
+SUBDIRS=dataflow_neuro
 
 include $(ACT_HOME)/scripts/Makefile.std
 

README.md

@@ -1,12 +1,14 @@
-# The classical dataflow template library for mixed signal neuromoric processors 
+# A dataflow template library for mixed signal neuromoric processors 
 
+the library will be installed in `$ACT_HOME/act/tmpl/dataflow_neuro`. 
+This path is part of the default search path for any ACT tool.
 
-the library will be installed in `$ACT_HOME/act`. This path is part of the default search path for any ACT tool.
-
-this ibrary depends on stdlib
-
-The comments in the `.act` files have some basic documentation.
+this library depends on stdlib (https://github.com/asyncvlsi/stdlib)
 
 ## Installation
 
-Set `$ACT_HOME` to the root of your ACT installation, and then run `make install`
+Set `$ACT_HOME` to the root of your ACT installation, and then run `make install`.
+
+## Unit tests
+
+After installation, you can run `make runtest` to execute the unit tests

dataflow_neuro/Makefile

@@ -0,0 +1,29 @@
+# -----------------------------------------------------------------------------
+#  
+#  Copyright (c) 2022 University of Groningen - Ole Richter
+#
+#  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+#
+#  You may redistribute and modify this documentation and make products
+#  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+#  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+#  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+#  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+#  for applicable conditions.
+#
+#  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+#
+#  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+#  these sources, You must maintain the Source Location visible in its
+#  documentation.
+#
+# -----------------------------------------------------------------------------
+
+TARGETACT=__all__.act cell_lib_std.act cell_lib_async.act primitives.act  
+SUBDIRS=
+# template because its a template based appoach no syntesis so it would be wrong in syn
+TARGETACTSUBDIR=tmpl/dataflow_neuro
+
+include $(ACT_HOME)/scripts/Makefile.std
+
+-include Makefile.deps

dataflow_neuro/__all__.act

@@ -0,0 +1,27 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import tmpl::dataflow_neuro::cell_lib_std;
+import tmpl::dataflow_neuro::cell_lib_async;
+import tmpl::dataflow_neuro::primitives;

dataflow_neuro/cell_lib_async.act

@@ -0,0 +1,530 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+namespace tmpl {
+    namespace dataflow_neuro{
+        export defcell A_1C1P2N_RB_X1 (bool! y; bool? c1,p1,n1,n2,pr_B, sr_B; bool vdd, vss) {
+            bool _y;
+            prs{
+                (~p1 & ~c1)|~pr_B -> _y+
+                c1 & n1 & n2 & sr_B -> _y-
+                _y => y-
+
+                }
+            sizing {
+                    leak_adjust <- 1; 
+                    p_n_mode <- 1;
+                    y {-1}; _y{-1} 
+                    }
+        }
+
+        export defcell A_1C1P2N_R_X1 (bool! y; bool? c1,p1,n1,n2,pr_B, sr_B; bool vdd, vss) {
+            prs{
+                (~p1 & ~c1)|~pr_B -> y-
+                c1 & n1 & n2 & sr_B -> y+
+                }
+            sizing {
+                    leak_adjust <- 1; 
+                    p_n_mode <- 1;
+                    y {-1}
+                    }
+        }
+
+
+        export defcell A_1C1P_1N_X1 (bool! y; bool? c1, p1, n1; bool vdd, vss)
+        {
+        prs{
+            ~p1 & ~c1 -> y+
+            c1 & n1 -> y-
+            }
+        sizing {leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}}
+        }
+
+        export defcell A_1C1P_B (bool! y; bool? c1, p1; bool vdd, vss)
+        {
+        bool _y;
+        prs{
+            ~p1 & ~c1 -> _y-
+            c1 -> _y+
+            _y => y-
+            }
+        sizing {leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}; _y{-1} }
+        }
+
+
+        export defcell A_1C1P_X1 (bool! y; bool? c1, p1; bool vdd, vss)
+        {
+        prs{
+            ~p1 & ~c1 -> y+
+            c1 -> y-
+            }
+        sizing {leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}}
+        }
+
+        export defcell A_1C2P1N_X1 (bool! y; bool? c1, p1, p2, n1; bool vdd, vss)
+        {
+        prs{
+            ~p1 & ~p2 & ~c1 -> y+
+            c1 & n1 -> y-
+            }
+        sizing {leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}}
+        }
+
+        export defcell A_1C2P_B_X1 (bool! y; bool? c1, p1, p2; bool vdd, vss)
+        {
+        bool _y;
+        prs{
+            ~p1 & ~p2 & ~c1 -> _y-
+            c1 -> _y+
+            _y => y-
+            }
+        sizing {leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}; _y{-1} }
+        }
+        
+
+        export defcell A_1C2P_X1 (bool! y; bool? c1, p1, p2; bool vdd, vss)
+        {
+        prs{
+            ~p1 & ~p2 & ~c1 -> y+
+            c1 -> y-
+            }
+        sizing {leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}}
+        }
+
+        export defcell A_1C3P2P2N_R_X1 (bool! y; bool? c1, p1, p2, p3, p4, p5, n1, n2, pr_B, sr_B; bool  vdd, vss)
+        {
+        prs{
+            (~p1 & ~p2 & ~p3 & ~c1)|(~p4&~p5&~c1)|~pr_B -> y+
+            c1 & n1 & n2 & sr_B -> y-
+            }
+        sizing {leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}}
+        }
+
+        export defcell A_2C2N2N_RB_X1 (bool ! y; bool? c1, c2, n1, n2, n3, n4, pr_B, sr_B; bool vdd, vss)
+        {
+        bool _y;
+        prs{
+            (~c1 & ~c2) | ~pr_B -> _y+
+            c1 & c2 & ((n1 & n2) | (n3 & n4)) & sr_B -> _y-
+            _y => y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}; _y{-1}}
+        }
+
+        export defcell A_2C2N2N_RB_X2 (bool ! y; bool? c1, c2, n1, n2, n3, n4, pr_B, sr_B; bool vdd, vss)
+        {
+        bool _y;
+        prs{
+            (~c1 & ~c2) | ~pr_B -> _y+
+            c1 & c2 & ((n1 & n2) | (n3 & n4)) & sr_B -> _y-
+            _y => y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-2}; _y{-1}}
+        }
+
+
+        export defcell A_2C2N2N_RB_X4 (bool ! y; bool? c1, c2, n1, n2, n3, n4, pr_B, sr_B; bool? vdd, vss)
+        {
+        bool _y;
+        prs{
+            (~c1 & ~c2) | ~pr_B -> _y+
+            c1 & c2 & ((n1 & n2) | (n3 & n4)) & sr_B -> _y-
+            _y => y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-4}; _y{-1}}
+        }
+
+
+        export defcell A_2C2N2N_R_X1 (bool ! y; bool? c1, c2, n1, n2, n3, n4, pr_B, sr_B; bool? vdd, vss)
+        {
+        prs{
+            (~c1 & ~c2) | ~pr_B -> y+
+            c1 & c2 & ((n1 & n2) | (n3 & n4)) & sr_B -> y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}}
+        }
+
+        export defcell A_2C2N_RB_X1 (bool ! y; bool? c1, c2, n1, n2, pr_B, sr_B; bool? vdd, vss)
+        {
+        bool _y;
+        prs{
+            (~c1 & ~c2) | ~pr_B -> _y+
+            c1 & c2 & n1 & n2 & sr_B -> _y-
+            _y => y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}; _y{-1}}
+        }
+
+        export defcell A_2C2N_RB_X2 (bool ! y; bool? c1, c2, n1, n2, pr_B, sr_B; bool? vdd, vss)
+        {
+        bool _y;
+        prs{
+            (~c1 & ~c2) | ~pr_B -> _y+
+            c1 & c2 & n1 & n2 & sr_B -> _y-
+            _y => y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-2}; _y{-1}}
+        }
+
+        export defcell A_2C2N_RB_X4 (bool ! y; bool? c1, c2, n1, n2, pr_B, sr_B; bool? vdd, vss)
+        {
+        bool _y;
+        prs{
+            (~c1 & ~c2) | ~pr_B -> _y+
+            c1 & c2 & n1 & n2 & sr_B -> _y-
+            _y => y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-4}; _y{-1}}
+        }
+
+
+        export defcell A_2C2N_R_X1 (bool ! y; bool? c1, c2, n1, n2, pr_B, sr_B; bool? vdd, vss)
+        {
+        prs{
+            (~c1 & ~c2) | ~pr_B -> y+
+            c1 & c2 & n1 & n2 & sr_B -> y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}}
+        }
+
+        export defcell A_2C_B_X1 (bool ! y; bool? c1, c2; bool? vdd, vss)
+        {
+        bool _y;
+        prs{
+            ~c1 & ~c2 -> _y+
+            c1 & c2 -> _y-
+            _y => y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}; _y{-1}}
+        }
+
+        export defcell A_2C_RB_X1 (bool ! y; bool? c1, c2, pr_B, sr_B; bool? vdd, vss)
+        {
+        bool _y;
+        prs{
+            (~c1 & ~c2) | ~pr_B -> _y+
+            c1 & c2 & sr_B -> _y-
+            _y => y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}; _y{-1}}
+        }
+
+        export defcell A_2C_RB_X4 (bool ! y; bool? c1, c2, pr_B, sr_B; bool? vdd, vss)
+        {
+        bool _y;
+        prs{
+            (~c1 & ~c2) | ~pr_B -> _y+
+            c1 & c2 & sr_B -> _y-
+            _y => y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-4}; _y{-1}}
+        }
+
+        export defcell A_2C_R_X1 (bool ! y; bool? c1, c2, pr_B, sr_B; bool? vdd, vss)
+        {
+        prs{
+            (~c1 & ~c2) | ~pr_B -> y+
+            c1 & c2 & sr_B -> y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}}
+        }
+        export defcell A_2C1N_RB_X1(bool ! y; bool? c1, c2, n1, pr_B, sr_B; bool? vdd, vss)
+        {
+            bool _y;
+        prs{
+            (~c1 & ~c2) | ~pr_B -> _y+
+            c1 & c2 & n1 & sr_B -> _y-
+            _y => y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}; _y{-1}}
+        }
+        export defcell A_2C1N_RB_X4(bool ! y; bool? c1, c2, n1, pr_B, sr_B; bool? vdd, vss)
+        {
+            bool _y;
+        prs{
+            (~c1 & ~c2) | ~pr_B -> _y+
+            c1 & c2 & n1 & sr_B -> _y-
+            _y => y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-4}; _y{-1}}
+        }
+        export defcell A_2C_X1 (bool ! y; bool? c1, c2; bool? vdd, vss)
+        {
+        prs{
+            ~c1 & ~c2 -> y+
+            c1 & c2 -> y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}}
+        }
+
+        export defcell A_3C_B_X1 (bool ! y; bool? c1, c2, c3; bool? vdd, vss)
+        {
+            bool _y;
+        prs{
+            ~c1 & ~c2 & ~c3 -> _y+
+            c1 & c2 & c3 -> _y-
+            _y => y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}; _y{-1}}
+        }
+
+        export defcell A_3C_RB_X1 (bool ! y; bool? c1, c2, c3, pr_B, sr_B; bool? vdd, vss)
+        {
+        bool _y;
+        prs{
+            (~c1 & ~c2 & ~c3) | ~pr_B -> _y+
+            c1 & c2 & c3 & sr_B -> _y-
+            _y => y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}; _y{-1}}
+        } 
+
+        export defcell A_3C_RB_X2 (bool ! y; bool? c1, c2, c3, pr_B, sr_B; bool? vdd, vss)
+        {
+        bool _y;
+        prs{
+            (~c1 & ~c2 & ~c3) | ~pr_B -> _y+
+            c1 & c2 & c3 & sr_B -> _y-
+            _y => y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-2}; _y{-1}}
+        }
+
+        export defcell A_3C_RB_X4 (bool ! y; bool? c1, c2, c3, pr_B, sr_B; bool? vdd, vss)
+        {
+        bool _y;
+        prs{
+            (~c1 & ~c2 & ~c3) | ~pr_B -> _y+
+            c1 & c2 & c3 & sr_B -> _y-
+            _y => y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-4}; _y{-1}}
+        }
+
+        export defcell A_3C_R_X1 (bool ! y; bool? c1, c2, c3, pr_B, sr_B; bool? vdd, vss)
+        {
+        prs{
+            (~c1 & ~c2 & ~c3) | ~pr_B -> y+
+            c1 & c2 & c3 & sr_B -> y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}}
+        }
+
+        export defcell A_3C_X1 (bool ! y; bool? c1, c2, c3; bool? vdd, vss)
+        {
+        prs{
+            ~c1 & ~c2 & ~c3 -> y+
+            c1 & c2 & c3 -> y-
+        }
+        sizing {    
+                leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}}
+        }
+
+        export defcell A_4C_RB_X1 (bool! y; bool? c1, c2, c3, c4, pr_B, sr_B; bool? vdd, vss)
+        {
+        bool _y;
+        prs{
+            (~c1 & ~c2 & ~c3 & ~c4) | ~pr_B -> _y+
+            c1 & c2 & c3 & c4 & sr_B-> _y-
+            _y => y-
+            }
+        sizing {    leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}; _y{-1}}
+        }
+
+        export defcell A_4C_RB_X2 (bool! y; bool? c1, c2, c3, c4, pr_B, sr_B; bool? vdd, vss)
+        {
+        bool _y;
+        prs{
+            (~c1 & ~c2 & ~c3 & ~c4) | ~pr_B -> _y+
+            c1 & c2 & c3 & c4 & sr_B-> _y-
+            _y => y-
+            }
+        sizing {leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-2}; _y{-1}}
+        }
+
+        export defcell A_4C_RB_X4 (bool! y; bool? c1, c2, c3, c4, pr_B, sr_B; bool? vdd, vss)
+        {
+        bool _y;
+        prs{
+            (~c1 & ~c2 & ~c3 & ~c4) | ~pr_B -> _y+
+            c1 & c2 & c3 & c4 & sr_B-> _y-
+            _y => y-
+            }
+        sizing {leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-4}; _y{-1}}
+        }
+
+        export defcell A_4C_R_X1 (bool! y; bool? c1, c2, c3, c4, pr_B, sr_B; bool? vdd, vss)
+        {
+        prs{
+            (~c1 & ~c2 & ~c3 & ~c4) | ~pr_B -> y+
+            c1 & c2 & c3 & c4 & sr_B-> y-
+            }
+        sizing {leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}}
+        }
+
+        export defcell A_4P1N1N_B_X1 (bool! y; bool? n1, n2, p1, p2, p3, p4; bool? vdd, vss)
+        {
+        bool _y;
+        prs{
+            ~p1 & ~p2 & ~p3 & ~p4 -> _y+
+            n1 | n2 -> _y-
+            _y => y- 
+            }
+        sizing {leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}; _y{-1} }
+        }
+
+        export defcell A_4P1N1N_X1 (bool! y; bool? n1, n2, p1, p2, p3, p4; bool? vdd, vss)
+        {
+        prs{
+            ~p1 & ~p2 & ~p3 & ~p4 -> y+
+            n1 | n2 -> y-
+            }
+        sizing {leak_adjust <- 1; 
+                p_n_mode <- 1;
+            y {-1}}
+        }
+
+        //Rajit example
+        defproc arbiter_Rajit (bool a, b, u, v)
+        {
+          bool _u, _v;
+          prs {
+           [keeper=0]  a &  _v -> _u-
+           [keeper=0] ~a  | ~_v  -> _u+
+           [keeper=0]  b &  _u -> _v-
+           [keeper=0] ~b  | ~_u  -> _v+
+           [keeper=0] _u  => u-
+           [keeper=0] _v => v-
+          }
+          spec {
+            mk_excllo(_u, _v)
+          }
+        }
+        defproc ARBITER (bool? a, b, c, d; bool! y1,y2; bool? vdd, vss)
+        {
+          bool _y1, _y2;
+          prs {
+           [keeper=0]  a &  _y2 -> _y1-
+           [keeper=0] ~a  | ~_y2  -> _y1+
+           [keeper=0]  b &  _y1 -> _y2-
+           [keeper=0] ~b  | ~_y1  -> _y2+
+           [keeper=0] _y1 | c  => y1-
+           [keeper=0] _y2 | d  => y2-
+          }
+          spec {
+            mk_excllo(_y1, _y2)
+          }
+        }
+        }}
+
+
+

dataflow_neuro/cell_lib_async_test.act

@@ -0,0 +1,60 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_async.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "cell_lib_async.act";
+open tmpl::dataflow_neuro;
+A_1C1P2N_RB_X1 cell1;
+A_1C1P2N_R_X1 cell2;
+A_1C1P_1N_X1 cell3;
+A_1C1P_B cell4;
+A_1C1P cell5;
+A_1C2P1N_X1 cell6;
+A_1C2P_B_X1 cell7;
+A_1C2P cell8;
+A_1C3P2P2N_R_X1 cell9;
+A_2C2N2N_RB_X1 cell10;
+A_2C2N2N_RB_X2 cell11;
+A_2C2N2N_RB_X4 cell12;
+A_2C2N2N_R_X1 cell13;
+A_2C2N_R_B_X2 cell14;
+A_2C2N_R_B_X4 cell15;
+A_2C2N_R_X1 cell16;
+A_2C_B_X1 cell17;
+A_2C_RB_X1 cell18;
+A_2C_R_X1 cell19;
+A_2C_X1 cell20;
+A_3C_RB_X1 cell21;
+A_3C_RB_X2 cell22;
+A_3C_RB_X4 cell23;
+A_3C_R_X1 cell24;
+A_3C_X1 cell25;
+A_4C_RB_X1 cell26;
+A_4C_RB_X2 cell27;
+A_4C_RB_X4 cell28;
+A_4C_R_X1 cell29;
+A_4P1N1N_B_X1 cell30;
+A_4P1N1N_X1 cell31;

dataflow_neuro/cell_lib_std.act

@@ -0,0 +1,377 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library
+ *
+ *  Copyright (c) 2020-2021 Rajit Manohar
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+namespace tmpl {
+  namespace dataflow_neuro {
+
+    export defproc TIELO_X1(bool! y; bool vdd, vss)
+    {
+      y = vss;
+    }
+
+    export defproc TIEHI_X1(bool! y; bool vdd, vss)
+    {
+      y = vdd;
+    }
+
+    /*-- inverters --*/
+
+    defproc inv (bool! y; bool? a, vdd, vss)
+    {
+      prs {
+        a => y-
+      }
+    }
+      
+    template<pint nf>
+    defproc szinv <: inv()
+    {
+      [nf = 0 -> sizing { y {-1} }
+      [] else -> sizing { y {-2*nf,svt,nf} }
+      ]
+    }
+
+    export defcell INV_X1<: szinv<0>() { } 
+    export defcell INV_X2<: szinv<1>() { } 
+    export defcell INV_X4<: szinv<2>() { }
+    export defcell INV_X8<: szinv<4>() { }
+
+
+    /*--  signal buffers --*/
+
+    defproc buf (bool! y; bool? a, vdd, vss)
+    {
+      bool _y;
+      prs {
+        a => _y-
+      _y => y-
+      }
+    }
+    export defcell BUF_X1<: buf()
+    {
+      sizing { _y {-1}; y {-1} }
+    }
+    export defcell BUF_X2<: buf()
+    {
+      sizing { _y {-1}; y {-2} }
+    }
+    export defcell BUF_X3<: buf()
+    {
+      sizing { _y {-1.5}; y {-3} }
+    }
+    export defcell BUF_X4<: buf()
+    {
+      sizing { _y {-1.5}; y {-4,2} }
+    }
+        export defcell BUF_X6<: buf()
+    {
+      sizing { _y {-3}; y {-6,2} }
+    }
+        export defcell BUF_X8<: buf()
+    {
+      sizing { _y {-4,2}; y {-8,4} }
+    }
+        export defcell BUF_X12<: buf()
+    {
+      sizing { _y {-6,2}; y {-12,4} }
+    }
+
+    /*-- delay cells --*/
+    // TODO properly
+
+    export defcell DLY4_X1(bool! y; bool? a, vdd, vss)
+    {
+      bool _y;
+      prs {
+        a => _y-
+        _y => y-
+      }
+    }
+
+      
+    /*-- simple gates --*/
+      
+    export defcell NOR2_X1(bool! y; bool? a, b, vdd, vss)
+    {
+      prs {
+        a | b => y-
+      }
+      sizing { y {-1} }
+    }
+      
+    export defcell NOR3_X1(bool! y; bool? a, b, c, vdd, vss)
+    {
+      prs {
+        a | b | c => y-
+      }
+      sizing { y {-1} }
+    } 
+
+    export defcell NOR4_X1(bool! y; bool? a, b, c, d, vdd, vss)
+    {
+      prs {
+        a | b | c | d => y-
+      }
+      sizing { y {-1} }
+    }  
+
+
+    export defcell OR2_X1(bool! y; bool? a, b, vdd, vss)
+    {
+      bool _y;
+      prs {
+        a | b => _y-
+        _y => y-
+      }
+      sizing { _y{-1}; y{-1} }
+    }
+      
+    export defcell OR2_X2(bool! y; bool? a, b, vdd, vss)
+    {
+      bool _y;
+      prs {
+        a | b => _y-
+        _y => y-
+      }
+      sizing { _y{-1}; y{-2} }
+    }
+
+    export defcell OR3_X1(bool! y; bool? a, b, c, vdd, vss)
+    {
+      bool _y;
+      prs {
+        a | b | c => _y-
+        _y => y-
+      }
+      sizing { _y{-1}; y{-1} }
+    }
+
+    export defcell OR4_X1(bool! y; bool? a, b, c, d, vdd, vss)
+    {
+      bool _y;
+      prs {
+        a | b | c | d => _y-
+        _y => y-
+      }
+      sizing { _y{-1}; y{-1} }
+    }
+
+
+    export defcell NAND2_X1(bool! y; bool? a, b, vdd, vss)
+    {
+      prs {  
+        a & b => y-
+      }
+      sizing { y{-1} }
+    }
+      
+    export defcell NAND3_X1(bool! y; bool? a, b, c, vdd, vss)
+    {
+      prs {  
+        a & b & c => y-
+      }
+      sizing { y{-1} }
+    }
+
+    export defcell NAND4_X1(bool! y; bool? a, b, c, d, vdd, vss)
+    {
+      prs {  
+        a & b & c & d => y-
+      }
+      sizing { y{-1} }
+    }
+
+    export defcell AND2_X1(bool! y; bool? a, b, vdd, vss) 
+    {
+      bool _y;
+      prs {  
+        a & b => _y- 
+      _y => y-
+      }
+      sizing { _y{-1}; y{-1} }
+    } 
+
+    export defcell AND2_X2(bool! y; bool? a, b, vdd, vss) 
+    { 
+      bool _y;
+      prs {
+        a & b => _y-
+      _y => y-
+      }
+      sizing { _y{-1}; y{-2} }
+    }
+
+    export defcell AND3_X1(bool! y; bool? a, b, c, vdd, vss) 
+    {
+      bool _y;
+      prs {  
+        a & b & c => _y- 
+      _y => y-
+      }
+      sizing { _y{-1}; y{-1} }
+    } 
+
+    export defcell AND4_X1(bool! y; bool? a, b, c, d, vdd, vss) 
+    {
+      bool _y;
+      prs {  
+        a & b & c & d => _y- 
+      _y => y-
+      }
+      sizing { _y{-1}; y{-1} }
+    }
+
+    export defcell XOR2_X1(bool! y; bool? a, b, vdd, vss)
+    {
+      bool _a, _b;
+      prs {
+        a => _a-
+        b => _b-
+
+        [keeper=0] ~b & ~_a | ~_b & ~a -> y+
+        _b & _a | b & a -> y-
+      }
+      sizing { _a{-1}; _b{-1}; y{-1} }
+    }
+
+    export defcell XNOR2_X1(bool! y; bool? a, b, vdd, vss)
+    {
+      bool _a, _b;
+      prs {
+        a => _a-
+        b => _b-
+
+        [keeper=0] ~b & ~a | ~_b & ~_a -> y+
+        b & _a | _b & a -> y-
+      }
+      sizing { _a{-1}; _b{-1}; y{-1} }
+    }
+
+    export defcell MUX2_X1(bool! y; bool? a, b, s, vdd, vss)
+    {
+      // y = !( S ? a : b )
+      // Adjusted to fit the XFAB Muxes
+      bool _s;
+      bool _y;
+      prs {
+        s => _s-
+
+        [keeper=0] ~a & ~s | ~b & ~_s -> _y+
+        a & _s | b & s -> _y-
+        _y => y-
+      }
+      sizing { _s{-1}; y{-1}; _y{-1}}
+    }
+
+    export defcell MUX4_X1(bool! y; bool? a, b, c, d, s0, s1, vdd, vss)
+    {
+      // y = !( S ? a : b )
+      bool _s0;
+      bool _s1;
+      bool _yab;
+      bool _ycd;
+
+      prs {
+        s0 => _s0-
+        s1 => _s1-
+
+        [keeper=0] a & _s0 | b & s0 -> _yab-
+        ~a & ~s0 | ~b & ~_s0 -> _yab+
+
+        [keeper=0] c & _s0 | d & s0 -> _ycd-
+        ~c & ~s0 | ~d & ~_s0 -> _ycd+
+
+        [keeper=0]_yab & _s1 | _ycd & s1 -> y-
+        ~_yab & ~s1 | ~_ycd & ~_s1 -> y+
+
+      }
+      sizing {_s0{-1}; _s1{-1}; y{-1}; _yab{-1}; _ycd{-1}}
+    }
+
+
+    export defcell OAI21_X1(bool! y; bool? a, b, c, vdd, vss)
+    {
+      prs {
+        (a | b) & c => y-  
+      }
+      sizing { y{-1} }
+    }
+
+    export defcell AOI21_X1(bool! y; bool? a, b, c, vdd, vss) 
+    { 
+      prs {
+        a & b | c => y-
+      }
+      sizing { y{-1} }
+    }
+
+    export defcell OAI22_X1(bool! y; bool? a, b, c, d, vdd, vss)
+    {
+      // y = !((a|b) & (c|d))
+      prs {
+        (a | b) & (c | d) => y-  
+      }
+      sizing { y{-1} }
+    }
+
+    export defcell AOI22_X1(bool! y; bool? a, b, c, d, vdd, vss) 
+    { 
+      prs {
+        a & b | c & d => y-
+      }
+      sizing { y{-1} }
+    }
+
+
+    /*--- buffered transmission gates ---*/
+      
+    export defcell TBUF1_X1 (bool! y; bool? a, en, vdd, vss)
+    {
+      bool _en;
+      prs {
+        en => _en-
+
+      ~a & ~_en -> y+
+        a & en -> y-
+      }
+      sizing { _en{-1}; y{-1} }
+    }
+    
+    export defcell TBUF_X2 (bool! y; bool? a, en, vdd, vss)
+    {
+      bool _en;
+      prs {
+        en => _en-
+
+      ~a & ~_en -> y+
+        a & en -> y-
+      }
+      sizing { _en{-2}; y{-2,2} }
+    }
+  }
+}
+
+

dataflow_neuro/cell_lib_std_test.act

@@ -0,0 +1,58 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Alex Madison
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "cell_lib_std.act";
+
+open std_cell_template::dataflow_neuro;
+
+TIELO_X1 cell1;
+TIEHI_X1 cell2;
+INV_X1 cell4;
+INV_X2 cell5;
+INV_X4 cell6;
+INV_X8 cell7;
+CLKBUF1 cell8;
+CLKBUF2 cell9;
+CLKBUF3 cell10;
+NOR2_X1 cell11;
+NOR3_X1 cell12;
+OR2_X1 cell13;
+OR2_X2 cell14;
+NAND2_X1 cell15;
+NAND3_X1 cell16;
+AND2_X1 cell17;
+AND2_X2 cell18;
+XOR2_X1 cell19;
+XNOR2_X1 cell20;
+MUX2_X1 cell25;
+OAI21_X1 cell26;
+AOI21_X1 cell27;
+OAI22_X1 cell28;
+AOI22_X1 cell29;
+TBUF1_X1 cell30;
+TBUF_X2 cell31;

dataflow_neuro/primitives.act

@@ -0,0 +1,790 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ * 
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+import "../../dataflow_neuro/cell_lib_async.act";
+import "../../dataflow_neuro/cell_lib_std.act";
+import "../../dataflow_neuro/treegates.act";
+// import tmpl::dataflow_neuro;
+// import tmpl::dataflow_neuro;
+import std::channel;
+open std::channel;
+
+namespace tmpl {
+    namespace dataflow_neuro {
+
+        // @ole talk to rajit, we use valid the wrong way arround according to stdlib
+        template<pbool reset; pint V; pint M>
+        defchan gen_avMx1of2 <: chan(int<M>) (std::data::Mx1of2?!<M> d; bool!? a; bool!? v)
+        {
+          { 0 <= V & std::ceil_log2(V) < M : "Initial token value out of range" };
+          
+          methods {
+            /*-- initialize channel, sender end --*/
+            send_init {
+              [ reset -> (,i:M: [ ((V >> i) & 1) = 0 -> d.d[i].f+ [] else -> d.d[i].t+ ]);[v]
+              [] else -> (,i:M: d.d[i].t-,d.d[i].f-);[~v]
+              ]
+            }
+        
+            /*-- set output data --*/
+            set {
+              (,i:M: [((self >> i) & 1) = 0 -> d.d[i].f+ [] else -> d.d[i].t+ ]);[v]
+            }
+        
+            /*-- finish synchronization --*/
+            send_up {
+              [a]
+            }
+        
+            /*-- reset part of the protocol --*/
+            send_rest {
+              (,i:M: d.d[i].t-,d.d[i].f-);[~v],[~a]
+            }
+        
+            /*-- initialize channel, receiver end --*/
+            recv_init {
+              v-;a-
+            }
+        
+            /*-- get value --*/
+            get {
+              [(&i:M: d.d[i].t | d.d[i].f)];
+              self := 0;
+              (;i:M: [ d.d[i].t -> self := self | (1 << i)
+        	     [] else -> skip
+        	     ]
+              )
+            }
+        
+            /*-- finish synchronization action --*/
+            recv_up {
+              v+,a+
+            }
+        
+            /*-- reset part of the protocol --*/
+            recv_rest {
+              [(&i:M:~d.d[i].t & ~d.d[i].f)];v-,a-
+            }
+        
+            /*-- probe expression on receiver --*/
+            // i think this deadlocks with recv_up
+            recv_probe = v;
+        
+            // no sender probe
+          }
+        }
+        export defchan avMx1of2 <: gen_avMx1of2<false,0> () { }
+        export defchan avrMx1of2 <: gen_avMx1of2<true,0> () { }
+        
+
+        /**
+         * the buffer template gives you a standart buffer of bitwidth N
+         *
+         */
+        export template<pint N>
+        defproc buffer (avMx1of2<N> in; avMx1of2<N> out; bool? reset_B; power supply) {
+            //control
+            bool _en, _reset_BX,_reset_BXX[N];
+            A_3C_RB_X4 inack_ctl(.c1=_en,.c2=in.v,.c3=out.v,.y=in.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+            A_1C1P_X1 en_ctl(.c1=in.a,.p1=out.v,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
+
+
+            BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+	          sigbuf<N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
+	    
+            //validity
+            bool _in_v;
+            vtree<N> vc(.in=in.d,.out=_in_v,.supply=supply);
+            BUF_X4 in_v_buf(.a=_in_v, .y=in.v,.vdd=supply.vdd,.vss=supply.vss);
+            
+            //function
+            bool _out_a_BX_t[N],_out_a_BX_f[N],_out_a_B,_en_X_t[N],_en_X_f[N];
+            A_2C1N_RB_X4 f_buf_func[N];
+            A_2C1N_RB_X4 t_buf_func[N];
+            sigbuf<N> en_buf_t(.in=_en, .out=_en_X_t, .supply=supply);
+            sigbuf<N> en_buf_f(.in=_en, .out=_en_X_f, .supply=supply);
+            INV_X1 out_a_inv(.a=out.a,.y=_out_a_B);
+            sigbuf<N> out_a_B_buf_f(.in=_out_a_B,.out=_out_a_BX_t);
+            sigbuf<N> out_a_B_buf_t(.in=_out_a_B,.out=_out_a_BX_f);
+            // check if you can also do single var to array connect a=b[N]
+            // and remove them from the loop
+            (i:N: 
+                f_buf_func[i].y=out.d.d[i].f;
+                t_buf_func[i].y=out.d.d[i].t;
+                f_buf_func[i].c1=_en_X_f[i];
+                t_buf_func[i].c1=_en_X_t[i];
+                f_buf_func[i].c2=_out_a_BX_f[i];
+                t_buf_func[i].c2=_out_a_BX_t[i];
+                f_buf_func[i].n1=in.d.d[i].f;
+                t_buf_func[i].n1=in.d.d[i].t;
+                f_buf_func[i].vdd=supply.vdd;
+                t_buf_func[i].vdd=supply.vdd;
+                f_buf_func[i].vss=supply.vss;
+                t_buf_func[i].vss=supply.vss;
+                t_buf_func[i].pr_B = _reset_BXX[i];
+                t_buf_func[i].sr_B = _reset_BXX[i];
+                f_buf_func[i].pr_B = _reset_BXX[i];
+                f_buf_func[i].sr_B = _reset_BXX[i];
+            )
+        }
+        // A template creating a FIFO of M buffers with N bits each
+        export template<pint N;pint M>
+        defproc fifo(avMx1of2<N> in; avMx1of2<N> out; bool? reset_B; power supply)
+        {
+          buffer<N> fifo_element[M];
+          bool _reset_BXX[M];
+          fifo_element[0].in = in ;
+          fifo_element[0].supply = supply;
+          fifo_element[0].reset_B = _reset_BXX[0];
+          (i:1..M-1:
+            fifo_element[i].in = fifo_element[i-1].out;
+            fifo_element[i].supply = supply;
+            fifo_element[i].reset_B = _reset_BXX[i];
+          )
+          fifo_element[N-1].out = out;
+
+          // reset buffers
+          bool _reset_BX;
+          BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+          sigbuf<M> reset_bufarray(.in=_reset_BX, .out=_reset_BXX,.supply = supply);
+        }
+
+        /**
+         * Buffer_S template.
+         * S maybe stands for special.
+         * Like a buffer, except that the output function block does not load the data in
+         * until the input data is valid.
+         * Not entirely sure what the point of it is, 
+         * Ole says is useful for funky timing scenarios.
+         */
+        export template<pint N>
+        defproc buffer_s (avMx1of2<N> in; avMx1of2<N> out; bool? reset_B; power supply) {
+            //control
+            bool _en, _reset_BX,_reset_BXX[N];
+            A_3C_RB_X4 inack_ctl(.c1=_en,.c2=in.v,.c3=out.v,.y=in.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+            A_1C1P_X1 en_ctl(.c1=in.a,.p1=out.v,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
+
+
+            BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+            sigbuf<N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX, .supply=supply);
+        
+            //validity
+            bool _in_v, _in_vX[N];
+            vtree<N> vc(.in=in.d,.out=_in_v,.supply=supply);
+            BUF_X4 in_v_buf4(.a=_in_v, .y=in.v,.vdd=supply.vdd,.vss=supply.vss);
+            sigbuf<N> in_v_bufN(.in = in.v, .out = _in_vX, .supply = supply);
+
+            //function
+            bool _out_a_BX_t[N],_out_a_BX_f[N],_out_a_B,_en_X_t[N],_en_X_f[N];
+            A_2C2N_RB_X4 f_buf_func[N];
+            A_2C2N_RB_X4 t_buf_func[N];
+            sigbuf<N> en_buf_t(.in=_en, .out=_en_X_t, .supply=supply);
+            sigbuf<N> en_buf_f(.in=_en, .out=_en_X_f, .supply=supply);
+            INV_X1 out_a_inv(.a=out.a,.y=_out_a_B);
+            sigbuf<N> out_a_B_buf_f(.in=_out_a_B,.out=_out_a_BX_t, .supply=supply);
+            sigbuf<N> out_a_B_buf_t(.in=_out_a_B,.out=_out_a_BX_f, .supply=supply);
+            // check if you can also do single var to array connect a=b[N]
+            // and remove them from the loop
+            (i:N: 
+                f_buf_func[i].y=out.d.d[i].f;
+                t_buf_func[i].y=out.d.d[i].t;
+                f_buf_func[i].c1=_en_X_f[i];
+                t_buf_func[i].c1=_en_X_t[i];
+                f_buf_func[i].c2=_out_a_BX_f[i];
+                t_buf_func[i].c2=_out_a_BX_t[i];
+                f_buf_func[i].n1=in.d.d[i].f;
+                t_buf_func[i].n1=in.d.d[i].t;
+                f_buf_func[i].n2=_in_vX[i];
+                t_buf_func[i].n2=_in_vX[i];
+                f_buf_func[i].vdd=supply.vdd;
+                t_buf_func[i].vdd=supply.vdd;
+                f_buf_func[i].vss=supply.vss;
+                t_buf_func[i].vss=supply.vss;
+                t_buf_func[i].pr_B = _reset_BXX[i];
+                t_buf_func[i].sr_B = _reset_BXX[i];
+                f_buf_func[i].pr_B = _reset_BXX[i];
+                f_buf_func[i].sr_B = _reset_BXX[i];
+            )
+        }
+    
+        export template<pint N>
+        defproc demux (avMx1of2<N> in; avMx1of2<N> out1; avMx1of2<N> out2; bool? reset_B; avMx1of2<1> cond; power supply) {
+            //control
+            bool _en, _reset_BX,_reset_BXX[2*N], _out_v, _in_c_v_;
+            
+            OR2_X1 out_or(.a=out1.v, .b=out2.v, .y=_out_v,.vdd=supply.vdd,.vss=supply.vss);
+            A_3C_RB_X4 inack_ctl(.c1=_en,.c2=_in_c_v_,.c3=_out_v,.y=in.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+            A_1C1P_X1 en_ctl(.c1=in.a,.p1=_out_v,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
+            BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+            sigbuf<2*N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
+            //validity
+            bool _in_v, _c_f_buf[N], _c_t_buf[N], _c_v;
+            
+            sigbuf<N> c_buf_t(.in=cond.d.d[0].t, .out=_c_t_buf, .supply=supply);
+            sigbuf<N> c_buf_f(.in=cond.d.d[0].f, .out=_c_f_buf, .supply=supply);
+            
+            OR2_X1 c_f_c_t_or(.a=cond.d.d[0].t, .b=cond.d.d[0].f, .y=_c_v,.vdd=supply.vdd,.vss=supply.vss);
+            vtree<N> vc(.in=in.d,.out=_in_v,.supply=supply);
+            
+            A_2C_B_X1 c_el(.c1=_c_v, .c2=_in_v, .y=_in_c_v_,.vdd=supply.vdd,.vss=supply.vss);
+            BUF_X4 in_v_buf(.a=_in_v, .y=in.v,.vdd=supply.vdd,.vss=supply.vss);
+            
+            
+            //function
+            //func buffer out1
+            bool _out1_a_BX_t[N],_out1_a_BX_f[N],_out1_a_B,_en1_X_t[N],_en1_X_f[N];
+            A_2C2N_RB_X4 out1_f_buf_func[N];
+            A_2C2N_RB_X4 out1_t_buf_func[N];
+            sigbuf<N> out1_en_buf_t(.in=_en, .out=_en1_X_t, .supply=supply);
+            sigbuf<N> out1_en_buf_f(.in=_en, .out=_en1_X_f, .supply=supply);
+            INV_X1 out1_a_inv(.a=out1.a,.y=_out1_a_B);
+            sigbuf<N> out1_a_B_buf_f(.in=_out1_a_B,.out=_out1_a_BX_t, .supply=supply);
+            sigbuf<N> out1_a_B_buf_t(.in=_out1_a_B,.out=_out1_a_BX_f, .supply=supply);
+            (i:N: 
+                out1_f_buf_func[i].y=out1.d.d[i].f;
+                out1_t_buf_func[i].y=out1.d.d[i].t;
+                out1_f_buf_func[i].c1=_en1_X_f[i];
+                out1_t_buf_func[i].c1=_en1_X_t[i];
+                out1_f_buf_func[i].c2=_out1_a_BX_f[i];
+                out1_t_buf_func[i].c2=_out1_a_BX_t[i];
+                out1_f_buf_func[i].n1=in.d.d[i].f;
+                out1_t_buf_func[i].n1=in.d.d[i].t;
+                out1_f_buf_func[i].vdd=supply.vdd;
+                out1_t_buf_func[i].vdd=supply.vdd;
+                out1_f_buf_func[i].vss=supply.vss;
+                out1_t_buf_func[i].vss=supply.vss;
+                out1_t_buf_func[i].pr_B = _reset_BXX[i];
+                out1_t_buf_func[i].sr_B = _reset_BXX[i];
+                out1_f_buf_func[i].pr_B = _reset_BXX[i];
+                out1_f_buf_func[i].sr_B = _reset_BXX[i];
+                out1_f_buf_func[i].n2=_c_t_buf[i];
+                out1_t_buf_func[i].n2=_c_t_buf[i];
+            )
+
+            //func buffer out2
+            bool _out2_a_BX_t[N],_out2_a_BX_f[N],_out2_a_B,_en2_X_t[N],_en2_X_f[N];
+            A_2C2N_RB_X4 out2_f_buf_func[N];
+            A_2C2N_RB_X4 out2_t_buf_func[N];
+            sigbuf<N> out2_en_buf_t(.in=_en, .out=_en2_X_t, .supply=supply);
+            sigbuf<N> out2_en_buf_f(.in=_en, .out=_en2_X_f, .supply=supply);
+            INV_X1 out2_a_inv(.a=out2.a,.y=_out2_a_B);
+            sigbuf<N> out2_a_B_buf_f(.in=_out2_a_B,.out=_out2_a_BX_t);
+            sigbuf<N> out2_a_B_buf_t(.in=_out2_a_B,.out=_out2_a_BX_f);
+            (i:N: 
+                out2_f_buf_func[i].y=out2.d.d[i].f;
+                out2_t_buf_func[i].y=out2.d.d[i].t;
+                out2_f_buf_func[i].c1=_en2_X_f[i];
+                out2_t_buf_func[i].c1=_en2_X_t[i];
+                out2_f_buf_func[i].c2=_out2_a_BX_f[i];
+                out2_t_buf_func[i].c2=_out2_a_BX_t[i];
+                out2_f_buf_func[i].n1=in.d.d[i].f;
+                out2_t_buf_func[i].n1=in.d.d[i].t;
+                out2_f_buf_func[i].vdd=supply.vdd;
+                out2_t_buf_func[i].vdd=supply.vdd;
+                out2_f_buf_func[i].vss=supply.vss;
+                out2_t_buf_func[i].vss=supply.vss;
+                out2_t_buf_func[i].pr_B = _reset_BXX[i+N-1];
+                out2_t_buf_func[i].sr_B = _reset_BXX[i+N-1];
+                out2_f_buf_func[i].pr_B = _reset_BXX[i+N-1];
+                out2_f_buf_func[i].sr_B = _reset_BXX[i+N-1];
+                out2_f_buf_func[i].n2=_c_f_buf[i];
+                out2_t_buf_func[i].n2=_c_f_buf[i];
+            )
+        }
+
+        export template<pint N>
+        defproc fork (avMx1of2<N> in; avMx1of2<N> out1; avMx1of2<N> out2 ; bool? reset_B; power supply) {
+          
+          // control 
+          bool _en, _reset_BX,_reset_BXX[N*2];
+          A_4C_RB_X4 inack_ctl(.c1=_en,.c2=in.v,.c3=out1.v,.c4=out2.v,.y=in.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+          A_1C2P_X1 en_ctl(.c1=in.a,.p1=out1.v,.p2=out2.v,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
+          
+
+          //reset_buffers
+          BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+          sigbuf<N*2> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
+
+
+          //validity
+          bool _in_v;
+          vtree<N> vc(.in=in.d,.out=_in_v,.supply=supply);
+          BUF_X4 in_v_buf(.a=_in_v, .y=in.v,.vdd=supply.vdd,.vss=supply.vss);
+
+          //function
+            //func buffer out1
+            bool _out1_a_BX_t[N],_out1_a_BX_f[N],_out1_a_B,_en1_X_t[N],_en1_X_f[N];
+            A_2C1N_RB_X4 out1_f_buf_func[N];
+            A_2C1N_RB_X4 out1_t_buf_func[N];
+            sigbuf<N> out1_en_buf_t(.in=_en, .out=_en1_X_t, .supply=supply);
+            sigbuf<N> out1_en_buf_f(.in=_en, .out=_en1_X_f, .supply=supply);
+            INV_X1 out1_a_inv(.a=out1.a,.y=_out1_a_B);
+            sigbuf<N> out1_a_B_buf_f(.in=_out1_a_B,.out=_out1_a_BX_t);
+            sigbuf<N> out1_a_B_buf_t(.in=_out1_a_B,.out=_out1_a_BX_f);
+            (i:N: 
+                out1_f_buf_func[i].y=out1.d.d[i].f;
+                out1_t_buf_func[i].y=out1.d.d[i].t;
+                out1_f_buf_func[i].c1=_en1_X_f[i];
+                out1_t_buf_func[i].c1=_en1_X_t[i];
+                out1_f_buf_func[i].c2=_out1_a_BX_f[i];
+                out1_t_buf_func[i].c2=_out1_a_BX_t[i];
+                out1_f_buf_func[i].n1=in.d.d[i].f;
+                out1_t_buf_func[i].n1=in.d.d[i].t;
+                out1_f_buf_func[i].vdd=supply.vdd;
+                out1_t_buf_func[i].vdd=supply.vdd;
+                out1_f_buf_func[i].vss=supply.vss;
+                out1_t_buf_func[i].vss=supply.vss;
+                out1_t_buf_func[i].pr_B = _reset_BXX[i];
+                out1_t_buf_func[i].sr_B = _reset_BXX[i];
+                out1_f_buf_func[i].pr_B = _reset_BXX[i];
+                out1_f_buf_func[i].sr_B = _reset_BXX[i];
+            )
+            //func buffer out2
+            bool _out2_a_BX_t[N],_out2_a_BX_f[N],_out2_a_B,_en2_X_t[N],_en2_X_f[N];
+            A_2C1N_RB_X4 out2_f_buf_func[N];
+            A_2C1N_RB_X4 out2_t_buf_func[N];
+            sigbuf<N> out2_en_buf_t(.in=_en, .out=_en2_X_t, .supply=supply);
+            sigbuf<N> out2_en_buf_f(.in=_en, .out=_en2_X_f, .supply=supply);
+            INV_X1 out2_a_inv(.a=out2.a,.y=_out2_a_B);
+            sigbuf<N> out2_a_B_buf_f(.in=_out2_a_B,.out=_out2_a_BX_t);
+            sigbuf<N> out2_a_B_buf_t(.in=_out2_a_B,.out=_out2_a_BX_f);
+            (i:N: 
+                out2_f_buf_func[i].y=out2.d.d[i].f;
+                out2_t_buf_func[i].y=out2.d.d[i].t;
+                out2_f_buf_func[i].c1=_en2_X_f[i];
+                out2_t_buf_func[i].c1=_en2_X_t[i];
+                out2_f_buf_func[i].c2=_out2_a_BX_f[i];
+                out2_t_buf_func[i].c2=_out2_a_BX_t[i];
+                out2_f_buf_func[i].n1=in.d.d[i].f;
+                out2_t_buf_func[i].n1=in.d.d[i].t;
+                out2_f_buf_func[i].vdd=supply.vdd;
+                out2_t_buf_func[i].vdd=supply.vdd;
+                out2_f_buf_func[i].vss=supply.vss;
+                out2_t_buf_func[i].vss=supply.vss;
+                out2_t_buf_func[i].pr_B = _reset_BXX[i+N-1];
+                out2_t_buf_func[i].sr_B = _reset_BXX[i+N-1];
+                out2_f_buf_func[i].pr_B = _reset_BXX[i+N-1];
+                out2_f_buf_func[i].sr_B = _reset_BXX[i+N-1];
+            )
+        }
+        
+        
+        export template<pint N; pbool CONDITION_SIGN>
+        defproc demux_td (avMx1of2<N> in; avMx1of2<N> out1; a1of1 token; bool? reset_B; avMx1of2<1> cond; power supply) {
+            //control
+            bool _en, _reset_BX,_reset_BXX[N], _out_v, _in_c_v_, _reset_BXt;
+            
+            OR2_X1 out_or(.a=out1.v, .b=token.r, .y=_out_v,.vdd=supply.vdd,.vss=supply.vss);
+            A_3C_RB_X4 inack_ctl(.c1=_en,.c2=_in_c_v_,.c3= _out_v,.y=in.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+            A_1C1P_X1 en_ctl(.c1=in.a,.p1=_out_v,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
+            BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+            BUF_X1 reset_buf_token(.a=_reset_BX, .y=_reset_BXt,.vdd=supply.vdd,.vss=supply.vss);
+            sigbuf<N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
+            //validity
+            bool _in_v, _c_tk_buf, _c_d_buf[N], _c_v, cond_inv_t, cond_inv_f;
+            
+            OR2_X1 c_f_c_t_or(.a=cond.d.d[0].t, .b=cond.d.d[0].f, .y=_c_v,.vdd=supply.vdd,.vss=supply.vss);
+            
+            //orientation of condition
+            [ CONDITION_SIGN ->
+            BUF_X1 c_buf_tk(.a=cond.d.d[0].t, .y=_c_tk_buf);
+            sigbuf<N> c_buf_d(.in=cond.d.d[0].f, .out=_c_d_buf);
+            [] else ->
+            INV_X1 invout_t(.a = cond.d.d[0].t,.y=cond_inv_t,.vdd = supply.vdd,.vss=supply.vss);
+            INV_X1 invout_f(.a = cond.d.d[0].f,.y=cond_inv_f,.vdd = supply.vdd,.vss=supply.vss);
+            BUF_X1 c_buf_tk_inv(.a=cond_inv_t, .y=_c_tk_buf);
+            sigbuf<N> c_buf_d_inv(.in=cond_inv_f, .out=_c_d_buf);
+            ]
+
+            
+            vtree<N> vc(.in=in.d,.out=_in_v,.supply=supply);
+            
+            A_2C_B_X1 c_el(.c1=_c_v, .c2=_in_v, .y=_in_c_v_,.vdd=supply.vdd,.vss=supply.vss);
+            BUF_X4 in_v_buf(.a=_in_v, .y=in.v,.vdd=supply.vdd,.vss=supply.vss);
+            
+            
+            //function
+            //func buffer out1
+            bool _out1_a_BX_t[N],_out1_a_BX_f[N],_out1_a_B,_en1_X_t[N],_en1_X_f[N];
+            A_2C2N_RB_X4 out1_f_buf_func[N];
+            A_2C2N_RB_X4 out1_t_buf_func[N];
+            sigbuf<N> out1_en_buf_t(.in=_en, .out=_en1_X_t, .supply=supply);
+            sigbuf<N> out1_en_buf_f(.in=_en, .out=_en1_X_f, .supply=supply);
+            INV_X1 out1_a_inv(.a=out1.a,.y=_out1_a_B);
+            sigbuf<N> out1_a_B_buf_f(.in=_out1_a_B,.out=_out1_a_BX_t);
+            sigbuf<N> out1_a_B_buf_t(.in=_out1_a_B,.out=_out1_a_BX_f);
+            (i:N: 
+                out1_f_buf_func[i].y=out1.d.d[i].f;
+                out1_t_buf_func[i].y=out1.d.d[i].t;
+                out1_f_buf_func[i].c1=_en1_X_f[i];
+                out1_t_buf_func[i].c1=_en1_X_t[i];
+                out1_f_buf_func[i].c2=_out1_a_BX_f[i];
+                out1_t_buf_func[i].c2=_out1_a_BX_t[i];
+                out1_f_buf_func[i].n1=in.d.d[i].f;
+                out1_t_buf_func[i].n1=in.d.d[i].t;
+                out1_f_buf_func[i].vdd=supply.vdd;
+                out1_t_buf_func[i].vdd=supply.vdd;
+                out1_f_buf_func[i].vss=supply.vss;
+                out1_t_buf_func[i].vss=supply.vss;
+                out1_t_buf_func[i].pr_B = _reset_BXX[i];
+                out1_t_buf_func[i].sr_B = _reset_BXX[i];
+                out1_f_buf_func[i].pr_B = _reset_BXX[i];
+                out1_f_buf_func[i].sr_B = _reset_BXX[i];
+                out1_f_buf_func[i].n2=_c_d_buf[i];
+                out1_t_buf_func[i].n2=_c_d_buf[i];
+            )
+
+            //token out
+           
+          bool token_a_out;
+          A_2C2N_RB_X4 token_buf;
+          INV_X1 outt_a_inv(.a=token.a,.y=token_a_out);
+          
+          token_buf.y = token.r;
+          token_buf.c1 = _en;
+          token_buf.c2 = token_a_out; 
+          token_buf.n1 = _c_tk_buf;
+          token_buf.n2 = _in_v;
+          
+          token_buf.vdd = supply.vdd;
+          token_buf.vss = supply.vss;
+          token_buf.pr_B = _reset_BXt;
+          token_buf.sr_B = _reset_BXt;
+        }
+        
+        
+        export 
+        defproc arbiter_handshake(a1of1 in1; a1of1 in2; a1of1 out; power supply)
+        {
+          bool _y1_arb,_y2_arb;
+
+          A_2C_B_X1 ack_cell1(.c1 = out.a,.c2 = _y1_arb,.y = in1.a,.vdd = supply.vdd, .vss = supply.vss);
+          A_2C_B_X1 ack_cell2(.c1 = out.a,.c2 = _y2_arb,.y = in2.a,.vdd = supply.vdd, .vss = supply.vss);
+          OR2_X1 or_cell(.a = _y1_arb, .b = _y2_arb, .y = out.r,.vdd = supply.vdd, .vss = supply.vss);
+          ARBITER arbiter(.a = in1.r, .b = in2.r, .c = in2.a, .d = in1.a, .y1 = _y1_arb, .y2 = _y2_arb, .vdd = supply.vdd, .vss = supply.vss);
+          
+        }
+        //The buffer_t_valid doesn't work
+        export 
+        defproc buffer_t_valid(a1of1 in; a1of1 out; bool? reset_B; power supply)
+        {
+            //control
+            bool _en, _reset_BX;
+            A_3C_RB_X4 inack_ctl(.c1=_en,.c2=in.r,.c3=out.r,.y=in.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+            A_1C1P_X1 en_ctl(.c1=in.a,.p1=out.r,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
+            
+            //function
+            bool _out_a_B;
+            INV_X1 inv_outa(.a = out.a,.y=_out_a_B,.vdd = supply.vdd,.vss=supply.vss);
+            A_2C1N_RB_X4 buf_func(.c1 = _en,.c2 = _out_a_B, .n1 = in.r,.y = out.r, .pr_B = _reset_BX, .sr_B = _reset_BX,.vdd = supply.vdd,.vss=supply.vss);
+
+            
+            //reset buffers
+            BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+        }
+
+        // A tree composed by arbiters. The first layer takes N signals 
+        export template<pint N>
+        defproc arbiter_tree(a1of1 in[N]; a1of1 out; power supply)
+        {
+
+            bool tout;
+
+            { N > 0 : "Invalid N, should be greater than 0" };
+
+            /* We calculate here how many arbiters we need to create for the full tree */
+            pint inputs_in_layer, end, elements_in_layer;
+            pint odd_element_idx = 0;
+            pint odd_element_flag = 0;
+            inputs_in_layer = 0;
+            end = N-1;
+            pint element_counter = 0;
+            // Here we start a for loop to count the elements in the tree
+            // The loop iterates for every successive layer
+            // i is the variable used to iterate the inputs, 
+            // j counts the elements in the layer
+            *[ inputs_in_layer != end ->
+                elements_in_layer = 0; // At every layer the counter of the elements is resetted
+                *[ inputs_in_layer < end ->
+                    [ inputs_in_layer + 1 >= end ->
+                        //In this case, the number of input is even: the layer finishes
+                        inputs_in_layer = end; 
+                        odd_element_flag = 0;
+                    [] inputs_in_layer + 2 >= end ->
+                        //In this case, we arrived at the last input, this means the inputs are odd
+                        //We need to save the odd input index and move it to the next layer, 
+                        //up to when the resulting number is even
+                        odd_element_idx = end;
+                        odd_element_flag = 1;
+                        inputs_in_layer = end; 
+                    [] else ->
+                        //If we are not close to the end, analyzes the next two inputs
+                        inputs_in_layer = inputs_in_layer +2;
+                    ]
+                    elements_in_layer = elements_in_layer + 1; //At every step the elements count is updated
+          
+                ]
+                //Move the inputs_in_layer to the next layer
+                //Increase the end to account for the next layer elements
+                //If there was an odd element, count it also in the end
+                inputs_in_layer = end + 1;
+                end = end + elements_in_layer + odd_element_flag;
+                element_counter = element_counter + elements_in_layer;
+            ]
+
+            { element_counter = 4 : "Michele you did wrong" };
+            
+            // Creating the elements of the tree
+            arbiter_handshake arb_array[element_counter];
+            (i:element_counter:arb_array[i].supply = supply;)
+            // These are the wires that connect one element of the tree to the others
+            a1of1 channels[element_counter*2];
+
+            //Connecting the first channels to the inputs
+            (i:N:channels[i] = in[i];)
+            channels[element_counter*2-1] = out;
+            //Now we redo the for loop but here to assign the channels to the elements
+            odd_element_idx = 0;
+            odd_element_flag = 0;
+            inputs_in_layer = 0;
+            end = N-1;
+            { end=4 : "Michele you did wrong" };
+            // Here we start a for loop to count the elements in the tree
+            // The loop iterates for every successive layer
+            // i is the variable used to iterate the inputs, 
+            // j counts the elements in the layer
+            *[ inputs_in_layer != end ->
+                elements_in_layer = 0; // At every layer the counter of the elements is resetted
+                *[ inputs_in_layer < end ->
+                    [ inputs_in_layer + 1 >= end ->
+                        //In this case, the number of input is even: the layer finishes
+                        [ odd_element_flag >= 1 ->
+                                arb_array[elements_in_layer].in1 = channels[inputs_in_layer];
+                                arb_array[elements_in_layer].in2 = channels[odd_element_idx];
+                            [] else ->
+                                arb_array[elements_in_layer].in1 = channels[inputs_in_layer];
+                                arb_array[elements_in_layer].in2 = channels[inputs_in_layer+1];
+                            ]
+                        inputs_in_layer = end; 
+                        odd_element_flag = 0;
+                    [] inputs_in_layer + 2 >= end ->
+                        //In this case, we arrived at the last input, this means the inputs are odd
+                        //We need to save the odd input index and move it to the next layer, 
+                        //up to when the resulting number is even
+                        odd_element_idx = end;
+                        odd_element_flag = 1;
+                        { end<8 : "Michele you did wrong" };
+                        { odd_element_idx=4 : "Michele you did wrong" };
+                        arb_array[elements_in_layer].in1 = channels[inputs_in_layer];
+                        arb_array[elements_in_layer].in2 = channels[inputs_in_layer+1]; 
+                        inputs_in_layer = end; 
+                    [] else ->
+                        //If we are not close to the end, analyzes the next two inputs
+                        arb_array[elements_in_layer].in1 = channels[inputs_in_layer];
+                        arb_array[elements_in_layer].in2 = channels[inputs_in_layer+1]; 
+                        inputs_in_layer = inputs_in_layer +2;
+
+                    ]
+                    elements_in_layer = elements_in_layer + 1; //At every step the elements count is updated
+          
+                ]
+                //Move the inputs_in_layer to the next layer
+                //Increase the end to account for the next layer elements
+                //If there was an odd element, count it also in the end
+                inputs_in_layer = end + 1;
+                end = end + elements_in_layer + odd_element_flag;
+                element_counter = element_counter + elements_in_layer;
+            ]
+
+
+
+        }
+        export template<pint N>
+        defproc merge (avMx1of2<N> in1; avMx1of2<N> in2; avMx1of2<N> out ; bool? reset_B; power supply) {
+
+          //out acknowledge sigbuffer and inverter
+          bool _out_a_B,_out_a_BX[2*N];
+          INV_X1 out_a_inverter(.a = out.a, .y = _out_a_B);
+          sigbuf<2*N> out_a_buffer(.in = _out_a_B,.out = _out_a_BX,.supply=supply);
+
+          //control
+          bool _in1_a_B,_in2_a_B,_en,_en_X[2*N], _reset_BX,_reset_BXX[2*N];
+          bool _in1_arb,_in2_arb,_in1_arb_X[2*N],_in2_arb_X[2*N];
+          A_4C_RB_X4 in1ack_ctl(.c1=_in1_arb,.c2=_en,.c3=in1.v,.c4=out.v,.y=in1.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+          A_4C_RB_X4 in2ack_ctl(.c1=_in2_arb,.c2=_en,.c3=in2.v,.c4=out.v,.y=in2.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+          A_4P1N1N_X1 en_ctl(.p1 = in1.a,.p2=in2.a,.p3=out.a,.p4 = out.v, .n1 = in1.a,.n2 = in2.a,.y = _en,.vdd=supply.vdd,.vss=supply.vss);
+          sigbuf<2*N> en_buffer(.in = _en,.out = _en_X,.supply=supply);
+          INV_X1 in1ack_ctl_inv(.a=in1.a,.y=_in1_a_B,.vdd=supply.vdd,.vss=supply.vss);
+          INV_X1 in2ack_ctl_inv(.a=in2.a,.y=_in2_a_B,.vdd=supply.vdd,.vss=supply.vss);
+
+          //reset_buffers
+          BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+          sigbuf<N*2> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
+
+          //validity
+          a1of1 _in1_temp,_in2_temp,_out_temp;
+          bool _in1_arb_temp,_in2_arb_temp;
+          vtree<N> vc1(.in=in1.d,.out=in1.v,.supply=supply);
+          vtree<N> vc2(.in=in2.d,.out=in2.v,.supply=supply);
+          arbiter_handshake validity_arb(.in1 = _in1_temp,.in2 = _in2_temp,.out =_out_temp, .supply = supply);
+          _in1_temp.r = in1.v;
+          _in2_temp.r = in2.v;
+          _in1_temp.a = _in1_arb_temp;
+          _in2_temp.a = _in2_arb_temp;
+          _out_temp.r = _out_temp.a;
+          AND2_X1 AND_arb1(.a = _in2_a_B,.b = _in1_arb_temp, .y = _in1_arb);
+          AND2_X1 AND_arb2(.a = _in1_a_B,.b = _in2_arb_temp, .y = _in2_arb);
+          sigbuf<2*N> arb2function1(.in = _in1_arb,.out = _in1_arb_X,.supply=supply);
+          sigbuf<2*N> arb2function2(.in = _in2_arb,.out = _in2_arb_X,.supply=supply);
+
+          //function
+          A_2C2N2N_RB_X1 merge_func_t[N];
+          A_2C2N2N_RB_X1 merge_func_f[N];
+          (i:N: 
+            merge_func_t[i].c1 = _en_X[i];
+            merge_func_t[i].c2 = _out_a_BX[i];
+            merge_func_t[i].n1 = _in1_arb_X[i];
+            merge_func_t[i].n2 = in1.d.d[i].t;
+            merge_func_t[i].n3 = _in2_arb_X[i];
+            merge_func_t[i].n4 = in2.d.d[i].t;
+            merge_func_t[i].y = out.d.d[i].t;
+            merge_func_t[i].vdd=supply.vdd;
+            merge_func_t[i].vss=supply.vss;
+            merge_func_t[i].pr_B = _reset_BXX[i];
+            merge_func_t[i].sr_B = _reset_BXX[i];
+
+            merge_func_f[i].c1 = _en_X[i+N];
+            merge_func_f[i].c2 = _out_a_BX[i+N];
+            merge_func_f[i].n1 = _in1_arb_X[i+N];
+            merge_func_f[i].n2 = in1.d.d[i].f;
+            merge_func_f[i].n3 = _in2_arb_X[i+N];
+            merge_func_f[i].n4 = in2.d.d[i].f;
+            merge_func_f[i].y = out.d.d[i].f;
+            merge_func_f[i].vdd=supply.vdd;
+            merge_func_f[i].vss=supply.vss;
+            merge_func_f[i].pr_B = _reset_BXX[i+N];
+            merge_func_f[i].sr_B = _reset_BXX[i+N];
+            )
+        }
+ 
+        export 
+        defproc buffer_t(a1of1 in; a1of1 out; bool? reset_B; power supply)
+        {
+            //control
+            bool _en, _reset_BX;
+            A_2C1N_RB_X4 inack_ctl(.c1=_en,.c2=in.r,.n1=out.r,.y=in.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+            A_1C1P_X1 en_ctl(.c1=in.a,.p1=out.r,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
+            
+            //function
+            bool _out_a_B;
+            INV_X1 inv_outa(.a = out.a,.y=_out_a_B,.vdd = supply.vdd,.vss=supply.vss);
+            A_2C1N_RB_X4 buf_func(.c1 = _en,.c2 = _out_a_B, .n1 = in.r,.y = out.r, .pr_B = _reset_BX, .sr_B = _reset_BX,.vdd = supply.vdd,.vss=supply.vss);
+
+            
+            //reset buffers
+            BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+        }
+        // A template creating a FIFO of N buffers tokens
+        export template<pint N>
+        defproc fifo_t(a1of1 in; a1of1 out; bool? reset_B; power supply)
+        {
+          buffer_t fifo_element[N];
+          bool _reset_BXX[N];
+          fifo_element[0].in.r = in.r;
+          fifo_element[0].in.a = in.a;
+          fifo_element[0].supply = supply;
+          fifo_element[0].reset_B = _reset_BXX[0];
+          (i:1..N-1:
+            fifo_element[i].in.r = fifo_element[i-1].out.r;
+            fifo_element[i].in.a = fifo_element[i-1].out.a;
+            fifo_element[i].supply = supply;
+            fifo_element[i].reset_B = _reset_BXX[i];
+          )
+          fifo_element[N-1].out.r = out.r;
+          fifo_element[N-1].out.a = out.a;
+
+          // reset buffers
+          bool _reset_BX;
+          BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+          sigbuf<N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX, .supply = supply);
+        }
+
+        // Programmable delay line.
+        // N is the number of layers,
+        // the longest layer having 2**N DLY elements
+        export template<pint N>
+        defproc delayprog (bool! y; bool? a, s[N]; power supply)
+        {
+            
+            { N >= 0 : "What?" };
+            { N < 9 : "Delay prog size is given in 2**N. Given N is too big." };
+
+
+            AND2_X1 and2[N];
+            MUX2_X1 mu2[N];
+            DLY4_X1 dly[(1<<N) -1];
+
+            bool _a[N+1]; // Holds the input to each row
+         
+            _a[0] = a;
+
+            pint i_delay;
+            i_delay = 0; // Index of the last connected delay element
+
+            (i:0..N-1:
+                // For each row
+                and2[i].a = _a[i];
+                and2[i].b = s[i];
+
+                // Delays
+                dly[i_delay].a = and2[i].y;
+                i_delay = i_delay + 1;
+                (j:1..i-1:
+                    dly[i_delay].a = dly[i_delay-1].y;
+                    i_delay = i_delay +1;
+                )
+
+                // Mux
+                mu2[i].a = _a[i];
+                mu2[i].s = s[i];
+                dly[i_delay-1].y = mu2[i].b;
+                _a[i+1] = mu2[i].y;
+            )
+
+            y = mu2[N-1].y;
+
+
+            // Connect everything to vdd/gnd
+            (i:N:and2[i].vdd = supply.vdd;)
+            (i:N:mu2[i].vdd = supply.vdd;)
+            (i:((1<<N)-1):dly[i].vdd = supply.vdd;)
+
+            (i:N:and2[i].vss = supply.vss;)
+            (i:N:mu2[i].vss = supply.vss;)
+            (i:((1<<N)-1):dly[i].vss = supply.vss;)
+        }
+}}

dataflow_neuro/treegates.act

@@ -0,0 +1,420 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter 
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret 
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2021 Rajit Manohar 
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************/
+import "../../dataflow_neuro/cell_lib_async.act";
+import "../../dataflow_neuro/cell_lib_std.act";
+import std::channel;
+open std::channel;
+namespace tmpl {
+  namespace dataflow_neuro {
+
+/*
+ * Build an OR-gate tree (NOR/NAND/optional INV)
+ */
+
+
+                
+export deftype power (bool?! vdd, vss) { }
+
+
+export template<pint N>
+defproc ortree (bool? in[N]; bool! out; power supply)
+{
+  bool tout;
+
+  { N > 0 : "What?" };
+
+  pint i, end, j;
+  i = 0;
+  end = N-1;
+
+  pint lenTree2Count, lenTree3Count;
+  lenTree2Count = 0;
+  lenTree3Count = 0;
+    /* Pre"calculate" the number of C cells required, look below if confused */
+  *[ i != end ->
+     j = 0;
+     *[ i < end ->
+        j = j + 1;
+        [ i+1 >= end ->
+          i = end;
+          lenTree2Count = lenTree2Count +1;
+        [] i+2 >= end ->
+          i = end;
+          lenTree3Count = lenTree3Count +1;
+        [] else ->
+          i = i + 2;
+          lenTree2Count = lenTree2Count +1;
+        ]
+      ]
+      /*-- update range that has to be combined --*/
+      i = end+1;
+      end = end+j;
+      j = 0;
+  ]
+
+  /* array that holds ALL the nodes in the completion tree */
+  bool tmp[end+1];
+  (k:N:tmp[k] = in[k];)
+
+  /* array to hold the actual C-elments, either A2C or A3C */
+  
+  [lenTree2Count > 0 ->
+    OR2_X1 C2Els[lenTree2Count];
+  ]
+  
+  [lenTree3Count > 0 ->
+    OR3_X1 C3Els[lenTree3Count];
+  ]
+  
+  (h:lenTree2Count:C2Els[h].vdd = supply.vdd;)
+  (h:lenTree3Count:C3Els[h].vdd = supply.vdd;)
+
+  (h:lenTree2Count:C2Els[h].vss = supply.vss;)
+  (h:lenTree3Count:C3Els[h].vss = supply.vss;)
+
+  /* Reset the variables we just stole lol */
+  i = 0;
+  end = N-1;
+  j = 0;
+  pint tree2Index = 0;
+  pint tree3Index = 0;
+
+  /* Invariant: i <= end */
+    
+  *[ i != end ->
+     /* 
+      * Invariant: tmp[i..end] has the current signals that need to be
+      * combined together, and "isinv" specifies if they are the inverted
+      * sense or not
+      */
+     j = 0;
+     *[ i < end ->
+        /*-- there are still signals that need to be combined --*/
+        j = j + 1;
+        [ i+1 >= end ->
+          /*-- last piece: use either a 2 input C-element --*/
+          C2Els[tree2Index].a = tmp[i];
+          C2Els[tree2Index].b = tmp[i+1];
+          C2Els[tree2Index].y = tmp[end+j];
+          tree2Index = tree2Index +1;
+          i = end;
+        [] i+2 >= end ->
+          /*-- last piece: use either a 3 input C-element --*/
+          C3Els[tree3Index].a = tmp[i];
+          C3Els[tree3Index].b = tmp[i+1];
+          C3Els[tree3Index].c = tmp[i+2];
+          C3Els[tree3Index].y = tmp[end+j];
+
+          tree3Index = tree3Index +1;
+          i = end;
+        [] else ->
+          /*-- more to come; so use a two input C-element --*/
+          C2Els[tree2Index].a = tmp[i];
+          C2Els[tree2Index].b = tmp[i+1];
+          C2Els[tree2Index].y = tmp[end+j];
+          tree2Index = tree2Index +1;
+          i = i + 2;
+        ]
+      ]
+      /*-- update range that has to be combined --*/
+      i = end+1;
+      end = end+j;
+      j = 0;
+  ]
+  
+    out = tmp[end];
+}
+
+export template<pint N>
+defproc andtree (bool? in[N]; bool! out; power supply)
+{
+  bool tout;
+
+  { N > 0 : "What?" };
+
+  pint i, end, j;
+  i = 0;
+  end = N-1;
+
+  pint lenTree2Count, lenTree3Count;
+  lenTree2Count = 0;
+  lenTree3Count = 0;
+    /* Pre"calculate" the number of C cells required, look below if confused */
+  *[ i != end ->
+     j = 0;
+     *[ i < end ->
+        j = j + 1;
+        [ i+1 >= end ->
+          i = end;
+          lenTree2Count = lenTree2Count +1;
+        [] i+2 >= end ->
+          i = end;
+          lenTree3Count = lenTree3Count +1;
+        [] else ->
+          i = i + 2;
+          lenTree2Count = lenTree2Count +1;
+        ]
+      ]
+      /*-- update range that has to be combined --*/
+      i = end+1;
+      end = end+j;
+      j = 0;
+  ]
+
+  /* array that holds ALL the nodes in the completion tree */
+  bool tmp[end+1];
+  (k:N:tmp[k] = in[k];)
+
+  /* array to hold the actual C-elments, either A2C or A3C */
+  
+    [lenTree2Count > 0 ->
+    AND2_X1 C2Els[lenTree2Count];
+  ]
+  
+  [lenTree3Count > 0 ->
+     AND3_X1 C3Els[lenTree3Count];
+  ]
+  
+  (h:lenTree2Count:C2Els[h].vdd = supply.vdd;)
+  (h:lenTree3Count:C3Els[h].vdd = supply.vdd;)
+
+  (h:lenTree2Count:C2Els[h].vss = supply.vss;)
+  (h:lenTree3Count:C3Els[h].vss = supply.vss;)
+
+  /* Reset the variables we just stole lol */
+  i = 0;
+  end = N-1;
+  j = 0;
+  pint tree2Index = 0;
+  pint tree3Index = 0;
+
+  /* Invariant: i <= end */
+    
+  *[ i != end ->
+     /* 
+      * Invariant: tmp[i..end] has the current signals that need to be
+      * combined together, and "isinv" specifies if they are the inverted
+      * sense or not
+      */
+     j = 0;
+     *[ i < end ->
+        /*-- there are still signals that need to be combined --*/
+        j = j + 1;
+        [ i+1 >= end ->
+          /*-- last piece: use either a 2 input C-element --*/
+          C2Els[tree2Index].a = tmp[i];
+          C2Els[tree2Index].b = tmp[i+1];
+          C2Els[tree2Index].y = tmp[end+j];
+          tree2Index = tree2Index +1;
+          i = end;
+        [] i+2 >= end ->
+          /*-- last piece: use either a 3 input C-element --*/
+          C3Els[tree3Index].a = tmp[i];
+          C3Els[tree3Index].b = tmp[i+1];
+          C3Els[tree3Index].c = tmp[i+2];
+          C3Els[tree3Index].y = tmp[end+j];
+
+          tree3Index = tree3Index +1;
+          i = end;
+        [] else ->
+          /*-- more to come; so use a two input C-element --*/
+          C2Els[tree2Index].a = tmp[i];
+          C2Els[tree2Index].b = tmp[i+1];
+          C2Els[tree2Index].y = tmp[end+j];
+          tree2Index = tree2Index +1;
+          i = i + 2;
+        ]
+      ]
+      /*-- update range that has to be combined --*/
+      i = end+1;
+      end = end+j;
+      j = 0;
+  ]
+  
+    out = tmp[end];
+}
+  
+/*
+ * Build a completion tree using a combination of 2-input and 3-input
+ * C-elements 
+ */
+export template<pint N>
+defproc ctree (bool? in[N]; bool! out; power supply)
+{
+  bool tout;
+
+  { N > 0 : "What?" };
+
+  pint i, end, j;
+  i = 0;
+  end = N-1;
+
+  pint lenTree2Count, lenTree3Count;
+  lenTree2Count = 0;
+  lenTree3Count = 0;
+  /* Pre"calculate" the number of C cells required, look below if confused */
+  *[ i != end ->
+     j = 0;
+     *[ i < end ->
+        j = j + 1;
+        [ i+1 >= end ->
+          i = end;
+          lenTree2Count = lenTree2Count +1;
+        [] i+2 >= end ->
+          i = end;
+          lenTree3Count = lenTree3Count +1;
+        [] else ->
+          i = i + 2;
+          lenTree2Count = lenTree2Count +1;
+        ]
+      ]
+      /*-- update range that has to be combined --*/
+      i = end+1;
+      end = end+j;
+  ]
+
+  /* array that holds ALL the nodes in the completion tree */
+  bool tmp[end+1];
+  
+  // Connecting the first nodes to the input
+  (l:N:
+    tmp[l] = in[l];
+    )
+
+  /* array to hold the actual C-elments, either A2C or A3C */
+  [lenTree2Count > 0 ->
+    A_2C_B_X1 C2Els[lenTree2Count];
+  ]
+  
+  [lenTree3Count > 0 ->
+     A_3C_B_X1 C3Els[lenTree3Count];
+  ]
+  
+
+  (h:lenTree2Count:C2Els[h].vdd = supply.vdd;)
+  (h:lenTree3Count:C3Els[h].vdd = supply.vdd;)
+
+  (h:lenTree2Count:C2Els[h].vss = supply.vss;)
+  (h:lenTree3Count:C3Els[h].vss = supply.vss;)
+
+  /* Reset the variables we just stole lol */
+  i = 0;
+  end = N-1;
+  j = 0;
+  pint tree2Index = 0;
+  pint tree3Index = 0;
+
+  /* Invariant: i <= end */
+    
+  *[ i != end ->
+     /* 
+      * Invariant: tmp[i..end] has the current signals that need to be
+      * combined together, and "isinv" specifies if they are the inverted
+      * sense or not
+      */
+     j = 0;
+     *[ i < end ->
+        /*-- there are still signals that need to be combined --*/
+        j = j + 1;
+        [ i+1 >= end ->
+          /*-- last piece: use either a 2 input C-element --*/
+          C2Els[tree2Index].c1 = tmp[i];
+          C2Els[tree2Index].c2 = tmp[i+1];
+          C2Els[tree2Index].y = tmp[end+j];
+          tree2Index = tree2Index +1;
+          i = end;
+        [] i+2 >= end ->
+          /*-- last piece: use either a 3 input C-element --*/
+          C3Els[tree3Index].c1 = tmp[i];
+          C3Els[tree3Index].c2 = tmp[i+1];
+          C3Els[tree3Index].c3 = tmp[i+2];
+          C3Els[tree3Index].y = tmp[end+j];
+
+          tree3Index = tree3Index +1;
+          i = end;
+        [] else ->
+          /*-- more to come; so use a two input C-element --*/
+          C2Els[tree2Index].c1 = tmp[i];
+          C2Els[tree2Index].c2 = tmp[i+1];
+          C2Els[tree2Index].y = tmp[end+j];
+          tree2Index = tree2Index +1;
+          i = i + 2;
+        ]
+      ]
+      /*-- update range that has to be combined --*/
+      i = end+1;
+      end = end+j;
+      j = 0;
+  ]
+  
+  out = tmp[end];
+  
+}
+
+export template<pint N>
+defproc vtree (std::data::Mx1of2?<N> in; bool! out; power supply)
+{
+    // OR layer for making OR between true and false of in (they are then sent to Ctree)
+    OR2_X1 OR2_tf[N];
+    ctree<N> myctree;
+  (l:N:
+      OR2_tf[l].a = in.d[l].t;
+      OR2_tf[l].b = in.d[l].f;
+      OR2_tf[l].y = myctree.in[l];
+      OR2_tf[l].vdd = supply.vdd;
+      OR2_tf[l].vss = supply.vss;
+  )
+  myctree.supply = supply;
+  out = myctree.out;
+}
+export template<pint N>
+defproc sigbuf (bool? in; bool! out[N]; power supply)
+{
+
+  { N >= 0 : "sigbuf: parameter error" };
+  { N <= 43 : "sigbuf: parameter error, N too big" };
+
+	  /* -- just use in sized driver here -- */
+    [ N <= 4 ->
+    BUF_X1 buf1 (.a = in, .y = out[0], .vdd = supply.vdd, .vss = supply.vss);
+    [] N >= 5 & N <= 7 -> 
+    BUF_X2 buf2 (.a = in, .y = out[0], .vdd = supply.vdd, .vss = supply.vss);
+    [] N >= 8 & N <= 10 -> 
+    BUF_X3 buf3 (.a = in, .y = out[0], .vdd = supply.vdd, .vss = supply.vss);
+   [] N >= 11 & N <= 14 -> 
+    BUF_X4 buf4 (.a = in, .y = out[0], .vdd = supply.vdd, .vss = supply.vss);
+   [] N >= 15 & N <= 18 -> 
+    BUF_X6 buf6 (.a = in, .y = out[0], .vdd = supply.vdd, .vss = supply.vss);
+   [] N >= 19 & N <= 29 -> 
+    BUF_X8 buf8 (.a = in, .y = out[0], .vdd = supply.vdd, .vss = supply.vss);
+   [] N >= 30 & N <= 42 -> 
+    BUF_X12 buf12 (.a = in, .y = out[0], .vdd = supply.vdd, .vss = supply.vss);
+   ]
+   (i:1..N-1:out[i]=out[0];)
+}
+}}
+

test/prsim_plot.py

@@ -0,0 +1,262 @@
+#!/usr/bin/python3
+
+import sys
+import glob
+import re
+import matplotlib.pyplot as plt
+import numpy as np
+
+def main(argv):
+
+	# Load file
+	assert len(argv) >= 2, "No arguments given. -h for help"
+
+	if argv[1] == "-h":
+		print("""Specify the path to prsim.out either by giving the full path,
+or the folder name like 'buf_15'.
+Use -include='regex' to specify signals to include (or -in).
+Use -exclude='regex' to specify signals to exclude (or -ex).""")
+		return
+
+
+	file_path = argv[1]
+	if not ".out" in file_path:
+		file_path = f"./unit_tests/{file_path}/run/prsim.out"
+	assert len(glob.glob(file_path)) >= 1, "prsim.out file not found!"
+	print(f"Loading {file_path}")
+	f = open(file_path,'r').read()
+
+	# Start regexxing
+	entries = re.findall(r"\t *(\d+) ([^:]+) : (\d)(  \[by.+\])?[\n\r]", f)
+	assert len(entries) >= 1, "Could not find signal info in prsim.out!"
+
+	# Check if user gave a colour specification
+	# default is Michele's atm
+	colour_undefined = (100,100,100)
+	colour_high = (98, 187, 93)
+	colour_low = (233, 115, 115)
+	for arg in argv:
+		r = re.findall(r'-c=[\"\']?(.+)[\"\']?', arg)
+		if len(r) >= 1:
+			if r[0] == "ole":
+				colour_undefined = (233, 115, 115)
+				colour_high = (98, 187, 93)
+				colour_low = (90, 111, 199)
+			elif r[0] == "og":
+				colour_undefined = (255,0,0)
+				colour_high = (252, 186, 3)
+				colour_low = (20, 184, 186)
+			elif r[0] == "michele":
+				colour_undefined = (100,100,100)
+				colour_high = (98, 187, 93)
+				colour_low = (233, 115, 115)
+			else:
+				raise Exception("Unknown colour given. I cba to code up general colours atm.")
+
+	# Check if start time given
+	for arg in argv:
+		r = re.findall(r'-t0=(\d+)', arg)
+		if len(r) >= 1:
+			print(f"Filtering by start time t0 = {r[0]}")
+			entries = [e for e in entries if int(e[0]) >= int(r[0])]
+
+	# Check if end time given
+	for arg in argv:
+		r = re.findall(r'-t1=(\d+)', arg)
+		if len(r) >= 1:
+			print(f"Filtering by end time t1 = {r[0]}")
+			entries = [e for e in entries if int(e[0]) <= int(r[0])]
+
+
+	# Check if user gave an include filter
+	include_given = False
+	include_re = None
+	for arg in argv:
+		r = re.findall(r'(-include|-in)=(.+)', arg)
+		if len(r) >= 1:
+			include_given = True
+			include_re = r[0][1]
+
+	# Check if user gave an exclude filter
+	exclude_given = False
+	exclude_re = None
+	for arg in argv:
+		r = re.findall(r'(-exclude|-ex)=(.+)', arg)
+		if len(r) >= 1:
+			exclude_given = True
+			exclude_re = r[0][1]
+
+	# Check if user gave "keep all times" flag
+	# This is so you can look at certain signals only
+	# without them all bunching up.
+	include_all_times = False
+	for arg in argv:
+		r = re.findall(r'(-alltimes?)', arg)
+		if len(r) >= 1:
+			include_all_times = True
+
+	# Get list of all times (before filtering)
+	unique_times = np.unique([int(e[0]) for e in entries])
+
+	assert not (exclude_given and include_given), "Can't give include and exclude re simultaneously."
+	if include_given: print(f"Including signals that match regex {include_re}")
+	if exclude_given: print(f"Excluding signals that match regex {exclude_re}")
+
+	if include_given:
+		entries = [e for e in entries if not re.search(include_re, e[1]) == None]
+
+	if exclude_given:
+		entries = [e for e in entries if re.search(exclude_re, e[1]) == None]
+
+	assert len(entries) >= 1, "No valid entries in prsim.out!"
+
+	num_times = unique_times.shape[0]
+
+	# Get list of all times (after filtering)
+	times = np.array([int(e[0]) for e in entries])
+	if not include_all_times: unique_times = np.unique(times)
+
+	# Get list of all sigs
+	sigs = np.array([e[1] for e in entries])
+	unique_sigs = np.unique(sigs)
+	num_sigs = unique_sigs.shape[0]
+
+	print(f"Plotting signals:")
+	print(unique_sigs)
+
+
+	# Some functions to order everything nicely
+	# Should probably put these outside but whatever.
+	def time_to_index(time):
+		'''
+		Since times are random, need to convert them to an index.
+		'''
+		if not (int(time) in unique_times): return None
+		out = np.argwhere(unique_times == int(time))
+		return out[0][0]
+
+	def sig_to_index(sig):
+		'''
+		Handles signal name ordering.
+		Assume ordered like unique_sigs for now
+		'''
+		if not (sig in unique_sigs): return None
+		out = np.argwhere(unique_sigs == sig)
+		return out[0][0]
+	
+	# Create matrix of signals over time and populate	
+	signals_matrix = np.zeros((num_sigs, num_times), dtype = int)
+
+	for sig in unique_sigs:
+		entries_filtered = [e for e in entries if e[1] == sig]
+		# make sure sorted
+		entries_filtered = sorted(entries_filtered, key = lambda e: int(e[0]))
+		for e in entries_filtered:
+			val = int(e[2])
+			val = 2*val -1
+			signals_matrix[sig_to_index(sig),time_to_index(e[0]):] = val
+
+	# Plot
+
+	# Generate figure
+	# weird sizing is to try to keep "pixel" sizes approx const
+	fig = plt.figure(figsize = (num_times/3+0.2,num_sigs/3+0.2), dpi = 100)
+
+	image = np.zeros((num_sigs, num_times, 3), dtype = int)
+	image[signals_matrix == 0] = colour_undefined
+	image[signals_matrix == 1] = colour_high
+	image[signals_matrix == -1] = colour_low
+
+	plt.imshow(image)
+	ax = fig.gca()
+	ax.set_xlabel("Time")
+	# ax.set_ylabel("Signal")
+	ax.set_yticks([])
+
+	for sig in unique_sigs:
+		ax.text(-1, sig_to_index(sig), sig, ha = "right", va = "center", size = 10)
+
+	for i in range(num_sigs-1):
+		ax.axhline(i+0.5, c = "white", lw = 2)
+
+	for i in range(num_times-1):
+		ax.axvline(i+0.5, c = "white", lw = 2)
+		
+	ax.axis("off")
+
+	# Draw arrows
+	for e in entries:
+		# check if has a causal signal
+		by = re.findall(r"\[by (.+):=(\d)",e[3])
+		if len(by) == 0: continue
+		sig = e[1]
+		time = e[0]
+		t_index = time_to_index(time)
+		by_sig = by[0][0]
+		by_val = int(by[0][1])
+		t0,t1 = (t_index, t_index)
+
+		# The sig that caused the change might have been excluded from plotting
+		s0 = sig_to_index(sig)
+		if by_sig in unique_sigs:
+			s1 = sig_to_index(by_sig)
+		else:
+			s1 = s0
+
+		if by_val == 1:
+			plt.arrow(t0, s1, 0, s0-s1 + 0.2*np.sign(s0-s1), head_width = 0.5, width = 0.2, 
+				ec = "none", lw = 0, fc = "black", length_includes_head = True)
+		else:
+			plt.arrow(t0, s1, 0, s0-s1 + 0.2*np.sign(s0-s1), head_width = 0, width = 0.2, 
+				ec = "none", lw = 0, fc = "black", length_includes_head = True)
+			plt.scatter((t0),(s0), c = "black", s = 40)
+	
+	# Write times on x axis
+	for time in unique_times:
+		ax.text(time_to_index(time), num_sigs, time, ha = "center", va = "top", size = 10, rotation = 90)
+
+	# Find and plot wrong Assert statements
+	asserts = re.findall(r"\t *(\d+) .*\nWRONG ASSERT:\t(.+)", f)
+	if len(asserts): print("Failed asserts found!")
+	for a in asserts:
+		print(a)
+		time = int(a[0])
+		if not time in unique_times:
+			try:
+				time = unique_times[np.argwhere((unique_times-time) < 0)[-1]]
+			except:
+				print(f"Couldn't find an appropriate time for assert {a}")
+				continue
+		index = time_to_index(time)
+		ax.axvline(index+0.5, c = "red", lw = 2)
+		ax.text(index+0.5, -1, a[1], rotation = 90, ha = "center", va = "bottom", c = "red")
+
+	# Find echoed statements of the form "[digits] text"
+	echoes = re.findall(r"\t *(\d+) [^\t]*\n(\[\d*\].+)", f)
+	for a in echoes:
+		time = int(a[0])
+		if not time in unique_times:
+			try:
+				time = unique_times[np.argwhere((unique_times-time) < 0)[-1]]
+			except:
+				print(f"Couldn't find an appropriate time for echo {a}")
+				continue
+		index = time_to_index(time)
+		c = "xkcd:bright purple"
+		ax.axvline(index+0.5, c = c, lw = 2)
+		ax.text(index+0.5, -1, a[1], rotation = 90, ha = "center", va = "bottom", c = c)
+
+	output_type =  ".pdf"
+	for arg in argv:
+		if arg == "-png": output_type = ".png"
+
+	file_out_path = file_path.replace(".out",output_type)
+
+
+	plt.savefig(file_out_path, bbox_inches = "tight")
+
+
+if __name__ == "__main__":
+	# print(sys.argv[0:])
+	main(sys.argv)
+   # main(sys.argv[1:])

test/repeat_unit.sh

@@ -0,0 +1,85 @@
+# repeatedly run prsim on one unit_test's PRs
+
+bold=$(tput bold)
+normal=$(tput sgr0)
+und=$(tput smul)
+i=${unit}
+proc="$i<>"
+
+echo ""
+echo "${bold}******************************************"
+echo "* ${i} repetitions , show warnings=${warning}*"
+echo "******************************************${normal}"
+
+cd "unit_tests"
+echo "${bold}... checking aflat${normal}"
+
+# check aflat
+if ($ACT_HOME/bin/aflat "$i/test_final.act" > "$i/test.prs");
+then
+    echo "${bold}... aflat complete, checking in prsim${normal}"
+    
+  # run prsim on prs
+    (($ACT_HOME/bin/prsim "$i/test.prs" < "$i/test.prsim") > "$i/prsim.out");
+    if (cat "$i/prsim.out" | grep -e "WRONG ASSERT" -e "FATAL" -e "not found")
+    then
+        echo "FAILED in first prsim"
+    else
+        
+        # show warnings setting
+        if [ "${warning}" = "1" ];
+        then
+          echo "${bold}Exit on prsim warnings turned ON${normal}"
+        else
+          echo "${bold}Exit on prsim warnings turned OFF${normal}"
+        fi
+        echo ""
+        
+        # begin prsim test loop
+        has_failed=0
+        iter=0
+        echo "${bold}using random_seed${normal}"
+        echo "\nusing random_seed" >> "$i/prsim.out"
+        while [ has_failed=0 ]
+        do
+            # write prsim test file with random seed appended to top of file
+            (echo "random_seed $iter \nrandom" > "$i/test_rand.prsim");
+            (cat "$i/test.prsim" >> "$i/test_rand.prsim");
+            (echo "\nTEST $iter\n" >> "$i/prsim.out");
+            
+            # validate prsim output
+            if (($ACT_HOME/bin/prsim "$i/test.prs" < "$i/test_rand.prsim") >> "$i/prsim.out");
+            then
+                if [ "${warning}" = "1" ];
+                then
+                  if (cat "$i/prsim.out" | grep -e "WRONG ASSERT" -e "FATAL" -e "not found" -e "WARNING:");
+                  then
+                      echo "${bold}==> test #${iter} ${und}FAILED in prsim${normal}"
+                      has_failed=1
+                      exit 0
+                  else
+                      echo "==> passed test #${iter}"
+                      iter=$(($iter + 1))
+                  fi
+                else
+                  if (cat "$i/prsim.out" | grep -e "WRONG ASSERT" -e "FATAL" -e "not found");
+                  then
+                      echo "${bold}==> test #${iter} ${und}FAILED in prsim${normal}"
+                      has_failed=1
+                      exit 0
+                  else
+                      echo "==> passed test #${iter}"
+                      iter=$(($iter + 1))
+                  fi
+                fi
+            else
+                has_failed=1
+                exit 0
+            fi
+        done
+        (cd ".."; pwd);
+        exit 1
+    fi
+else
+    echo "FAILED in aflat conversion"
+fi

test/run.sh

@@ -0,0 +1,72 @@
+#!/bin/sh
+
+fail=0
+faildirs=""
+proc=""
+bold=$(tput bold)
+normal=$(tput sgr0)
+und=$(tput smul)
+
+faildirs=""
+failed=0
+
+#
+#  run_test name [option]
+#
+run_test () {
+    echo "Testing ${bold}$1 ${normal}"
+    # clear run directory
+    if [ -d $1/run ]; then
+	    rm -rf $1/run
+    fi
+    mkdir $1/run
+    cp init.prs $1/run/test.prs
+    if aflat -ref=1 $1/test.act >> $1/run/test.prs; then
+	    cat init_qdi.prsim $1/test.prsim | prsim -r $1/run/test.prs > $1/run/prsim.out
+	    if egrep '(WRONG|WARNING|Node)' $1/run/prsim.out >/dev/null; then
+	        echo "${bold}*** simulation failed ***${normal}"
+	        faildirs="${faildirs} ${1}-sim"
+	        failed=1
+	        echo	
+	    fi
+    else
+	    echo "${bold}*** circuit construction failed ***${normal}"
+	    faildirs="${faildirs} ${1}-ckt"
+	    failed=1
+        echo
+    fi
+}
+
+if [ ! $(command -v aflat) ]; then #&& ! command -v prsim ]; then
+    echo "${bold}Error:${bold} aflat & prsim necessary for tests."
+    exit 1
+fi
+
+if [ ! -d "unit_tests" ];
+then
+    echo "${bold}Error:${bold} no unit_tests directory."
+    exit 1
+fi    
+
+cd "unit_tests"
+
+# run all test except single one is specified
+if [ -z $1 ]; then
+    for i in *
+    do
+        if [ -d $i -a -f $i/test.act ]; then
+	        run_test $i
+        fi
+    done
+else
+    run_test $1
+fi
+
+if [ $failed -eq 1 ]; then
+    echo ""
+    echo "${bold}*********************************"
+    echo "* FAILED DIRECTORIES:${normal}$faildirs ${bold}*"
+    echo "*********************************${normal}"
+fi
+
+exit $failed

test/unit_tests/andtree_15/run/prsim.out

@@ -0,0 +1,118 @@
+t.in[0] t.at.tmp[22] t.in[5] t.in[2] t.at.tmp[15] t.in[3] t.at.tmp[23] t.at.C2Els[0]._y t.in[7] t.in[6] t.at.C2Els[3]._y t.in[4] t.at.C3Els[0]._y t.in[12] t.out t.at.tmp[21] t.at.C2Els[6]._y t.in[11] t.at.tmp[17] t.in[14] t.in[1] t.in[10] t.in[9] t.at.C2Els[5]._y t.at.tmp[19] t.at.tmp[20] t.at.tmp[24] t.in[13] t.at.tmp[16] t.at.C2Els[4]._y t.in[8] t.at.tmp[18] t.at.C2Els[2]._y t.at.C3Els[2]._y t.at.C2Els[1]._y t.at.C2Els[7]._y t.at.C3Els[1]._y 
+0
+1
+	         0 t.in[0] : 0
+	         0 t.in[14] : 0
+	         0 t.in[2] : 0
+	         0 t.in[6] : 0
+	         0 t.in[13] : 0
+	         0 t.in[5] : 0
+	         0 t.in[12] : 0
+	         0 t.in[11] : 0
+	         0 t.in[1] : 0
+	         0 t.in[4] : 0
+	         0 t.in[10] : 0
+	         0 t.in[9] : 0
+	         0 t.in[3] : 0
+	         0 t.in[8] : 0
+	         0 t.in[7] : 0
+	         1 t.at.C2Els[0]._y : 1  [by t.in[0]:=0]
+	         2 t.at.C2Els[3]._y : 1  [by t.in[6]:=0]
+	       114 t.at.C2Els[4]._y : 1  [by t.in[9]:=0]
+	       153 t.at.tmp[19] : 0  [by t.at.C2Els[4]._y:=1]
+	       168 t.at.C3Els[1]._y : 1  [by t.at.tmp[19]:=0]
+	       659 t.at.tmp[24] : 0  [by t.at.C3Els[1]._y:=1]
+	       672 t.at.C3Els[2]._y : 1  [by t.at.tmp[24]:=0]
+	       712 t.out : 0  [by t.at.C3Els[2]._y:=1]
+	      1137 t.at.C2Els[5]._y : 1  [by t.in[11]:=0]
+	      1552 t.at.tmp[20] : 0  [by t.at.C2Els[5]._y:=1]
+	      1728 t.at.tmp[18] : 0  [by t.at.C2Els[3]._y:=1]
+	      1748 t.at.C2Els[7]._y : 1  [by t.at.tmp[18]:=0]
+	      4753 t.at.C2Els[2]._y : 1  [by t.in[5]:=0]
+	      4800 t.at.tmp[17] : 0  [by t.at.C2Els[2]._y:=1]
+	      7092 t.at.C3Els[0]._y : 1  [by t.in[14]:=0]
+	      7108 t.at.tmp[21] : 0  [by t.at.C3Els[0]._y:=1]
+	      7809 t.at.tmp[23] : 0  [by t.at.C2Els[7]._y:=1]
+	     10467 t.at.C2Els[1]._y : 1  [by t.in[2]:=0]
+	     54565 t.at.tmp[16] : 0  [by t.at.C2Els[1]._y:=1]
+	     65367 t.at.tmp[15] : 0  [by t.at.C2Els[0]._y:=1]
+	     68289 t.at.C2Els[6]._y : 1  [by t.at.tmp[16]:=0]
+	     68293 t.at.tmp[22] : 0  [by t.at.C2Els[6]._y:=1]
+[] setting some bits high
+	     68293 t.in[0] : 1
+	     68293 t.in[11] : 1
+	     68293 t.in[10] : 1
+	     68293 t.in[9] : 1
+	     68293 t.in[2] : 1
+	     68293 t.in[8] : 1
+	     68293 t.in[7] : 1
+	     68293 t.in[6] : 1
+	     68293 t.in[5] : 1
+	     68293 t.in[1] : 1
+	     68293 t.in[4] : 1
+	     68293 t.in[3] : 1
+	     68308 t.at.C2Els[4]._y : 0  [by t.in[8]:=1]
+	     68348 t.at.C2Els[2]._y : 0  [by t.in[4]:=1]
+	     77422 t.at.C2Els[5]._y : 0  [by t.in[10]:=1]
+	     82197 t.at.tmp[17] : 1  [by t.at.C2Els[2]._y:=0]
+	     98088 t.at.tmp[19] : 1  [by t.at.C2Els[4]._y:=0]
+	    102234 t.at.tmp[20] : 1  [by t.at.C2Els[5]._y:=0]
+	    105224 t.at.C2Els[0]._y : 0  [by t.in[1]:=1]
+	    111541 t.at.C2Els[3]._y : 0  [by t.in[6]:=1]
+	    111963 t.at.tmp[18] : 1  [by t.at.C2Els[3]._y:=0]
+	    119567 t.at.tmp[15] : 1  [by t.at.C2Els[0]._y:=0]
+	    119946 t.at.C2Els[1]._y : 0  [by t.in[3]:=1]
+	    119947 t.at.tmp[16] : 1  [by t.at.C2Els[1]._y:=0]
+	    119948 t.at.C2Els[6]._y : 0  [by t.at.tmp[16]:=1]
+	    140153 t.at.tmp[22] : 1  [by t.at.C2Els[6]._y:=0]
+	    160677 t.at.C2Els[7]._y : 0  [by t.at.tmp[18]:=1]
+	    160959 t.at.tmp[23] : 1  [by t.at.C2Els[7]._y:=0]
+[] setting all bits high
+	    160959 t.in[12] : 1
+	    160959 t.in[14] : 1
+	    160959 t.in[13] : 1
+	    161727 t.at.C3Els[0]._y : 0  [by t.in[13]:=1]
+	    161730 t.at.tmp[21] : 1  [by t.at.C3Els[0]._y:=0]
+	    184171 t.at.C3Els[1]._y : 0  [by t.at.tmp[21]:=1]
+	    184722 t.at.tmp[24] : 1  [by t.at.C3Els[1]._y:=0]
+	    185793 t.at.C3Els[2]._y : 0  [by t.at.tmp[24]:=1]
+	    186747 t.out : 1  [by t.at.C3Els[2]._y:=0]
+[] setting some low
+	    186747 t.in[10] : 0
+	    187828 t.at.C2Els[5]._y : 1  [by t.in[10]:=0]
+	    242298 t.at.tmp[20] : 0  [by t.at.C2Els[5]._y:=1]
+	    243280 t.at.C3Els[1]._y : 1  [by t.at.tmp[20]:=0]
+	    243298 t.at.tmp[24] : 0  [by t.at.C3Els[1]._y:=1]
+	    247311 t.at.C3Els[2]._y : 1  [by t.at.tmp[24]:=0]
+	    251314 t.out : 0  [by t.at.C3Els[2]._y:=1]
+[] setting all low
+	    251314 t.in[0] : 0
+	    251314 t.in[14] : 0
+	    251314 t.in[2] : 0
+	    251314 t.in[6] : 0
+	    251314 t.in[5] : 0
+	    251314 t.in[13] : 0
+	    251314 t.in[12] : 0
+	    251314 t.in[1] : 0
+	    251314 t.in[4] : 0
+	    251314 t.in[11] : 0
+	    251314 t.in[9] : 0
+	    251314 t.in[3] : 0
+	    251314 t.in[8] : 0
+	    251314 t.in[7] : 0
+	    251517 t.at.C2Els[2]._y : 1  [by t.in[5]:=0]
+	    251656 t.at.tmp[17] : 0  [by t.at.C2Els[2]._y:=1]
+	    251816 t.at.C2Els[3]._y : 1  [by t.in[6]:=0]
+	    251885 t.at.tmp[18] : 0  [by t.at.C2Els[3]._y:=1]
+	    253168 t.at.C2Els[4]._y : 1  [by t.in[9]:=0]
+	    253179 t.at.tmp[19] : 0  [by t.at.C2Els[4]._y:=1]
+	    256074 t.at.C2Els[1]._y : 1  [by t.in[2]:=0]
+	    272898 t.at.C3Els[0]._y : 1  [by t.in[14]:=0]
+	    273102 t.at.tmp[21] : 0  [by t.at.C3Els[0]._y:=1]
+	    288002 t.at.C2Els[7]._y : 1  [by t.at.tmp[17]:=0]
+	    288017 t.at.tmp[23] : 0  [by t.at.C2Els[7]._y:=1]
+	    296215 t.at.C2Els[0]._y : 1  [by t.in[0]:=0]
+	    296216 t.at.tmp[15] : 0  [by t.at.C2Els[0]._y:=1]
+	    296253 t.at.C2Els[6]._y : 1  [by t.at.tmp[15]:=0]
+	    296992 t.at.tmp[22] : 0  [by t.at.C2Els[6]._y:=1]
+	    307860 t.at.tmp[16] : 0  [by t.at.C2Els[1]._y:=1]

test/unit_tests/andtree_15/run/test.prs

@@ -0,0 +1,139 @@
+= "GND" "GND"
+= "Vdd" "Vdd"
+= "Reset" "Reset"
+"t.at.C2Els[0].a"&"t.at.C2Els[0].b"->"t.at.C2Els[0]._y"-
+~("t.at.C2Els[0].a"&"t.at.C2Els[0].b")->"t.at.C2Els[0]._y"+
+"t.at.C2Els[0]._y"->"t.at.C2Els[0].y"-
+~("t.at.C2Els[0]._y")->"t.at.C2Els[0].y"+
+"t.at.C2Els[1].a"&"t.at.C2Els[1].b"->"t.at.C2Els[1]._y"-
+~("t.at.C2Els[1].a"&"t.at.C2Els[1].b")->"t.at.C2Els[1]._y"+
+"t.at.C2Els[1]._y"->"t.at.C2Els[1].y"-
+~("t.at.C2Els[1]._y")->"t.at.C2Els[1].y"+
+"t.at.C2Els[2].a"&"t.at.C2Els[2].b"->"t.at.C2Els[2]._y"-
+~("t.at.C2Els[2].a"&"t.at.C2Els[2].b")->"t.at.C2Els[2]._y"+
+"t.at.C2Els[2]._y"->"t.at.C2Els[2].y"-
+~("t.at.C2Els[2]._y")->"t.at.C2Els[2].y"+
+"t.at.C2Els[3].a"&"t.at.C2Els[3].b"->"t.at.C2Els[3]._y"-
+~("t.at.C2Els[3].a"&"t.at.C2Els[3].b")->"t.at.C2Els[3]._y"+
+"t.at.C2Els[3]._y"->"t.at.C2Els[3].y"-
+~("t.at.C2Els[3]._y")->"t.at.C2Els[3].y"+
+"t.at.C2Els[4].a"&"t.at.C2Els[4].b"->"t.at.C2Els[4]._y"-
+~("t.at.C2Els[4].a"&"t.at.C2Els[4].b")->"t.at.C2Els[4]._y"+
+"t.at.C2Els[4]._y"->"t.at.C2Els[4].y"-
+~("t.at.C2Els[4]._y")->"t.at.C2Els[4].y"+
+"t.at.C2Els[5].a"&"t.at.C2Els[5].b"->"t.at.C2Els[5]._y"-
+~("t.at.C2Els[5].a"&"t.at.C2Els[5].b")->"t.at.C2Els[5]._y"+
+"t.at.C2Els[5]._y"->"t.at.C2Els[5].y"-
+~("t.at.C2Els[5]._y")->"t.at.C2Els[5].y"+
+"t.at.C2Els[6].a"&"t.at.C2Els[6].b"->"t.at.C2Els[6]._y"-
+~("t.at.C2Els[6].a"&"t.at.C2Els[6].b")->"t.at.C2Els[6]._y"+
+"t.at.C2Els[6]._y"->"t.at.C2Els[6].y"-
+~("t.at.C2Els[6]._y")->"t.at.C2Els[6].y"+
+"t.at.C2Els[7].a"&"t.at.C2Els[7].b"->"t.at.C2Els[7]._y"-
+~("t.at.C2Els[7].a"&"t.at.C2Els[7].b")->"t.at.C2Els[7]._y"+
+"t.at.C2Els[7]._y"->"t.at.C2Els[7].y"-
+~("t.at.C2Els[7]._y")->"t.at.C2Els[7].y"+
+"t.at.C3Els[0].a"&"t.at.C3Els[0].b"&"t.at.C3Els[0].c"->"t.at.C3Els[0]._y"-
+~("t.at.C3Els[0].a"&"t.at.C3Els[0].b"&"t.at.C3Els[0].c")->"t.at.C3Els[0]._y"+
+"t.at.C3Els[0]._y"->"t.at.C3Els[0].y"-
+~("t.at.C3Els[0]._y")->"t.at.C3Els[0].y"+
+"t.at.C3Els[1].a"&"t.at.C3Els[1].b"&"t.at.C3Els[1].c"->"t.at.C3Els[1]._y"-
+~("t.at.C3Els[1].a"&"t.at.C3Els[1].b"&"t.at.C3Els[1].c")->"t.at.C3Els[1]._y"+
+"t.at.C3Els[1]._y"->"t.at.C3Els[1].y"-
+~("t.at.C3Els[1]._y")->"t.at.C3Els[1].y"+
+"t.at.C3Els[2].a"&"t.at.C3Els[2].b"&"t.at.C3Els[2].c"->"t.at.C3Els[2]._y"-
+~("t.at.C3Els[2].a"&"t.at.C3Els[2].b"&"t.at.C3Els[2].c")->"t.at.C3Els[2]._y"+
+"t.at.C3Els[2]._y"->"t.at.C3Els[2].y"-
+~("t.at.C3Els[2]._y")->"t.at.C3Els[2].y"+
+= "t.at.tmp[15]" "t.at.C2Els[6].a"
+= "t.at.tmp[15]" "t.at.C2Els[0].y"
+= "t.at.tmp[16]" "t.at.C2Els[6].b"
+= "t.at.tmp[16]" "t.at.C2Els[1].y"
+= "t.at.tmp[17]" "t.at.C2Els[7].a"
+= "t.at.tmp[17]" "t.at.C2Els[2].y"
+= "t.at.tmp[18]" "t.at.C2Els[7].b"
+= "t.at.tmp[18]" "t.at.C2Els[3].y"
+= "t.at.tmp[19]" "t.at.C3Els[1].a"
+= "t.at.tmp[19]" "t.at.C2Els[4].y"
+= "t.at.tmp[20]" "t.at.C3Els[1].b"
+= "t.at.tmp[20]" "t.at.C2Els[5].y"
+= "t.at.tmp[21]" "t.at.C3Els[1].c"
+= "t.at.tmp[21]" "t.at.C3Els[0].y"
+= "t.at.tmp[22]" "t.at.C3Els[2].a"
+= "t.at.tmp[22]" "t.at.C2Els[6].y"
+= "t.at.tmp[23]" "t.at.C3Els[2].b"
+= "t.at.tmp[23]" "t.at.C2Els[7].y"
+= "t.at.tmp[24]" "t.at.C3Els[2].c"
+= "t.at.tmp[24]" "t.at.C3Els[1].y"
+= "t.at.supply.vdd" "t.at.C3Els[2].vdd"
+= "t.at.supply.vdd" "t.at.C3Els[1].vdd"
+= "t.at.supply.vdd" "t.at.C3Els[0].vdd"
+= "t.at.supply.vdd" "t.at.C2Els[7].vdd"
+= "t.at.supply.vdd" "t.at.C2Els[6].vdd"
+= "t.at.supply.vdd" "t.at.C2Els[5].vdd"
+= "t.at.supply.vdd" "t.at.C2Els[4].vdd"
+= "t.at.supply.vdd" "t.at.C2Els[3].vdd"
+= "t.at.supply.vdd" "t.at.C2Els[2].vdd"
+= "t.at.supply.vdd" "t.at.C2Els[1].vdd"
+= "t.at.supply.vdd" "t.at.C2Els[0].vdd"
+= "t.at.supply.vss" "t.at.C3Els[2].vss"
+= "t.at.supply.vss" "t.at.C3Els[1].vss"
+= "t.at.supply.vss" "t.at.C3Els[0].vss"
+= "t.at.supply.vss" "t.at.C2Els[7].vss"
+= "t.at.supply.vss" "t.at.C2Els[6].vss"
+= "t.at.supply.vss" "t.at.C2Els[5].vss"
+= "t.at.supply.vss" "t.at.C2Els[4].vss"
+= "t.at.supply.vss" "t.at.C2Els[3].vss"
+= "t.at.supply.vss" "t.at.C2Els[2].vss"
+= "t.at.supply.vss" "t.at.C2Els[1].vss"
+= "t.at.supply.vss" "t.at.C2Els[0].vss"
+= "t.at.in[0]" "t.at.C2Els[0].a"
+= "t.at.in[0]" "t.at.tmp[0]"
+= "t.at.in[1]" "t.at.C2Els[0].b"
+= "t.at.in[1]" "t.at.tmp[1]"
+= "t.at.in[2]" "t.at.C2Els[1].a"
+= "t.at.in[2]" "t.at.tmp[2]"
+= "t.at.in[3]" "t.at.C2Els[1].b"
+= "t.at.in[3]" "t.at.tmp[3]"
+= "t.at.in[4]" "t.at.C2Els[2].a"
+= "t.at.in[4]" "t.at.tmp[4]"
+= "t.at.in[5]" "t.at.C2Els[2].b"
+= "t.at.in[5]" "t.at.tmp[5]"
+= "t.at.in[6]" "t.at.C2Els[3].a"
+= "t.at.in[6]" "t.at.tmp[6]"
+= "t.at.in[7]" "t.at.C2Els[3].b"
+= "t.at.in[7]" "t.at.tmp[7]"
+= "t.at.in[8]" "t.at.C2Els[4].a"
+= "t.at.in[8]" "t.at.tmp[8]"
+= "t.at.in[9]" "t.at.C2Els[4].b"
+= "t.at.in[9]" "t.at.tmp[9]"
+= "t.at.in[10]" "t.at.C2Els[5].a"
+= "t.at.in[10]" "t.at.tmp[10]"
+= "t.at.in[11]" "t.at.C2Els[5].b"
+= "t.at.in[11]" "t.at.tmp[11]"
+= "t.at.in[12]" "t.at.C3Els[0].a"
+= "t.at.in[12]" "t.at.tmp[12]"
+= "t.at.in[13]" "t.at.C3Els[0].b"
+= "t.at.in[13]" "t.at.tmp[13]"
+= "t.at.in[14]" "t.at.C3Els[0].c"
+= "t.at.in[14]" "t.at.tmp[14]"
+= "t.at.out" "t.at.C3Els[2].y"
+= "t.at.out" "t.at.tmp[25]"
+= "Vdd" "t.at.supply.vdd"
+= "GND" "t.at.supply.vss"
+= "t.out" "t.at.out"
+= "t.in[0]" "t.at.in[0]"
+= "t.in[1]" "t.at.in[1]"
+= "t.in[2]" "t.at.in[2]"
+= "t.in[3]" "t.at.in[3]"
+= "t.in[4]" "t.at.in[4]"
+= "t.in[5]" "t.at.in[5]"
+= "t.in[6]" "t.at.in[6]"
+= "t.in[7]" "t.at.in[7]"
+= "t.in[8]" "t.at.in[8]"
+= "t.in[9]" "t.at.in[9]"
+= "t.in[10]" "t.at.in[10]"
+= "t.in[11]" "t.at.in[11]"
+= "t.in[12]" "t.at.in[12]"
+= "t.in[13]" "t.at.in[13]"
+= "t.in[14]" "t.at.in[14]"

test/unit_tests/andtree_15/test.act

@@ -0,0 +1,41 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/treegates.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+defproc andtree_15 (bool? in[15]; bool! out){
+    andtree<15> at(.in=in, .out=out);
+    at.supply.vss = GND;
+    at.supply.vdd = Vdd;
+
+}
+
+andtree_15 t;

test/unit_tests/andtree_15/test.prsim

@@ -0,0 +1,110 @@
+watchall
+
+system "echo '0'"
+
+set t.in[0] 0
+set t.in[1] 0
+set t.in[2] 0
+set t.in[3] 0
+set t.in[4] 0
+set t.in[5] 0
+set t.in[6] 0
+set t.in[7] 0
+set t.in[8] 0
+set t.in[9] 0
+set t.in[10] 0
+set t.in[11] 0
+set t.in[12] 0
+set t.in[13] 0
+set t.in[14] 0
+
+system "echo '1'"
+
+cycle
+mode run
+
+assert t.out 0
+
+system "echo '[] setting some bits high'"
+set t.in[0] 1
+set t.in[1] 1
+set t.in[2] 1
+set t.in[3] 1
+set t.in[4] 1
+set t.in[5] 1
+set t.in[6] 1
+set t.in[7] 1
+set t.in[8] 1
+set t.in[9] 1
+set t.in[10] 1
+set t.in[11] 1
+set t.in[12] 0
+set t.in[13] 0
+set t.in[14] 0
+
+cycle
+
+assert t.out 0
+
+system "echo '[] setting all bits high'"
+set t.in[0] 1
+set t.in[1] 1
+set t.in[2] 1
+set t.in[3] 1
+set t.in[4] 1
+set t.in[5] 1
+set t.in[6] 1
+set t.in[7] 1
+set t.in[8] 1
+set t.in[9] 1
+set t.in[10] 1
+set t.in[11] 1
+set t.in[12] 1
+set t.in[13] 1
+set t.in[14] 1
+
+cycle
+assert t.out 1
+
+
+system "echo '[] setting some low'"
+set t.in[0] 1
+set t.in[1] 1
+set t.in[2] 1
+set t.in[3] 1
+set t.in[4] 1
+set t.in[5] 1
+set t.in[6] 1
+set t.in[7] 1
+set t.in[8] 1
+set t.in[9] 1
+set t.in[10] 0
+set t.in[11] 1
+set t.in[12] 1
+set t.in[13] 1
+set t.in[14] 1
+
+cycle 
+assert t.out 0
+
+
+system "echo '[] setting all low'"
+set t.in[0] 0
+set t.in[1] 0
+set t.in[2] 0
+set t.in[3] 0
+set t.in[4] 0
+set t.in[5] 0
+set t.in[6] 0
+set t.in[7] 0
+set t.in[8] 0
+set t.in[9] 0
+set t.in[10] 0
+set t.in[11] 0
+set t.in[12] 0
+set t.in[13] 0
+set t.in[14] 0
+
+cycle 
+assert t.out 0
+

test/unit_tests/andtree_5/run/prsim.out

@@ -0,0 +1,40 @@
+t.in[0] t.in[2] t.at.tmp[5] t.in[3] t.at.C2Els[0]._y t.in[4] t.at.C3Els[0]._y t.at.tmp[6] t.in[1] t.out t.at.C2Els[1]._y 
+0
+1
+	         0 t.in[0] : 0
+	         0 t.in[4] : 0
+	         0 t.in[2] : 0
+	         0 t.in[1] : 0
+	         0 t.in[3] : 0
+	         1 t.at.C2Els[0]._y : 1  [by t.in[0]:=0]
+	      7092 t.at.C3Els[0]._y : 1  [by t.in[4]:=0]
+	      7094 t.at.tmp[6] : 0  [by t.at.C3Els[0]._y:=1]
+	     10468 t.at.tmp[5] : 0  [by t.at.C2Els[0]._y:=1]
+	     11847 t.at.C2Els[1]._y : 1  [by t.at.tmp[6]:=0]
+	     12984 t.out : 0  [by t.at.C2Els[1]._y:=1]
+[] setting some bits high
+	     12984 t.in[0] : 1
+	     12984 t.in[2] : 1
+	     12984 t.in[1] : 1
+	     13098 t.at.C2Els[0]._y : 0  [by t.in[1]:=1]
+	     78464 t.at.tmp[5] : 1  [by t.at.C2Els[0]._y:=0]
+[] setting all bits high
+	     78464 t.in[3] : 1
+	     78464 t.in[4] : 1
+	     80190 t.at.C3Els[0]._y : 0  [by t.in[4]:=1]
+	     80229 t.at.tmp[6] : 1  [by t.at.C3Els[0]._y:=0]
+	     80244 t.at.C2Els[1]._y : 0  [by t.at.tmp[6]:=1]
+	     80735 t.out : 1  [by t.at.C2Els[1]._y:=0]
+[] setting some low
+	     80735 t.in[0] : 0
+	     80735 t.in[1] : 0
+	     80748 t.at.C2Els[0]._y : 1  [by t.in[0]:=0]
+	     80788 t.at.tmp[5] : 0  [by t.at.C2Els[0]._y:=1]
+	     81203 t.at.C2Els[1]._y : 1  [by t.at.tmp[5]:=0]
+	     81223 t.out : 0  [by t.at.C2Els[1]._y:=1]
+[] setting all low
+	     81223 t.in[2] : 0
+	     81223 t.in[4] : 0
+	     81223 t.in[3] : 0
+	     87284 t.at.C3Els[0]._y : 1  [by t.in[2]:=0]
+	     87331 t.at.tmp[6] : 0  [by t.at.C3Els[0]._y:=1]

test/unit_tests/andtree_5/run/test.prs

@@ -0,0 +1,45 @@
+= "GND" "GND"
+= "Vdd" "Vdd"
+= "Reset" "Reset"
+"t.at.C2Els[0].a"&"t.at.C2Els[0].b"->"t.at.C2Els[0]._y"-
+~("t.at.C2Els[0].a"&"t.at.C2Els[0].b")->"t.at.C2Els[0]._y"+
+"t.at.C2Els[0]._y"->"t.at.C2Els[0].y"-
+~("t.at.C2Els[0]._y")->"t.at.C2Els[0].y"+
+"t.at.C2Els[1].a"&"t.at.C2Els[1].b"->"t.at.C2Els[1]._y"-
+~("t.at.C2Els[1].a"&"t.at.C2Els[1].b")->"t.at.C2Els[1]._y"+
+"t.at.C2Els[1]._y"->"t.at.C2Els[1].y"-
+~("t.at.C2Els[1]._y")->"t.at.C2Els[1].y"+
+"t.at.C3Els[0].a"&"t.at.C3Els[0].b"&"t.at.C3Els[0].c"->"t.at.C3Els[0]._y"-
+~("t.at.C3Els[0].a"&"t.at.C3Els[0].b"&"t.at.C3Els[0].c")->"t.at.C3Els[0]._y"+
+"t.at.C3Els[0]._y"->"t.at.C3Els[0].y"-
+~("t.at.C3Els[0]._y")->"t.at.C3Els[0].y"+
+= "t.at.tmp[5]" "t.at.C2Els[1].a"
+= "t.at.tmp[5]" "t.at.C2Els[0].y"
+= "t.at.tmp[6]" "t.at.C2Els[1].b"
+= "t.at.tmp[6]" "t.at.C3Els[0].y"
+= "t.at.supply.vdd" "t.at.C3Els[0].vdd"
+= "t.at.supply.vdd" "t.at.C2Els[1].vdd"
+= "t.at.supply.vdd" "t.at.C2Els[0].vdd"
+= "t.at.supply.vss" "t.at.C3Els[0].vss"
+= "t.at.supply.vss" "t.at.C2Els[1].vss"
+= "t.at.supply.vss" "t.at.C2Els[0].vss"
+= "t.at.in[0]" "t.at.C2Els[0].a"
+= "t.at.in[0]" "t.at.tmp[0]"
+= "t.at.in[1]" "t.at.C2Els[0].b"
+= "t.at.in[1]" "t.at.tmp[1]"
+= "t.at.in[2]" "t.at.C3Els[0].a"
+= "t.at.in[2]" "t.at.tmp[2]"
+= "t.at.in[3]" "t.at.C3Els[0].b"
+= "t.at.in[3]" "t.at.tmp[3]"
+= "t.at.in[4]" "t.at.C3Els[0].c"
+= "t.at.in[4]" "t.at.tmp[4]"
+= "t.at.out" "t.at.C2Els[1].y"
+= "t.at.out" "t.at.tmp[7]"
+= "Vdd" "t.at.supply.vdd"
+= "GND" "t.at.supply.vss"
+= "t.out" "t.at.out"
+= "t.in[0]" "t.at.in[0]"
+= "t.in[1]" "t.at.in[1]"
+= "t.in[2]" "t.at.in[2]"
+= "t.in[3]" "t.at.in[3]"
+= "t.in[4]" "t.at.in[4]"

test/unit_tests/andtree_5/test.act

@@ -0,0 +1,41 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/treegates.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+defproc andtree_5 (bool? in[5]; bool! out){
+    andtree<5> at(.in=in, .out=out);
+    at.supply.vss = GND;
+    at.supply.vdd = Vdd;
+
+}
+
+andtree_5 t;

test/unit_tests/andtree_5/test.prsim

@@ -0,0 +1,50 @@
+watchall
+
+system "echo '0'"
+
+set t.in[0] 0
+set t.in[1] 0
+set t.in[2] 0
+set t.in[3] 0
+set t.in[4] 0
+
+system "echo '1'"
+
+cycle
+mode run
+
+assert t.out 0
+
+system "echo '[] setting some bits high'"
+set t.in[0] 1
+set t.in[1] 1
+set t.in[2] 1
+
+cycle
+
+assert t.out 0
+
+system "echo '[] setting all bits high'"
+set t.in[3] 1
+set t.in[4] 1
+
+cycle
+assert t.out 1
+
+
+system "echo '[] setting some low'"
+set t.in[0] 0
+set t.in[1] 0
+
+cycle 
+assert t.out 0
+
+
+system "echo '[] setting all low'"
+set t.in[2] 0
+set t.in[3] 0
+set t.in[4] 0
+
+cycle 
+assert t.out 0
+

test/unit_tests/arbiter/run/prsim.out

@@ -0,0 +1,39 @@
+a._v a.a a.u a.v a._u a.b 
+reset done
+	         0 a.a : 0
+	         0 a.b : 0
+	         1 a._u : 1  [by a.a:=0]
+	      7092 a._v : 1  [by a.b:=0]
+	      7094 a.v : 0  [by a._v:=1]
+	     10468 a.u : 0  [by a._u:=1]
+
+step 1.1 finished
+	     10468 a.a : 1
+	     10468 a.b : 1
+	     15221 a._u : 0  [by a.a:=1]
+	     15335 a.u : 1  [by a._u:=0]
+
+step 1.2 finished
+	     15335 a.a : 0
+	     15335 a.b : 0
+	     80701 a._u : 1  [by a.a:=0]
+	     82427 a.u : 0  [by a._u:=1]
+
+step 2.1 finished
+	     82427 a.a : 1
+	     82427 a.b : 1
+	     82466 a._u : 0  [by a.a:=1]
+	     82957 a.u : 1  [by a._u:=0]
+
+step 2.2 finished
+	     82957 a.a : 0
+	     82957 a.b : 0
+	     82970 a._u : 1  [by a.a:=0]
+	     83010 a.u : 0  [by a._u:=1]
+
+step 3.1 finished
+	     83010 a.b : 1
+	     83425 a._v : 0  [by a.b:=1]
+	     83445 a.v : 1  [by a._v:=0]
+
+step 3.2 finished

test/unit_tests/arbiter/run/test.prs

@@ -0,0 +1,3 @@
+= "GND" "GND"
+= "Vdd" "Vdd"
+= "Reset" "Reset"

test/unit_tests/arbiter/test.act

@@ -0,0 +1,18 @@
+defproc arbiter (bool a, b, u, v)
+{
+  bool _u, _v;
+  prs {
+   [keeper=0]  a &  _v -> _u-
+   [keeper=0] ~a  | ~_v  -> _u+
+   [keeper=0]  b &  _u -> _v-
+   [keeper=0] ~b  | ~_u  -> _v+
+   [keeper=0] _u  => u-
+   [keeper=0] _v => v-
+  }
+  spec {
+    mk_excllo(_u, _v)
+  }
+}
+
+
+arbiter a;

test/unit_tests/arbiter/test.prsim

@@ -0,0 +1,39 @@
+watchall
+cycle
+system "echo 'reset done'"
+set a.a 0
+set a.b 0
+advance 1000000
+status X
+mode run
+system "echo 'step 1.1 finished'"
+set a.a 1
+set a.b 1
+advance 1000000
+status X
+mode run
+system "echo 'step 1.2 finished'"
+set a.a 0
+set a.b 0
+advance 1000000
+status X
+mode run
+system "echo 'step 2.1 finished'"
+set a.a 1
+set a.b 1
+advance 1000000
+status X
+mode run
+system "echo 'step 2.2 finished'"
+set a.a 0
+set a.b 0
+advance 1000000
+status X
+mode run
+system "echo 'step 3.1 finished'"
+set a.a 0
+set a.b 1
+advance 1000000
+status X
+mode run
+system "echo 'step 3.2 finished'"

test/unit_tests/arbiter_2/run/prsim.out

@@ -0,0 +1,39 @@
+a._v a.a a.u a.v a._u a.b 
+reset done
+	         0 a.a : 0
+	         0 a.b : 0
+	         1 a._u : 1  [by a.a:=0]
+	      7092 a._v : 1  [by a.b:=0]
+	      7094 a.v : 0  [by a._v:=1]
+	     10468 a.u : 0  [by a._u:=1]
+
+step 1.1 finished
+	     10468 a.a : 1
+	     10468 a.b : 1
+	     15221 a._u : 0  [by a.a:=1]
+	     15335 a.u : 1  [by a._u:=0]
+
+step 1.2 finished
+	     15335 a.a : 0
+	     15335 a.b : 0
+	     80701 a._u : 1  [by a.a:=0]
+	     82427 a.u : 0  [by a._u:=1]
+
+step 2.1 finished
+	     82427 a.a : 1
+	     82427 a.b : 1
+	     82466 a._u : 0  [by a.a:=1]
+	     82957 a.u : 1  [by a._u:=0]
+
+step 2.2 finished
+	     82957 a.a : 0
+	     82957 a.b : 0
+	     82970 a._u : 1  [by a.a:=0]
+	     83010 a.u : 0  [by a._u:=1]
+
+step 3.1 finished
+	     83010 a.b : 1
+	     83425 a._v : 0  [by a.b:=1]
+	     83445 a.v : 1  [by a._v:=0]
+
+step 3.2 finished

test/unit_tests/arbiter_2/run/test.prs

@@ -0,0 +1,12 @@
+= "GND" "GND"
+= "Vdd" "Vdd"
+= "Reset" "Reset"
+"a.a"&"a._v"->"a._u"-
+~"a.a"|~"a._v"->"a._u"+
+"a.b"&"a._u"->"a._v"-
+~"a.b"|~"a._u"->"a._v"+
+"a._u"->"a.u"-
+~("a._u")->"a.u"+
+"a._v"->"a.v"-
+~("a._v")->"a.v"+
+mk_excllo("a._u","a._v")

test/unit_tests/arbiter_2/test.act

@@ -0,0 +1,18 @@
+defproc arbiter (bool a, b, u, v)
+{
+  bool _u, _v;
+  prs {
+   [keeper=0]  a &  _v -> _u-
+   [keeper=0] ~a  | ~_v  -> _u+
+   [keeper=0]  b &  _u -> _v-
+   [keeper=0] ~b  | ~_u  -> _v+
+   [keeper=0] _u  => u-
+   [keeper=0] _v => v-
+  }
+  spec {
+    mk_excllo(_u, _v)
+  }
+}
+
+
+arbiter a;

test/unit_tests/arbiter_2/test.prsim

@@ -0,0 +1,39 @@
+watchall
+cycle
+system "echo 'reset done'"
+set a.a 0
+set a.b 0
+advance 1000000
+status X
+mode run
+system "echo 'step 1.1 finished'"
+set a.a 1
+set a.b 1
+advance 1000000
+status X
+mode run
+system "echo 'step 1.2 finished'"
+set a.a 0
+set a.b 0
+advance 1000000
+status X
+mode run
+system "echo 'step 2.1 finished'"
+set a.a 1
+set a.b 1
+advance 1000000
+status X
+mode run
+system "echo 'step 2.2 finished'"
+set a.a 0
+set a.b 0
+advance 1000000
+status X
+mode run
+system "echo 'step 3.1 finished'"
+set a.a 0
+set a.b 1
+advance 1000000
+status X
+mode run
+system "echo 'step 3.2 finished'"

test/unit_tests/arbiter_handshake_adv/run/prsim.out

@@ -0,0 +1,357 @@
+t.fifo_in1.fifo_element[2].in.r t.fifo_in1.fifo_element[1]._en t.in1.r t.in2.r t.fifo_in2.fifo_element[3].in.r t.out.r t._out1.r t.fifo_in2.fifo_element[3].inack_ctl._y t._out1.a t.arb._y1_arb t.fifo_in2.fifo_element[1].in.a t.fifo_in1.fifo_element[2].in.a t.fifo_in1.fifo_element[3]._out_a_B t.fifo_in1.fifo_element[1].in.r t.in2.a t.fifo_in2.fifo_element[3].in.a t._out2.a t.fifo_in2.fifo_element[1].in.r t.fifo_in1.fifo_element[3]._en t.fifo_in1.fifo_element[0].buf_func._y t.fifo_in2.fifo_element[0].inack_ctl._y t.fifo_in1.fifo_element[3].in.r t.fifo_in2.fifo_element[2].in.a t.fifo_in2.fifo_element[1]._out_a_B t.fifo_in2.fifo_element[3]._out_a_B t.fifo_in2.fifo_element[2].inack_ctl._y t.fifo_in2.fifo_element[0]._en t.fifo_in1.fifo_element[2]._en t._out2.r t.fifo_in1.fifo_element[1].in.a t.in1.a t.arb.ack_cell1._y t.fifo_in1.fifo_element[2].buf_func._y t.fifo_in1.fifo_element[0]._en t.fifo_in2.fifo_element[0]._out_a_B t.fifo_in1.fifo_element[2].inack_ctl._y t.fifo_in2.fifo_element[2]._out_a_B t.fifo_in1.fifo_element[1]._out_a_B t.fifo_in2.fifo_element[3]._en t.fifo_in2.fifo_element[1].buf_func._y t.fifo_in1.fifo_element[0].inack_ctl._y t.arb.or_cell._y t.arb.arbiter._y1 t.arb._y2_arb t.fifo_in1.fifo_element[1].inack_ctl._y t.fifo_in1.fifo_element[0]._out_a_B t.fifo_in2.fifo_element[1]._en t.fifo_in2.fifo_element[2]._en t.fifo_in2.fifo_element[0].buf_func._y t.fifo_in2.fifo_element[3].buf_func._y t.fifo_in1.fifo_element[2]._out_a_B t.fifo_in1.fifo_element[3].in.a t.fifo_in2.fifo_element[2].buf_func._y t.arb.arbiter._y2 t.fifo_in1.fifo_element[3].inack_ctl._y t.fifo_in2.fifo_element[2].in.r t.fifo_in1.fifo_element[1].buf_func._y t.fifo_in2.fifo_element[1].inack_ctl._y t.out.a t.fifo_in1.fifo_element[3].buf_func._y t.arb.ack_cell2._y 
+[0] code starts
+	     77100 t.in1.r : 0
+	     77100 Reset : 0
+	     77100 t.out.a : 0
+	     77100 t.in2.r : 0
+	    114031 t.fifo_in1.reset_buf._y : 1  [by Reset:=0]
+	    114086 t.fifo_in1._reset_BX : 0  [by t.fifo_in1.reset_buf._y:=1]
+	    120348 t.fifo_in2.reset_buf._y : 1  [by Reset:=0]
+	    150128 t.fifo_in2._reset_BX : 0  [by t.fifo_in2.reset_buf._y:=1]
+	    163977 t.fifo_in2.reset_bufarray.buf1._y : 1  [by t.fifo_in2._reset_BX:=0]
+	    165739 t.fifo_in1.reset_bufarray.buf1._y : 1  [by t.fifo_in1._reset_BX:=0]
+	    180082 t.fifo_in1._reset_BXX[0] : 0  [by t.fifo_in1.reset_bufarray.buf1._y:=1]
+	    180083 t.fifo_in1.fifo_element[0].reset_buf._y : 1  [by t.fifo_in1._reset_BXX[0]:=0]
+	    180083 t.fifo_in1.fifo_element[3].reset_buf._y : 1  [by t.fifo_in1._reset_BXX[0]:=0]
+	    180365 t.fifo_in1.fifo_element[3]._reset_BX : 0  [by t.fifo_in1.fifo_element[3].reset_buf._y:=1]
+	    180368 t.fifo_in1.fifo_element[3].inack_ctl._y : 1  [by t.fifo_in1.fifo_element[3]._reset_BX:=0]
+	    180504 t.fifo_in1.fifo_element[2].reset_buf._y : 1  [by t.fifo_in1._reset_BXX[0]:=0]
+	    181055 t.fifo_in1.fifo_element[2]._reset_BX : 0  [by t.fifo_in1.fifo_element[2].reset_buf._y:=1]
+	    181133 t.fifo_in1.fifo_element[3].buf_func._y : 1  [by t.fifo_in1.fifo_element[3]._reset_BX:=0]
+	    182009 t.fifo_in1.fifo_element[2].inack_ctl._y : 1  [by t.fifo_in1.fifo_element[2]._reset_BX:=0]
+	    182126 t.fifo_in1.fifo_element[2].buf_func._y : 1  [by t.fifo_in1.fifo_element[2]._reset_BX:=0]
+	    182214 t._out1.r : 0  [by t.fifo_in1.fifo_element[3].buf_func._y:=1]
+	    182232 t.arb.arbiter._y1 : 1  [by t._out1.r:=0]
+	    183108 t.fifo_in1.fifo_element[3].in.r : 0  [by t.fifo_in1.fifo_element[2].buf_func._y:=1]
+	    186245 t.arb._y1_arb : 0  [by t.arb.arbiter._y1:=1]
+	    188789 t.fifo_in2._reset_BXX[0] : 0  [by t.fifo_in2.reset_bufarray.buf1._y:=1]
+	    189291 t.fifo_in2.fifo_element[3].reset_buf._y : 1  [by t.fifo_in2._reset_BXX[0]:=0]
+	    189494 t.fifo_in2.fifo_element[3]._reset_BX : 0  [by t.fifo_in2.fifo_element[3].reset_buf._y:=1]
+	    189633 t.fifo_in2.fifo_element[3].inack_ctl._y : 1  [by t.fifo_in2.fifo_element[3]._reset_BX:=0]
+	    190248 t.arb.ack_cell1._y : 1  [by t.arb._y1_arb:=0]
+	    190317 t._out1.a : 0  [by t.arb.ack_cell1._y:=1]
+	    190328 t.fifo_in1.fifo_element[3]._out_a_B : 1  [by t._out1.a:=0]
+	    191348 t.fifo_in2.fifo_element[3].buf_func._y : 1  [by t.fifo_in2.fifo_element[3]._reset_BX:=0]
+	    193549 t.fifo_in2.fifo_element[0].reset_buf._y : 1  [by t.fifo_in2._reset_BXX[0]:=0]
+	    193753 t.fifo_in2.fifo_element[0]._reset_BX : 0  [by t.fifo_in2.fifo_element[0].reset_buf._y:=1]
+	    193754 t.fifo_in2.fifo_element[0].inack_ctl._y : 1  [by t.fifo_in2.fifo_element[0]._reset_BX:=0]
+	    193768 t.fifo_in2.fifo_element[0].buf_func._y : 1  [by t.fifo_in2.fifo_element[0]._reset_BX:=0]
+	    193791 t.in2.a : 0  [by t.fifo_in2.fifo_element[0].inack_ctl._y:=1]
+	    194507 t.fifo_in2.fifo_element[1].in.r : 0  [by t.fifo_in2.fifo_element[0].buf_func._y:=1]
+	    194619 t.fifo_in2.fifo_element[0]._en : 1  [by t.fifo_in2.fifo_element[1].in.r:=0]
+	    200288 t.fifo_in1.fifo_element[0]._reset_BX : 0  [by t.fifo_in1.fifo_element[0].reset_buf._y:=1]
+	    200328 t.fifo_in1.fifo_element[0].inack_ctl._y : 1  [by t.fifo_in1.fifo_element[0]._reset_BX:=0]
+	    200585 t.in1.a : 0  [by t.fifo_in1.fifo_element[0].inack_ctl._y:=1]
+	    202809 t.fifo_in1.fifo_element[3].in.a : 0  [by t.fifo_in1.fifo_element[3].inack_ctl._y:=1]
+	    202896 t.fifo_in1.fifo_element[3]._en : 1  [by t.fifo_in1.fifo_element[3].in.a:=0]
+	    203103 t.fifo_in1.fifo_element[2]._out_a_B : 1  [by t.fifo_in1.fifo_element[3].in.a:=0]
+	    210373 t.fifo_in2.fifo_element[1].reset_buf._y : 1  [by t.fifo_in2._reset_BXX[0]:=0]
+	    210374 t.fifo_in2.fifo_element[1]._reset_BX : 0  [by t.fifo_in2.fifo_element[1].reset_buf._y:=1]
+	    212180 t.fifo_in2.fifo_element[1].buf_func._y : 1  [by t.fifo_in2.fifo_element[1]._reset_BX:=0]
+	    212381 t.fifo_in2.fifo_element[1].inack_ctl._y : 1  [by t.fifo_in2.fifo_element[1]._reset_BX:=0]
+	    212971 t.fifo_in2.fifo_element[1].in.a : 0  [by t.fifo_in2.fifo_element[1].inack_ctl._y:=1]
+	    213149 t.fifo_in2.fifo_element[0]._out_a_B : 1  [by t.fifo_in2.fifo_element[1].in.a:=0]
+	    213389 t.fifo_in2.fifo_element[2].in.r : 0  [by t.fifo_in2.fifo_element[1].buf_func._y:=1]
+	    214192 t.fifo_in2.fifo_element[1]._en : 1  [by t.fifo_in2.fifo_element[2].in.r:=0]
+	    225979 t.fifo_in2.fifo_element[3].in.a : 0  [by t.fifo_in2.fifo_element[3].inack_ctl._y:=1]
+	    226143 t.fifo_in2.fifo_element[2]._out_a_B : 1  [by t.fifo_in2.fifo_element[3].in.a:=0]
+	    228796 t.fifo_in1.fifo_element[1].reset_buf._y : 1  [by t.fifo_in1._reset_BXX[0]:=0]
+	    230991 t.fifo_in1.fifo_element[1]._reset_BX : 0  [by t.fifo_in1.fifo_element[1].reset_buf._y:=1]
+	    231013 t.fifo_in1.fifo_element[1].buf_func._y : 1  [by t.fifo_in1.fifo_element[1]._reset_BX:=0]
+	    231838 t.fifo_in1.fifo_element[1].inack_ctl._y : 1  [by t.fifo_in1.fifo_element[1]._reset_BX:=0]
+	    231971 t.fifo_in1.fifo_element[1].in.a : 0  [by t.fifo_in1.fifo_element[1].inack_ctl._y:=1]
+	    233690 t.fifo_in2.fifo_element[2].reset_buf._y : 1  [by t.fifo_in2._reset_BXX[0]:=0]
+	    234049 t.fifo_in2.fifo_element[2]._reset_BX : 0  [by t.fifo_in2.fifo_element[2].reset_buf._y:=1]
+	    234270 t.fifo_in2.fifo_element[2].inack_ctl._y : 1  [by t.fifo_in2.fifo_element[2]._reset_BX:=0]
+	    234277 t.fifo_in2.fifo_element[2].in.a : 0  [by t.fifo_in2.fifo_element[2].inack_ctl._y:=1]
+	    234307 t.fifo_in2.fifo_element[1]._out_a_B : 1  [by t.fifo_in2.fifo_element[2].in.a:=0]
+	    236479 t.fifo_in1.fifo_element[2].in.a : 0  [by t.fifo_in1.fifo_element[2].inack_ctl._y:=1]
+	    243134 t._out2.r : 0  [by t.fifo_in2.fifo_element[3].buf_func._y:=1]
+	    243192 t.fifo_in1.fifo_element[2]._en : 1  [by t.fifo_in1.fifo_element[2].in.a:=0]
+	    243225 t.fifo_in2.fifo_element[3]._en : 1  [by t._out2.r:=0]
+	    245323 t.arb.arbiter._y2 : 1  [by t._out2.r:=0]
+	    245330 t.arb._y2_arb : 0  [by t.arb.arbiter._y2:=1]
+	    245436 t.arb.ack_cell2._y : 1  [by t.arb._y2_arb:=0]
+	    245514 t._out2.a : 0  [by t.arb.ack_cell2._y:=1]
+	    245789 t.fifo_in2.fifo_element[3]._out_a_B : 1  [by t._out2.a:=0]
+	    247633 t.fifo_in1.fifo_element[0]._out_a_B : 1  [by t.fifo_in1.fifo_element[1].in.a:=0]
+	    247800 t.fifo_in1.fifo_element[0].buf_func._y : 1  [by t.fifo_in1.fifo_element[0]._reset_BX:=0]
+	    248117 t.arb.or_cell._y : 1  [by t.arb._y2_arb:=0]
+	    248165 t.fifo_in2.fifo_element[2].buf_func._y : 1  [by t.fifo_in2.fifo_element[2]._reset_BX:=0]
+	    248177 t.fifo_in2.fifo_element[3].in.r : 0  [by t.fifo_in2.fifo_element[2].buf_func._y:=1]
+	    248572 t.out.r : 0  [by t.arb.or_cell._y:=1]
+	    248581 t.fifo_in2.fifo_element[2]._en : 1  [by t.fifo_in2.fifo_element[3].in.r:=0]
+	    261141 t.fifo_in1.fifo_element[2].in.r : 0  [by t.fifo_in1.fifo_element[1].buf_func._y:=1]
+	    261153 t.fifo_in1.fifo_element[1]._en : 1  [by t.fifo_in1.fifo_element[2].in.r:=0]
+	    266796 t.fifo_in1.fifo_element[1].in.r : 0  [by t.fifo_in1.fifo_element[0].buf_func._y:=1]
+	    272712 t.fifo_in1.fifo_element[0]._en : 1  [by t.fifo_in1.fifo_element[1].in.r:=0]
+	    293940 t.fifo_in1.fifo_element[1]._out_a_B : 1  [by t.fifo_in1.fifo_element[2].in.a:=0]
+
+	    293940 Reset : 1
+	    296839 t.fifo_in1.reset_buf._y : 0  [by Reset:=1]
+	    298216 t.fifo_in2.reset_buf._y : 0  [by Reset:=1]
+	    298218 t.fifo_in2._reset_BX : 1  [by t.fifo_in2.reset_buf._y:=0]
+	    301134 t.fifo_in1._reset_BX : 1  [by t.fifo_in1.reset_buf._y:=0]
+	    302383 t.fifo_in1.reset_bufarray.buf1._y : 0  [by t.fifo_in1._reset_BX:=1]
+	    302753 t.fifo_in2.reset_bufarray.buf1._y : 0  [by t.fifo_in2._reset_BX:=1]
+	    302919 t.fifo_in2._reset_BXX[0] : 1  [by t.fifo_in2.reset_bufarray.buf1._y:=0]
+	    302994 t.fifo_in2.fifo_element[2].reset_buf._y : 0  [by t.fifo_in2._reset_BXX[0]:=1]
+	    302996 t.fifo_in2.fifo_element[2]._reset_BX : 1  [by t.fifo_in2.fifo_element[2].reset_buf._y:=0]
+	    303057 t.fifo_in2.fifo_element[0].reset_buf._y : 0  [by t.fifo_in2._reset_BXX[0]:=1]
+	    303264 t.fifo_in2.fifo_element[1].reset_buf._y : 0  [by t.fifo_in2._reset_BXX[0]:=1]
+	    303265 t.fifo_in2.fifo_element[1]._reset_BX : 1  [by t.fifo_in2.fifo_element[1].reset_buf._y:=0]
+	    305882 t.fifo_in1._reset_BXX[0] : 1  [by t.fifo_in1.reset_bufarray.buf1._y:=0]
+	    305893 t.fifo_in1.fifo_element[1].reset_buf._y : 0  [by t.fifo_in1._reset_BXX[0]:=1]
+	    305949 t.fifo_in1.fifo_element[3].reset_buf._y : 0  [by t.fifo_in1._reset_BXX[0]:=1]
+	    305965 t.fifo_in1.fifo_element[3]._reset_BX : 1  [by t.fifo_in1.fifo_element[3].reset_buf._y:=0]
+	    306252 t.fifo_in1.fifo_element[0].reset_buf._y : 0  [by t.fifo_in1._reset_BXX[0]:=1]
+	    306430 t.fifo_in1.fifo_element[2].reset_buf._y : 0  [by t.fifo_in1._reset_BXX[0]:=1]
+	    306958 t.fifo_in1.fifo_element[2]._reset_BX : 1  [by t.fifo_in1.fifo_element[2].reset_buf._y:=0]
+	    308182 t.fifo_in2.fifo_element[3].reset_buf._y : 0  [by t.fifo_in2._reset_BXX[0]:=1]
+	    308534 t.fifo_in1.fifo_element[1]._reset_BX : 1  [by t.fifo_in1.fifo_element[1].reset_buf._y:=0]
+	    310617 t.fifo_in2.fifo_element[3]._reset_BX : 1  [by t.fifo_in2.fifo_element[3].reset_buf._y:=0]
+	    310814 t.fifo_in1.fifo_element[0]._reset_BX : 1  [by t.fifo_in1.fifo_element[0].reset_buf._y:=0]
+	    346974 t.fifo_in2.fifo_element[0]._reset_BX : 1  [by t.fifo_in2.fifo_element[0].reset_buf._y:=0]
+[1] reset done
+----------------------------------------------------------------------------------------------------
+	    346974 t.in1.r : 1
+	    346974 t.in2.r : 1
+	    370899 t.fifo_in2.fifo_element[0].buf_func._y : 0  [by t.in2.r:=1]
+	    373854 t.fifo_in1.fifo_element[0].buf_func._y : 0  [by t.in1.r:=1]
+	    373856 t.fifo_in1.fifo_element[1].in.r : 1  [by t.fifo_in1.fifo_element[0].buf_func._y:=0]
+	    373859 t.fifo_in1.fifo_element[0].inack_ctl._y : 0  [by t.fifo_in1.fifo_element[1].in.r:=1]
+	    373888 t.in1.a : 1  [by t.fifo_in1.fifo_element[0].inack_ctl._y:=0]
+	    374205 t.fifo_in1.fifo_element[0]._en : 0  [by t.in1.a:=1]
+	    383940 t.fifo_in2.fifo_element[1].in.r : 1  [by t.fifo_in2.fifo_element[0].buf_func._y:=0]
+	    384093 t.fifo_in2.fifo_element[0].inack_ctl._y : 0  [by t.fifo_in2.fifo_element[1].in.r:=1]
+	    384137 t.in2.a : 1  [by t.fifo_in2.fifo_element[0].inack_ctl._y:=0]
+	    385541 t.fifo_in2.fifo_element[1].buf_func._y : 0  [by t.fifo_in2.fifo_element[1].in.r:=1]
+	    386898 t.fifo_in2.fifo_element[0]._en : 0  [by t.in2.a:=1]
+	    399224 t.fifo_in2.fifo_element[2].in.r : 1  [by t.fifo_in2.fifo_element[1].buf_func._y:=0]
+	    399225 t.fifo_in2.fifo_element[2].buf_func._y : 0  [by t.fifo_in2.fifo_element[2].in.r:=1]
+	    399247 t.fifo_in2.fifo_element[3].in.r : 1  [by t.fifo_in2.fifo_element[2].buf_func._y:=0]
+	    399248 t.fifo_in2.fifo_element[3].buf_func._y : 0  [by t.fifo_in2.fifo_element[3].in.r:=1]
+	    399441 t.fifo_in2.fifo_element[1].inack_ctl._y : 0  [by t.fifo_in2.fifo_element[2].in.r:=1]
+	    399600 t.fifo_in2.fifo_element[1].in.a : 1  [by t.fifo_in2.fifo_element[1].inack_ctl._y:=0]
+	    400828 t.fifo_in2.fifo_element[2].inack_ctl._y : 0  [by t.fifo_in2.fifo_element[3].in.r:=1]
+	    400887 t.fifo_in2.fifo_element[0]._out_a_B : 0  [by t.fifo_in2.fifo_element[1].in.a:=1]
+	    401032 t.fifo_in2.fifo_element[0].buf_func._y : 1  [by t.fifo_in2.fifo_element[0]._out_a_B:=0]
+	    403060 t.fifo_in2.fifo_element[2].in.a : 1  [by t.fifo_in2.fifo_element[2].inack_ctl._y:=0]
+	    403061 t.fifo_in2.fifo_element[1]._out_a_B : 0  [by t.fifo_in2.fifo_element[2].in.a:=1]
+	    403864 t.fifo_in2.fifo_element[1].in.r : 0  [by t.fifo_in2.fifo_element[0].buf_func._y:=1]
+	    408593 t._out2.r : 1  [by t.fifo_in2.fifo_element[3].buf_func._y:=0]
+	    408755 t.fifo_in2.fifo_element[3].inack_ctl._y : 0  [by t._out2.r:=1]
+	    409414 t.fifo_in2.fifo_element[2]._en : 0  [by t.fifo_in2.fifo_element[2].in.a:=1]
+	    416124 t.fifo_in2.fifo_element[3].in.a : 1  [by t.fifo_in2.fifo_element[3].inack_ctl._y:=0]
+	    416131 t.fifo_in2.fifo_element[2]._out_a_B : 0  [by t.fifo_in2.fifo_element[3].in.a:=1]
+	    416138 t.fifo_in2.fifo_element[3]._en : 0  [by t.fifo_in2.fifo_element[3].in.a:=1]
+	    416291 t.fifo_in2.fifo_element[2].buf_func._y : 1  [by t.fifo_in2.fifo_element[2]._out_a_B:=0]
+	    419276 t.fifo_in2.fifo_element[1]._en : 0  [by t.fifo_in2.fifo_element[1].in.a:=1]
+	    419277 t.fifo_in2.fifo_element[1].buf_func._y : 1  [by t.fifo_in2.fifo_element[1]._en:=0]
+	    419277 t.fifo_in2.fifo_element[1].inack_ctl._y : 1  [by t.fifo_in2.fifo_element[1]._en:=0]
+	    419278 t.fifo_in2.fifo_element[2].in.r : 0  [by t.fifo_in2.fifo_element[1].buf_func._y:=1]
+	    419465 t.fifo_in2.fifo_element[2].inack_ctl._y : 1  [by t.fifo_in2.fifo_element[2].in.r:=0]
+	    419466 t.fifo_in2.fifo_element[2].in.a : 0  [by t.fifo_in2.fifo_element[2].inack_ctl._y:=1]
+	    421520 t.fifo_in2.fifo_element[1].in.a : 0  [by t.fifo_in2.fifo_element[1].inack_ctl._y:=1]
+	    421521 t.fifo_in2.fifo_element[0]._out_a_B : 1  [by t.fifo_in2.fifo_element[1].in.a:=0]
+	    423648 t.fifo_in2.fifo_element[1]._out_a_B : 1  [by t.fifo_in2.fifo_element[2].in.a:=0]
+	    434814 t.fifo_in1.fifo_element[1].buf_func._y : 0  [by t.fifo_in1.fifo_element[1].in.r:=1]
+	    435667 t.fifo_in1.fifo_element[2].in.r : 1  [by t.fifo_in1.fifo_element[1].buf_func._y:=0]
+	    435672 t.fifo_in1.fifo_element[2].buf_func._y : 0  [by t.fifo_in1.fifo_element[2].in.r:=1]
+	    435673 t.fifo_in1.fifo_element[3].in.r : 1  [by t.fifo_in1.fifo_element[2].buf_func._y:=0]
+	    435690 t.fifo_in1.fifo_element[3].buf_func._y : 0  [by t.fifo_in1.fifo_element[3].in.r:=1]
+	    436558 t.fifo_in1.fifo_element[1].inack_ctl._y : 0  [by t.fifo_in1.fifo_element[2].in.r:=1]
+	    436561 t.fifo_in1.fifo_element[1].in.a : 1  [by t.fifo_in1.fifo_element[1].inack_ctl._y:=0]
+	    437502 t.fifo_in1.fifo_element[1]._en : 0  [by t.fifo_in1.fifo_element[1].in.a:=1]
+	    437848 t.fifo_in2.fifo_element[3].in.r : 0  [by t.fifo_in2.fifo_element[2].buf_func._y:=1]
+	    437849 t.fifo_in2.fifo_element[3].inack_ctl._y : 1  [by t.fifo_in2.fifo_element[3].in.r:=0]
+	    437890 t.fifo_in2.fifo_element[2]._en : 1  [by t.fifo_in2.fifo_element[3].in.r:=0]
+	    438246 t.fifo_in1.fifo_element[2].inack_ctl._y : 0  [by t.fifo_in1.fifo_element[3].in.r:=1]
+	    440666 t.fifo_in2.fifo_element[3].in.a : 0  [by t.fifo_in2.fifo_element[3].inack_ctl._y:=1]
+	    440761 t.fifo_in2.fifo_element[2]._out_a_B : 1  [by t.fifo_in2.fifo_element[3].in.a:=0]
+	    444051 t._out1.r : 1  [by t.fifo_in1.fifo_element[3].buf_func._y:=0]
+	    444059 t.fifo_in1.fifo_element[3].inack_ctl._y : 0  [by t._out1.r:=1]
+	    444093 t.fifo_in1.fifo_element[3].in.a : 1  [by t.fifo_in1.fifo_element[3].inack_ctl._y:=0]
+	    445011 t.fifo_in1.fifo_element[2]._out_a_B : 0  [by t.fifo_in1.fifo_element[3].in.a:=1]
+	    447877 t.arb.arbiter._y2 : 0  [by t._out2.r:=1]
+	    447881 t.arb._y2_arb : 1  [by t.arb.arbiter._y2:=0]
+	    451979 t.fifo_in1.fifo_element[2].in.a : 1  [by t.fifo_in1.fifo_element[2].inack_ctl._y:=0]
+	    454377 t.fifo_in1.fifo_element[2]._en : 0  [by t.fifo_in1.fifo_element[2].in.a:=1]
+	    455194 t.fifo_in1.fifo_element[1]._out_a_B : 0  [by t.fifo_in1.fifo_element[2].in.a:=1]
+	    455242 t.fifo_in1.fifo_element[1].buf_func._y : 1  [by t.fifo_in1.fifo_element[1]._out_a_B:=0]
+	    455245 t.fifo_in1.fifo_element[2].in.r : 0  [by t.fifo_in1.fifo_element[1].buf_func._y:=1]
+	    455423 t.fifo_in1.fifo_element[2].inack_ctl._y : 1  [by t.fifo_in1.fifo_element[2].in.r:=0]
+	    456302 t.fifo_in2.fifo_element[1]._en : 1  [by t.fifo_in2.fifo_element[1].in.a:=0]
+	    457980 t.fifo_in1.fifo_element[3]._en : 0  [by t.fifo_in1.fifo_element[3].in.a:=1]
+	    476400 t.fifo_in1.fifo_element[2].in.a : 0  [by t.fifo_in1.fifo_element[2].inack_ctl._y:=1]
+	    488299 t.fifo_in1.fifo_element[1]._out_a_B : 1  [by t.fifo_in1.fifo_element[2].in.a:=0]
+	    494259 t.arb.or_cell._y : 0  [by t.arb._y2_arb:=1]
+	    495523 t.fifo_in1.fifo_element[0]._out_a_B : 0  [by t.fifo_in1.fifo_element[1].in.a:=1]
+	    500210 t.out.r : 1  [by t.arb.or_cell._y:=0]
+	    501496 t.fifo_in1.fifo_element[2].buf_func._y : 1  [by t.fifo_in1.fifo_element[2]._en:=0]
+	    502323 t.fifo_in1.fifo_element[3].in.r : 0  [by t.fifo_in1.fifo_element[2].buf_func._y:=1]
+	    502496 t.fifo_in1.fifo_element[3].inack_ctl._y : 1  [by t.fifo_in1.fifo_element[3].in.r:=0]
+	    502497 t.fifo_in1.fifo_element[3].in.a : 0  [by t.fifo_in1.fifo_element[3].inack_ctl._y:=1]
+	    502507 t.fifo_in1.fifo_element[2]._en : 1  [by t.fifo_in1.fifo_element[3].in.r:=0]
+	    502570 t.fifo_in1.fifo_element[2]._out_a_B : 1  [by t.fifo_in1.fifo_element[3].in.a:=0]
+	    535008 t.fifo_in1.fifo_element[0].buf_func._y : 1  [by t.fifo_in1.fifo_element[0]._out_a_B:=0]
+	    535012 t.fifo_in1.fifo_element[1].in.r : 0  [by t.fifo_in1.fifo_element[0].buf_func._y:=1]
+	    572300 t.fifo_in1.fifo_element[1].inack_ctl._y : 1  [by t.fifo_in1.fifo_element[1].in.r:=0]
+	    572396 t.fifo_in1.fifo_element[1].in.a : 0  [by t.fifo_in1.fifo_element[1].inack_ctl._y:=1]
+	    572397 t.fifo_in1.fifo_element[0]._out_a_B : 1  [by t.fifo_in1.fifo_element[1].in.a:=0]
+	    572532 t.fifo_in1.fifo_element[1]._en : 1  [by t.fifo_in1.fifo_element[1].in.a:=0]
+----------------------------------------------------------------------------------------------------
+[2] 1 bit processed by the arbiter
+	    572532 t.out.a : 1
+	    591578 t.arb.ack_cell2._y : 0  [by t.out.a:=1]
+	    591819 t._out2.a : 1  [by t.arb.ack_cell2._y:=0]
+	    595778 t.fifo_in2.fifo_element[3]._out_a_B : 0  [by t._out2.a:=1]
+	    595790 t.fifo_in2.fifo_element[3].buf_func._y : 1  [by t.fifo_in2.fifo_element[3]._out_a_B:=0]
+	    599690 t._out2.r : 0  [by t.fifo_in2.fifo_element[3].buf_func._y:=1]
+	    599691 t.arb.arbiter._y2 : 1  [by t._out2.r:=0]
+	    599747 t.arb.arbiter._y1 : 0  [by t.arb.arbiter._y2:=1]
+	    600719 t.fifo_in2.fifo_element[3]._en : 1  [by t._out2.r:=0]
+	    644697 t.arb._y2_arb : 0  [by t.arb.arbiter._y2:=1]
+	    644698 t.arb.or_cell._y : 1  [by t.arb._y2_arb:=0]
+	    644735 t.out.r : 0  [by t.arb.or_cell._y:=1]
+	    644735 t.out.a : 0
+	    668110 t.arb.ack_cell2._y : 1  [by t.out.a:=0]
+	    668111 t._out2.a : 0  [by t.arb.ack_cell2._y:=1]
+	    669803 t.arb._y1_arb : 1  [by t._out2.a:=0]
+	    669816 t.arb.or_cell._y : 0  [by t.arb._y1_arb:=1]
+	    671675 t.fifo_in2.fifo_element[3]._out_a_B : 1  [by t._out2.a:=0]
+	    686800 t.out.r : 1  [by t.arb.or_cell._y:=0]
+----------------------------------------------------------------------------------------------------
+[3] 2 bit processed by the arbiter
+	    686800 t.out.a : 1
+	    686800 t.in2.r : 0
+	    686800 t.in1.r : 0
+	    686821 t.fifo_in1.fifo_element[0].inack_ctl._y : 1  [by t.in1.r:=0]
+	    686822 t.in1.a : 0  [by t.fifo_in1.fifo_element[0].inack_ctl._y:=1]
+	    686825 t.fifo_in2.fifo_element[0].inack_ctl._y : 1  [by t.in2.r:=0]
+	    686826 t.in2.a : 0  [by t.fifo_in2.fifo_element[0].inack_ctl._y:=1]
+	    686827 t.fifo_in2.fifo_element[0]._en : 1  [by t.in2.a:=0]
+	    687157 t.arb.ack_cell1._y : 0  [by t.out.a:=1]
+	    687318 t._out1.a : 1  [by t.arb.ack_cell1._y:=0]
+	    688355 t.fifo_in1.fifo_element[3]._out_a_B : 0  [by t._out1.a:=1]
+	    688360 t.fifo_in1.fifo_element[3].buf_func._y : 1  [by t.fifo_in1.fifo_element[3]._out_a_B:=0]
+	    688941 t._out1.r : 0  [by t.fifo_in1.fifo_element[3].buf_func._y:=1]
+	    688952 t.fifo_in1.fifo_element[3]._en : 1  [by t._out1.r:=0]
+	    689349 t.arb.arbiter._y1 : 1  [by t._out1.r:=0]
+	    690396 t.arb._y1_arb : 0  [by t.arb.arbiter._y1:=1]
+	    690410 t.arb.or_cell._y : 1  [by t.arb._y1_arb:=0]
+	    690428 t.out.r : 0  [by t.arb.or_cell._y:=1]
+	    696470 t.fifo_in1.fifo_element[0]._en : 1  [by t.in1.a:=0]
+	    696470 t.out.a : 0
+	    696470 t.in2.r : 1
+	    696470 t.in1.r : 1
+	    696474 t.arb.ack_cell1._y : 1  [by t.out.a:=0]
+	    696574 t.fifo_in2.fifo_element[0].buf_func._y : 0  [by t.in2.r:=1]
+	    697678 t._out1.a : 0  [by t.arb.ack_cell1._y:=1]
+	    697906 t.fifo_in1.fifo_element[3]._out_a_B : 1  [by t._out1.a:=0]
+	    705029 t.fifo_in2.fifo_element[1].in.r : 1  [by t.fifo_in2.fifo_element[0].buf_func._y:=0]
+	    705872 t.fifo_in2.fifo_element[1].buf_func._y : 0  [by t.fifo_in2.fifo_element[1].in.r:=1]
+	    705942 t.fifo_in2.fifo_element[2].in.r : 1  [by t.fifo_in2.fifo_element[1].buf_func._y:=0]
+	    705953 t.fifo_in2.fifo_element[1].inack_ctl._y : 0  [by t.fifo_in2.fifo_element[2].in.r:=1]
+	    705956 t.fifo_in2.fifo_element[1].in.a : 1  [by t.fifo_in2.fifo_element[1].inack_ctl._y:=0]
+	    706010 t.fifo_in2.fifo_element[1]._en : 0  [by t.fifo_in2.fifo_element[1].in.a:=1]
+	    706488 t.fifo_in2.fifo_element[0].inack_ctl._y : 0  [by t.fifo_in2.fifo_element[1].in.r:=1]
+	    707104 t.fifo_in2.fifo_element[0]._out_a_B : 0  [by t.fifo_in2.fifo_element[1].in.a:=1]
+	    707649 t.in2.a : 1  [by t.fifo_in2.fifo_element[0].inack_ctl._y:=0]
+	    716301 t.fifo_in2.fifo_element[0]._en : 0  [by t.in2.a:=1]
+	    716382 t.fifo_in2.fifo_element[0].buf_func._y : 1  [by t.fifo_in2.fifo_element[0]._en:=0]
+	    727459 t.fifo_in2.fifo_element[1].in.r : 0  [by t.fifo_in2.fifo_element[0].buf_func._y:=1]
+	    727914 t.fifo_in1.fifo_element[0].buf_func._y : 0  [by t.in1.r:=1]
+	    728006 t.fifo_in1.fifo_element[1].in.r : 1  [by t.fifo_in1.fifo_element[0].buf_func._y:=0]
+	    729750 t.fifo_in1.fifo_element[0].inack_ctl._y : 0  [by t.fifo_in1.fifo_element[1].in.r:=1]
+	    730363 t.in1.a : 1  [by t.fifo_in1.fifo_element[0].inack_ctl._y:=0]
+	    736317 t.fifo_in1.fifo_element[1].buf_func._y : 0  [by t.fifo_in1.fifo_element[1].in.r:=1]
+	    736362 t.fifo_in1.fifo_element[2].in.r : 1  [by t.fifo_in1.fifo_element[1].buf_func._y:=0]
+	    737359 t.fifo_in1.fifo_element[2].buf_func._y : 0  [by t.fifo_in1.fifo_element[2].in.r:=1]
+	    737884 t.fifo_in1.fifo_element[3].in.r : 1  [by t.fifo_in1.fifo_element[2].buf_func._y:=0]
+	    737936 t.fifo_in1.fifo_element[2].inack_ctl._y : 0  [by t.fifo_in1.fifo_element[3].in.r:=1]
+	    737943 t.fifo_in1.fifo_element[2].in.a : 1  [by t.fifo_in1.fifo_element[2].inack_ctl._y:=0]
+	    738011 t.fifo_in1.fifo_element[1].inack_ctl._y : 0  [by t.fifo_in1.fifo_element[2].in.r:=1]
+	    738013 t.fifo_in1.fifo_element[1].in.a : 1  [by t.fifo_in1.fifo_element[1].inack_ctl._y:=0]
+	    738146 t.fifo_in1.fifo_element[0]._out_a_B : 0  [by t.fifo_in1.fifo_element[1].in.a:=1]
+	    738367 t.fifo_in1.fifo_element[1]._en : 0  [by t.fifo_in1.fifo_element[1].in.a:=1]
+	    738784 t.fifo_in1.fifo_element[3].buf_func._y : 0  [by t.fifo_in1.fifo_element[3].in.r:=1]
+	    738785 t._out1.r : 1  [by t.fifo_in1.fifo_element[3].buf_func._y:=0]
+	    738789 t.arb.arbiter._y1 : 0  [by t._out1.r:=1]
+	    739331 t.fifo_in1.fifo_element[3].inack_ctl._y : 0  [by t._out1.r:=1]
+	    739332 t.fifo_in1.fifo_element[3].in.a : 1  [by t.fifo_in1.fifo_element[3].inack_ctl._y:=0]
+	    739411 t.fifo_in1.fifo_element[2]._out_a_B : 0  [by t.fifo_in1.fifo_element[3].in.a:=1]
+	    744385 t.fifo_in1.fifo_element[0]._en : 0  [by t.in1.a:=1]
+	    744410 t.fifo_in1.fifo_element[1]._out_a_B : 0  [by t.fifo_in1.fifo_element[2].in.a:=1]
+	    744498 t.fifo_in1.fifo_element[1].buf_func._y : 1  [by t.fifo_in1.fifo_element[1]._out_a_B:=0]
+	    745442 t.fifo_in2.fifo_element[1].inack_ctl._y : 1  [by t.fifo_in2.fifo_element[1].in.r:=0]
+	    746818 t.fifo_in1.fifo_element[0].buf_func._y : 1  [by t.fifo_in1.fifo_element[0]._en:=0]
+	    746877 t.fifo_in1.fifo_element[1].in.r : 0  [by t.fifo_in1.fifo_element[0].buf_func._y:=1]
+	    746907 t.fifo_in1.fifo_element[1].inack_ctl._y : 1  [by t.fifo_in1.fifo_element[1].in.r:=0]
+	    748374 t.fifo_in1.fifo_element[1].in.a : 0  [by t.fifo_in1.fifo_element[1].inack_ctl._y:=1]
+	    751710 t.fifo_in1.fifo_element[3]._en : 0  [by t.fifo_in1.fifo_element[3].in.a:=1]
+	    752280 t.fifo_in1.fifo_element[2].in.r : 0  [by t.fifo_in1.fifo_element[1].buf_func._y:=1]
+	    753555 t.fifo_in1.fifo_element[2]._en : 0  [by t.fifo_in1.fifo_element[2].in.a:=1]
+	    754240 t.fifo_in1.fifo_element[2].buf_func._y : 1  [by t.fifo_in1.fifo_element[2]._en:=0]
+	    754367 t.fifo_in1.fifo_element[3].in.r : 0  [by t.fifo_in1.fifo_element[2].buf_func._y:=1]
+	    754536 t.fifo_in1.fifo_element[3].inack_ctl._y : 1  [by t.fifo_in1.fifo_element[3].in.r:=0]
+	    754579 t.fifo_in1.fifo_element[3].in.a : 0  [by t.fifo_in1.fifo_element[3].inack_ctl._y:=1]
+	    754591 t.fifo_in1.fifo_element[2]._out_a_B : 1  [by t.fifo_in1.fifo_element[3].in.a:=0]
+	    756364 t.fifo_in2.fifo_element[2].buf_func._y : 0  [by t.fifo_in2.fifo_element[2].in.r:=1]
+	    757643 t.fifo_in2.fifo_element[3].in.r : 1  [by t.fifo_in2.fifo_element[2].buf_func._y:=0]
+	    757646 t.fifo_in2.fifo_element[2].inack_ctl._y : 0  [by t.fifo_in2.fifo_element[3].in.r:=1]
+	    757684 t.fifo_in2.fifo_element[2].in.a : 1  [by t.fifo_in2.fifo_element[2].inack_ctl._y:=0]
+	    757685 t.fifo_in2.fifo_element[2]._en : 0  [by t.fifo_in2.fifo_element[2].in.a:=1]
+	    757876 t.fifo_in2.fifo_element[3].buf_func._y : 0  [by t.fifo_in2.fifo_element[3].in.r:=1]
+	    757968 t._out2.r : 1  [by t.fifo_in2.fifo_element[3].buf_func._y:=0]
+	    760695 t.fifo_in2.fifo_element[3].inack_ctl._y : 0  [by t._out2.r:=1]
+	    760697 t.fifo_in2.fifo_element[3].in.a : 1  [by t.fifo_in2.fifo_element[3].inack_ctl._y:=0]
+	    760698 t.fifo_in2.fifo_element[3]._en : 0  [by t.fifo_in2.fifo_element[3].in.a:=1]
+	    762198 t.fifo_in2.fifo_element[2]._out_a_B : 0  [by t.fifo_in2.fifo_element[3].in.a:=1]
+	    762200 t.fifo_in2.fifo_element[2].buf_func._y : 1  [by t.fifo_in2.fifo_element[2]._out_a_B:=0]
+	    762218 t.fifo_in2.fifo_element[3].in.r : 0  [by t.fifo_in2.fifo_element[2].buf_func._y:=1]
+	    762337 t.fifo_in2.fifo_element[3].inack_ctl._y : 1  [by t.fifo_in2.fifo_element[3].in.r:=0]
+	    768057 t.fifo_in2.fifo_element[3].in.a : 0  [by t.fifo_in2.fifo_element[3].inack_ctl._y:=1]
+	    768065 t.fifo_in2.fifo_element[2]._out_a_B : 1  [by t.fifo_in2.fifo_element[3].in.a:=0]
+	    770270 t.fifo_in1.fifo_element[2].inack_ctl._y : 1  [by t.fifo_in1.fifo_element[2]._en:=0]
+	    770324 t.fifo_in1.fifo_element[2].in.a : 0  [by t.fifo_in1.fifo_element[2].inack_ctl._y:=1]
+	    770329 t.fifo_in1.fifo_element[1]._out_a_B : 1  [by t.fifo_in1.fifo_element[2].in.a:=0]
+	    770436 t.fifo_in2.fifo_element[1]._out_a_B : 0  [by t.fifo_in2.fifo_element[2].in.a:=1]
+	    771503 t.fifo_in2.fifo_element[1].buf_func._y : 1  [by t.fifo_in2.fifo_element[1]._out_a_B:=0]
+	    771504 t.fifo_in2.fifo_element[2].in.r : 0  [by t.fifo_in2.fifo_element[1].buf_func._y:=1]
+	    771642 t.fifo_in2.fifo_element[2].inack_ctl._y : 1  [by t.fifo_in2.fifo_element[2].in.r:=0]
+	    771643 t.fifo_in2.fifo_element[2].in.a : 0  [by t.fifo_in2.fifo_element[2].inack_ctl._y:=1]
+	    771664 t.fifo_in1.fifo_element[1]._en : 1  [by t.fifo_in1.fifo_element[2].in.r:=0]
+	    771707 t.fifo_in2.fifo_element[2]._en : 1  [by t.fifo_in2.fifo_element[2].in.a:=0]
+	    771766 t.fifo_in2.fifo_element[1]._out_a_B : 1  [by t.fifo_in2.fifo_element[2].in.a:=0]
+	    773769 t.fifo_in2.fifo_element[1].in.a : 0  [by t.fifo_in2.fifo_element[1].inack_ctl._y:=1]
+	    773771 t.fifo_in2.fifo_element[1]._en : 1  [by t.fifo_in2.fifo_element[1].in.a:=0]
+	    773806 t.fifo_in2.fifo_element[0]._out_a_B : 1  [by t.fifo_in2.fifo_element[1].in.a:=0]
+	    784352 t.arb._y1_arb : 1  [by t.arb.arbiter._y1:=0]
+	    784495 t.arb.or_cell._y : 0  [by t.arb._y1_arb:=1]
+	    784546 t.out.r : 1  [by t.arb.or_cell._y:=0]
+	    807878 t.fifo_in1.fifo_element[0]._out_a_B : 1  [by t.fifo_in1.fifo_element[1].in.a:=0]
+	    820862 t.fifo_in1.fifo_element[2]._en : 1  [by t.fifo_in1.fifo_element[2].in.a:=0]
+----------------------------------------------------------------------------------------------------
+[4] 3 bit processed by the arbiter
+	    820862 t.out.a : 1
+	    821304 t.arb.ack_cell1._y : 0  [by t.out.a:=1]
+	    821315 t._out1.a : 1  [by t.arb.ack_cell1._y:=0]
+	    821316 t.fifo_in1.fifo_element[3]._out_a_B : 0  [by t._out1.a:=1]
+	    821325 t.fifo_in1.fifo_element[3].buf_func._y : 1  [by t.fifo_in1.fifo_element[3]._out_a_B:=0]
+	    821350 t._out1.r : 0  [by t.fifo_in1.fifo_element[3].buf_func._y:=1]
+	    824871 t.fifo_in1.fifo_element[3]._en : 1  [by t._out1.r:=0]
+	    831603 t.arb.arbiter._y1 : 1  [by t._out1.r:=0]
+	    831748 t.arb.arbiter._y2 : 0  [by t.arb.arbiter._y1:=1]
+	    847771 t.arb._y1_arb : 0  [by t.arb.arbiter._y1:=1]
+	    848001 t.arb.or_cell._y : 1  [by t.arb._y1_arb:=0]
+	    848692 t.out.r : 0  [by t.arb.or_cell._y:=1]
+	    848692 t.out.a : 0
+	    848706 t.arb.ack_cell1._y : 1  [by t.out.a:=0]
+	    850249 t._out1.a : 0  [by t.arb.ack_cell1._y:=1]
+	    851860 t.arb._y2_arb : 1  [by t._out1.a:=0]
+	    851871 t.arb.or_cell._y : 0  [by t.arb._y2_arb:=1]
+	    851872 t.out.r : 1  [by t.arb.or_cell._y:=0]
+	    867761 t.fifo_in1.fifo_element[3]._out_a_B : 1  [by t._out1.a:=0]
+----------------------------------------------------------------------------------------------------
+[5] 4 bit processed by the arbiter

test/unit_tests/arbiter_handshake_adv/run/test.prs

@@ -0,0 +1,606 @@
+= "GND" "GND"
+= "Vdd" "Vdd"
+= "Reset" "Reset"
+"t.fifo_in2.reset_bufarray.buf1.a"->"t.fifo_in2.reset_bufarray.buf1._y"-
+~("t.fifo_in2.reset_bufarray.buf1.a")->"t.fifo_in2.reset_bufarray.buf1._y"+
+"t.fifo_in2.reset_bufarray.buf1._y"->"t.fifo_in2.reset_bufarray.buf1.y"-
+~("t.fifo_in2.reset_bufarray.buf1._y")->"t.fifo_in2.reset_bufarray.buf1.y"+
+= "t.fifo_in2.reset_bufarray.supply.vdd" "t.fifo_in2.reset_bufarray.buf1.vdd"
+= "t.fifo_in2.reset_bufarray.supply.vss" "t.fifo_in2.reset_bufarray.buf1.vss"
+= "t.fifo_in2.reset_bufarray.out[0]" "t.fifo_in2.reset_bufarray.out[3]"
+= "t.fifo_in2.reset_bufarray.out[0]" "t.fifo_in2.reset_bufarray.out[2]"
+= "t.fifo_in2.reset_bufarray.out[0]" "t.fifo_in2.reset_bufarray.out[1]"
+= "t.fifo_in2.reset_bufarray.out[0]" "t.fifo_in2.reset_bufarray.buf1.y"
+= "t.fifo_in2.reset_bufarray.in" "t.fifo_in2.reset_bufarray.buf1.a"
+"t.fifo_in2.reset_buf.a"->"t.fifo_in2.reset_buf._y"-
+~("t.fifo_in2.reset_buf.a")->"t.fifo_in2.reset_buf._y"+
+"t.fifo_in2.reset_buf._y"->"t.fifo_in2.reset_buf.y"-
+~("t.fifo_in2.reset_buf._y")->"t.fifo_in2.reset_buf.y"+
+= "t.fifo_in2.reset_B" "t.fifo_in2.reset_buf.a"
+= "t.fifo_in2.supply.vss" "t.fifo_in2.fifo_element[3].supply.vss"
+= "t.fifo_in2.supply.vdd" "t.fifo_in2.fifo_element[3].supply.vdd"
+= "t.fifo_in2.supply.vss" "t.fifo_in2.fifo_element[2].supply.vss"
+= "t.fifo_in2.supply.vdd" "t.fifo_in2.fifo_element[2].supply.vdd"
+= "t.fifo_in2.supply.vss" "t.fifo_in2.fifo_element[1].supply.vss"
+= "t.fifo_in2.supply.vdd" "t.fifo_in2.fifo_element[1].supply.vdd"
+= "t.fifo_in2.supply.vss" "t.fifo_in2.fifo_element[0].supply.vss"
+= "t.fifo_in2.supply.vdd" "t.fifo_in2.fifo_element[0].supply.vdd"
+= "t.fifo_in2.supply.vdd" "t.fifo_in2.reset_buf.vdd"
+= "t.fifo_in2.supply.vss" "t.fifo_in2.reset_buf.vss"
+= "t.fifo_in2._reset_BX" "t.fifo_in2.reset_bufarray.in"
+= "t.fifo_in2._reset_BX" "t.fifo_in2.reset_buf.y"
+"t.fifo_in2.fifo_element[0].reset_buf.a"->"t.fifo_in2.fifo_element[0].reset_buf._y"-
+~("t.fifo_in2.fifo_element[0].reset_buf.a")->"t.fifo_in2.fifo_element[0].reset_buf._y"+
+"t.fifo_in2.fifo_element[0].reset_buf._y"->"t.fifo_in2.fifo_element[0].reset_buf.y"-
+~("t.fifo_in2.fifo_element[0].reset_buf._y")->"t.fifo_in2.fifo_element[0].reset_buf.y"+
+"t.fifo_in2.fifo_element[0].inv_outa.a"->"t.fifo_in2.fifo_element[0].inv_outa.y"-
+~("t.fifo_in2.fifo_element[0].inv_outa.a")->"t.fifo_in2.fifo_element[0].inv_outa.y"+
+~"t.fifo_in2.fifo_element[0].inack_ctl.c1"&~"t.fifo_in2.fifo_element[0].inack_ctl.c2"|~"t.fifo_in2.fifo_element[0].inack_ctl.pr_B"->"t.fifo_in2.fifo_element[0].inack_ctl._y"+
+"t.fifo_in2.fifo_element[0].inack_ctl.c1"&"t.fifo_in2.fifo_element[0].inack_ctl.c2"&"t.fifo_in2.fifo_element[0].inack_ctl.n1"&"t.fifo_in2.fifo_element[0].inack_ctl.sr_B"->"t.fifo_in2.fifo_element[0].inack_ctl._y"-
+"t.fifo_in2.fifo_element[0].inack_ctl._y"->"t.fifo_in2.fifo_element[0].inack_ctl.y"-
+~("t.fifo_in2.fifo_element[0].inack_ctl._y")->"t.fifo_in2.fifo_element[0].inack_ctl.y"+
+~"t.fifo_in2.fifo_element[0].buf_func.c1"&~"t.fifo_in2.fifo_element[0].buf_func.c2"|~"t.fifo_in2.fifo_element[0].buf_func.pr_B"->"t.fifo_in2.fifo_element[0].buf_func._y"+
+"t.fifo_in2.fifo_element[0].buf_func.c1"&"t.fifo_in2.fifo_element[0].buf_func.c2"&"t.fifo_in2.fifo_element[0].buf_func.n1"&"t.fifo_in2.fifo_element[0].buf_func.sr_B"->"t.fifo_in2.fifo_element[0].buf_func._y"-
+"t.fifo_in2.fifo_element[0].buf_func._y"->"t.fifo_in2.fifo_element[0].buf_func.y"-
+~("t.fifo_in2.fifo_element[0].buf_func._y")->"t.fifo_in2.fifo_element[0].buf_func.y"+
+= "t.fifo_in2.fifo_element[0].reset_B" "t.fifo_in2.fifo_element[0].reset_buf.a"
+= "t.fifo_in2.fifo_element[0].supply.vdd" "t.fifo_in2.fifo_element[0].reset_buf.vdd"
+= "t.fifo_in2.fifo_element[0].supply.vdd" "t.fifo_in2.fifo_element[0].buf_func.vdd"
+= "t.fifo_in2.fifo_element[0].supply.vdd" "t.fifo_in2.fifo_element[0].inv_outa.vdd"
+= "t.fifo_in2.fifo_element[0].supply.vdd" "t.fifo_in2.fifo_element[0].en_ctl.vdd"
+= "t.fifo_in2.fifo_element[0].supply.vdd" "t.fifo_in2.fifo_element[0].inack_ctl.vdd"
+= "t.fifo_in2.fifo_element[0].supply.vss" "t.fifo_in2.fifo_element[0].reset_buf.vss"
+= "t.fifo_in2.fifo_element[0].supply.vss" "t.fifo_in2.fifo_element[0].buf_func.vss"
+= "t.fifo_in2.fifo_element[0].supply.vss" "t.fifo_in2.fifo_element[0].inv_outa.vss"
+= "t.fifo_in2.fifo_element[0].supply.vss" "t.fifo_in2.fifo_element[0].en_ctl.vss"
+= "t.fifo_in2.fifo_element[0].supply.vss" "t.fifo_in2.fifo_element[0].inack_ctl.vss"
+= "t.fifo_in2.fifo_element[0]._reset_BX" "t.fifo_in2.fifo_element[0].reset_buf.y"
+= "t.fifo_in2.fifo_element[0]._reset_BX" "t.fifo_in2.fifo_element[0].buf_func.sr_B"
+= "t.fifo_in2.fifo_element[0]._reset_BX" "t.fifo_in2.fifo_element[0].buf_func.pr_B"
+= "t.fifo_in2.fifo_element[0]._reset_BX" "t.fifo_in2.fifo_element[0].inack_ctl.sr_B"
+= "t.fifo_in2.fifo_element[0]._reset_BX" "t.fifo_in2.fifo_element[0].inack_ctl.pr_B"
+= "t.fifo_in2.fifo_element[0]._en" "t.fifo_in2.fifo_element[0].buf_func.c1"
+= "t.fifo_in2.fifo_element[0]._en" "t.fifo_in2.fifo_element[0].en_ctl.y"
+= "t.fifo_in2.fifo_element[0]._en" "t.fifo_in2.fifo_element[0].inack_ctl.c1"
+~"t.fifo_in2.fifo_element[0].en_ctl.p1"&~"t.fifo_in2.fifo_element[0].en_ctl.c1"->"t.fifo_in2.fifo_element[0].en_ctl.y"+
+"t.fifo_in2.fifo_element[0].en_ctl.c1"->"t.fifo_in2.fifo_element[0].en_ctl.y"-
+= "t.fifo_in2.fifo_element[0]._out_a_B" "t.fifo_in2.fifo_element[0].buf_func.c2"
+= "t.fifo_in2.fifo_element[0]._out_a_B" "t.fifo_in2.fifo_element[0].inv_outa.y"
+= "t.fifo_in2.fifo_element[0].in.d.d[0]" "t.fifo_in2.fifo_element[0].in.r"
+= "t.fifo_in2.fifo_element[0].in.a" "t.fifo_in2.fifo_element[0].en_ctl.c1"
+= "t.fifo_in2.fifo_element[0].in.a" "t.fifo_in2.fifo_element[0].inack_ctl.y"
+= "t.fifo_in2.fifo_element[0].in.d.d[0]" "t.fifo_in2.fifo_element[0].buf_func.n1"
+= "t.fifo_in2.fifo_element[0].in.d.d[0]" "t.fifo_in2.fifo_element[0].inack_ctl.c2"
+= "t.fifo_in2.fifo_element[0].in.d.d[0]" "t.fifo_in2.fifo_element[0].in.r"
+= "t.fifo_in2.fifo_element[0].out.d.d[0]" "t.fifo_in2.fifo_element[0].out.r"
+= "t.fifo_in2.fifo_element[0].out.a" "t.fifo_in2.fifo_element[0].inv_outa.a"
+= "t.fifo_in2.fifo_element[0].out.d.d[0]" "t.fifo_in2.fifo_element[0].buf_func.y"
+= "t.fifo_in2.fifo_element[0].out.d.d[0]" "t.fifo_in2.fifo_element[0].en_ctl.p1"
+= "t.fifo_in2.fifo_element[0].out.d.d[0]" "t.fifo_in2.fifo_element[0].inack_ctl.n1"
+= "t.fifo_in2.fifo_element[0].out.d.d[0]" "t.fifo_in2.fifo_element[0].out.r"
+"t.fifo_in2.fifo_element[1].reset_buf.a"->"t.fifo_in2.fifo_element[1].reset_buf._y"-
+~("t.fifo_in2.fifo_element[1].reset_buf.a")->"t.fifo_in2.fifo_element[1].reset_buf._y"+
+"t.fifo_in2.fifo_element[1].reset_buf._y"->"t.fifo_in2.fifo_element[1].reset_buf.y"-
+~("t.fifo_in2.fifo_element[1].reset_buf._y")->"t.fifo_in2.fifo_element[1].reset_buf.y"+
+"t.fifo_in2.fifo_element[1].inv_outa.a"->"t.fifo_in2.fifo_element[1].inv_outa.y"-
+~("t.fifo_in2.fifo_element[1].inv_outa.a")->"t.fifo_in2.fifo_element[1].inv_outa.y"+
+~"t.fifo_in2.fifo_element[1].inack_ctl.c1"&~"t.fifo_in2.fifo_element[1].inack_ctl.c2"|~"t.fifo_in2.fifo_element[1].inack_ctl.pr_B"->"t.fifo_in2.fifo_element[1].inack_ctl._y"+
+"t.fifo_in2.fifo_element[1].inack_ctl.c1"&"t.fifo_in2.fifo_element[1].inack_ctl.c2"&"t.fifo_in2.fifo_element[1].inack_ctl.n1"&"t.fifo_in2.fifo_element[1].inack_ctl.sr_B"->"t.fifo_in2.fifo_element[1].inack_ctl._y"-
+"t.fifo_in2.fifo_element[1].inack_ctl._y"->"t.fifo_in2.fifo_element[1].inack_ctl.y"-
+~("t.fifo_in2.fifo_element[1].inack_ctl._y")->"t.fifo_in2.fifo_element[1].inack_ctl.y"+
+~"t.fifo_in2.fifo_element[1].buf_func.c1"&~"t.fifo_in2.fifo_element[1].buf_func.c2"|~"t.fifo_in2.fifo_element[1].buf_func.pr_B"->"t.fifo_in2.fifo_element[1].buf_func._y"+
+"t.fifo_in2.fifo_element[1].buf_func.c1"&"t.fifo_in2.fifo_element[1].buf_func.c2"&"t.fifo_in2.fifo_element[1].buf_func.n1"&"t.fifo_in2.fifo_element[1].buf_func.sr_B"->"t.fifo_in2.fifo_element[1].buf_func._y"-
+"t.fifo_in2.fifo_element[1].buf_func._y"->"t.fifo_in2.fifo_element[1].buf_func.y"-
+~("t.fifo_in2.fifo_element[1].buf_func._y")->"t.fifo_in2.fifo_element[1].buf_func.y"+
+= "t.fifo_in2.fifo_element[1].reset_B" "t.fifo_in2.fifo_element[1].reset_buf.a"
+= "t.fifo_in2.fifo_element[1].supply.vdd" "t.fifo_in2.fifo_element[1].reset_buf.vdd"
+= "t.fifo_in2.fifo_element[1].supply.vdd" "t.fifo_in2.fifo_element[1].buf_func.vdd"
+= "t.fifo_in2.fifo_element[1].supply.vdd" "t.fifo_in2.fifo_element[1].inv_outa.vdd"
+= "t.fifo_in2.fifo_element[1].supply.vdd" "t.fifo_in2.fifo_element[1].en_ctl.vdd"
+= "t.fifo_in2.fifo_element[1].supply.vdd" "t.fifo_in2.fifo_element[1].inack_ctl.vdd"
+= "t.fifo_in2.fifo_element[1].supply.vss" "t.fifo_in2.fifo_element[1].reset_buf.vss"
+= "t.fifo_in2.fifo_element[1].supply.vss" "t.fifo_in2.fifo_element[1].buf_func.vss"
+= "t.fifo_in2.fifo_element[1].supply.vss" "t.fifo_in2.fifo_element[1].inv_outa.vss"
+= "t.fifo_in2.fifo_element[1].supply.vss" "t.fifo_in2.fifo_element[1].en_ctl.vss"
+= "t.fifo_in2.fifo_element[1].supply.vss" "t.fifo_in2.fifo_element[1].inack_ctl.vss"
+= "t.fifo_in2.fifo_element[1]._reset_BX" "t.fifo_in2.fifo_element[1].reset_buf.y"
+= "t.fifo_in2.fifo_element[1]._reset_BX" "t.fifo_in2.fifo_element[1].buf_func.sr_B"
+= "t.fifo_in2.fifo_element[1]._reset_BX" "t.fifo_in2.fifo_element[1].buf_func.pr_B"
+= "t.fifo_in2.fifo_element[1]._reset_BX" "t.fifo_in2.fifo_element[1].inack_ctl.sr_B"
+= "t.fifo_in2.fifo_element[1]._reset_BX" "t.fifo_in2.fifo_element[1].inack_ctl.pr_B"
+= "t.fifo_in2.fifo_element[1]._en" "t.fifo_in2.fifo_element[1].buf_func.c1"
+= "t.fifo_in2.fifo_element[1]._en" "t.fifo_in2.fifo_element[1].en_ctl.y"
+= "t.fifo_in2.fifo_element[1]._en" "t.fifo_in2.fifo_element[1].inack_ctl.c1"
+~"t.fifo_in2.fifo_element[1].en_ctl.p1"&~"t.fifo_in2.fifo_element[1].en_ctl.c1"->"t.fifo_in2.fifo_element[1].en_ctl.y"+
+"t.fifo_in2.fifo_element[1].en_ctl.c1"->"t.fifo_in2.fifo_element[1].en_ctl.y"-
+= "t.fifo_in2.fifo_element[1]._out_a_B" "t.fifo_in2.fifo_element[1].buf_func.c2"
+= "t.fifo_in2.fifo_element[1]._out_a_B" "t.fifo_in2.fifo_element[1].inv_outa.y"
+= "t.fifo_in2.fifo_element[1].in.d.d[0]" "t.fifo_in2.fifo_element[1].in.r"
+= "t.fifo_in2.fifo_element[1].in.a" "t.fifo_in2.fifo_element[1].en_ctl.c1"
+= "t.fifo_in2.fifo_element[1].in.a" "t.fifo_in2.fifo_element[1].inack_ctl.y"
+= "t.fifo_in2.fifo_element[1].in.d.d[0]" "t.fifo_in2.fifo_element[1].buf_func.n1"
+= "t.fifo_in2.fifo_element[1].in.d.d[0]" "t.fifo_in2.fifo_element[1].inack_ctl.c2"
+= "t.fifo_in2.fifo_element[1].in.d.d[0]" "t.fifo_in2.fifo_element[1].in.r"
+= "t.fifo_in2.fifo_element[1].out.d.d[0]" "t.fifo_in2.fifo_element[1].out.r"
+= "t.fifo_in2.fifo_element[1].out.a" "t.fifo_in2.fifo_element[1].inv_outa.a"
+= "t.fifo_in2.fifo_element[1].out.d.d[0]" "t.fifo_in2.fifo_element[1].buf_func.y"
+= "t.fifo_in2.fifo_element[1].out.d.d[0]" "t.fifo_in2.fifo_element[1].en_ctl.p1"
+= "t.fifo_in2.fifo_element[1].out.d.d[0]" "t.fifo_in2.fifo_element[1].inack_ctl.n1"
+= "t.fifo_in2.fifo_element[1].out.d.d[0]" "t.fifo_in2.fifo_element[1].out.r"
+"t.fifo_in2.fifo_element[2].reset_buf.a"->"t.fifo_in2.fifo_element[2].reset_buf._y"-
+~("t.fifo_in2.fifo_element[2].reset_buf.a")->"t.fifo_in2.fifo_element[2].reset_buf._y"+
+"t.fifo_in2.fifo_element[2].reset_buf._y"->"t.fifo_in2.fifo_element[2].reset_buf.y"-
+~("t.fifo_in2.fifo_element[2].reset_buf._y")->"t.fifo_in2.fifo_element[2].reset_buf.y"+
+"t.fifo_in2.fifo_element[2].inv_outa.a"->"t.fifo_in2.fifo_element[2].inv_outa.y"-
+~("t.fifo_in2.fifo_element[2].inv_outa.a")->"t.fifo_in2.fifo_element[2].inv_outa.y"+
+~"t.fifo_in2.fifo_element[2].inack_ctl.c1"&~"t.fifo_in2.fifo_element[2].inack_ctl.c2"|~"t.fifo_in2.fifo_element[2].inack_ctl.pr_B"->"t.fifo_in2.fifo_element[2].inack_ctl._y"+
+"t.fifo_in2.fifo_element[2].inack_ctl.c1"&"t.fifo_in2.fifo_element[2].inack_ctl.c2"&"t.fifo_in2.fifo_element[2].inack_ctl.n1"&"t.fifo_in2.fifo_element[2].inack_ctl.sr_B"->"t.fifo_in2.fifo_element[2].inack_ctl._y"-
+"t.fifo_in2.fifo_element[2].inack_ctl._y"->"t.fifo_in2.fifo_element[2].inack_ctl.y"-
+~("t.fifo_in2.fifo_element[2].inack_ctl._y")->"t.fifo_in2.fifo_element[2].inack_ctl.y"+
+~"t.fifo_in2.fifo_element[2].buf_func.c1"&~"t.fifo_in2.fifo_element[2].buf_func.c2"|~"t.fifo_in2.fifo_element[2].buf_func.pr_B"->"t.fifo_in2.fifo_element[2].buf_func._y"+
+"t.fifo_in2.fifo_element[2].buf_func.c1"&"t.fifo_in2.fifo_element[2].buf_func.c2"&"t.fifo_in2.fifo_element[2].buf_func.n1"&"t.fifo_in2.fifo_element[2].buf_func.sr_B"->"t.fifo_in2.fifo_element[2].buf_func._y"-
+"t.fifo_in2.fifo_element[2].buf_func._y"->"t.fifo_in2.fifo_element[2].buf_func.y"-
+~("t.fifo_in2.fifo_element[2].buf_func._y")->"t.fifo_in2.fifo_element[2].buf_func.y"+
+= "t.fifo_in2.fifo_element[2].reset_B" "t.fifo_in2.fifo_element[2].reset_buf.a"
+= "t.fifo_in2.fifo_element[2].supply.vdd" "t.fifo_in2.fifo_element[2].reset_buf.vdd"
+= "t.fifo_in2.fifo_element[2].supply.vdd" "t.fifo_in2.fifo_element[2].buf_func.vdd"
+= "t.fifo_in2.fifo_element[2].supply.vdd" "t.fifo_in2.fifo_element[2].inv_outa.vdd"
+= "t.fifo_in2.fifo_element[2].supply.vdd" "t.fifo_in2.fifo_element[2].en_ctl.vdd"
+= "t.fifo_in2.fifo_element[2].supply.vdd" "t.fifo_in2.fifo_element[2].inack_ctl.vdd"
+= "t.fifo_in2.fifo_element[2].supply.vss" "t.fifo_in2.fifo_element[2].reset_buf.vss"
+= "t.fifo_in2.fifo_element[2].supply.vss" "t.fifo_in2.fifo_element[2].buf_func.vss"
+= "t.fifo_in2.fifo_element[2].supply.vss" "t.fifo_in2.fifo_element[2].inv_outa.vss"
+= "t.fifo_in2.fifo_element[2].supply.vss" "t.fifo_in2.fifo_element[2].en_ctl.vss"
+= "t.fifo_in2.fifo_element[2].supply.vss" "t.fifo_in2.fifo_element[2].inack_ctl.vss"
+= "t.fifo_in2.fifo_element[2]._reset_BX" "t.fifo_in2.fifo_element[2].reset_buf.y"
+= "t.fifo_in2.fifo_element[2]._reset_BX" "t.fifo_in2.fifo_element[2].buf_func.sr_B"
+= "t.fifo_in2.fifo_element[2]._reset_BX" "t.fifo_in2.fifo_element[2].buf_func.pr_B"
+= "t.fifo_in2.fifo_element[2]._reset_BX" "t.fifo_in2.fifo_element[2].inack_ctl.sr_B"
+= "t.fifo_in2.fifo_element[2]._reset_BX" "t.fifo_in2.fifo_element[2].inack_ctl.pr_B"
+= "t.fifo_in2.fifo_element[2]._en" "t.fifo_in2.fifo_element[2].buf_func.c1"
+= "t.fifo_in2.fifo_element[2]._en" "t.fifo_in2.fifo_element[2].en_ctl.y"
+= "t.fifo_in2.fifo_element[2]._en" "t.fifo_in2.fifo_element[2].inack_ctl.c1"
+~"t.fifo_in2.fifo_element[2].en_ctl.p1"&~"t.fifo_in2.fifo_element[2].en_ctl.c1"->"t.fifo_in2.fifo_element[2].en_ctl.y"+
+"t.fifo_in2.fifo_element[2].en_ctl.c1"->"t.fifo_in2.fifo_element[2].en_ctl.y"-
+= "t.fifo_in2.fifo_element[2]._out_a_B" "t.fifo_in2.fifo_element[2].buf_func.c2"
+= "t.fifo_in2.fifo_element[2]._out_a_B" "t.fifo_in2.fifo_element[2].inv_outa.y"
+= "t.fifo_in2.fifo_element[2].in.d.d[0]" "t.fifo_in2.fifo_element[2].in.r"
+= "t.fifo_in2.fifo_element[2].in.a" "t.fifo_in2.fifo_element[2].en_ctl.c1"
+= "t.fifo_in2.fifo_element[2].in.a" "t.fifo_in2.fifo_element[2].inack_ctl.y"
+= "t.fifo_in2.fifo_element[2].in.d.d[0]" "t.fifo_in2.fifo_element[2].buf_func.n1"
+= "t.fifo_in2.fifo_element[2].in.d.d[0]" "t.fifo_in2.fifo_element[2].inack_ctl.c2"
+= "t.fifo_in2.fifo_element[2].in.d.d[0]" "t.fifo_in2.fifo_element[2].in.r"
+= "t.fifo_in2.fifo_element[2].out.d.d[0]" "t.fifo_in2.fifo_element[2].out.r"
+= "t.fifo_in2.fifo_element[2].out.a" "t.fifo_in2.fifo_element[2].inv_outa.a"
+= "t.fifo_in2.fifo_element[2].out.d.d[0]" "t.fifo_in2.fifo_element[2].buf_func.y"
+= "t.fifo_in2.fifo_element[2].out.d.d[0]" "t.fifo_in2.fifo_element[2].en_ctl.p1"
+= "t.fifo_in2.fifo_element[2].out.d.d[0]" "t.fifo_in2.fifo_element[2].inack_ctl.n1"
+= "t.fifo_in2.fifo_element[2].out.d.d[0]" "t.fifo_in2.fifo_element[2].out.r"
+"t.fifo_in2.fifo_element[3].reset_buf.a"->"t.fifo_in2.fifo_element[3].reset_buf._y"-
+~("t.fifo_in2.fifo_element[3].reset_buf.a")->"t.fifo_in2.fifo_element[3].reset_buf._y"+
+"t.fifo_in2.fifo_element[3].reset_buf._y"->"t.fifo_in2.fifo_element[3].reset_buf.y"-
+~("t.fifo_in2.fifo_element[3].reset_buf._y")->"t.fifo_in2.fifo_element[3].reset_buf.y"+
+"t.fifo_in2.fifo_element[3].inv_outa.a"->"t.fifo_in2.fifo_element[3].inv_outa.y"-
+~("t.fifo_in2.fifo_element[3].inv_outa.a")->"t.fifo_in2.fifo_element[3].inv_outa.y"+
+~"t.fifo_in2.fifo_element[3].inack_ctl.c1"&~"t.fifo_in2.fifo_element[3].inack_ctl.c2"|~"t.fifo_in2.fifo_element[3].inack_ctl.pr_B"->"t.fifo_in2.fifo_element[3].inack_ctl._y"+
+"t.fifo_in2.fifo_element[3].inack_ctl.c1"&"t.fifo_in2.fifo_element[3].inack_ctl.c2"&"t.fifo_in2.fifo_element[3].inack_ctl.n1"&"t.fifo_in2.fifo_element[3].inack_ctl.sr_B"->"t.fifo_in2.fifo_element[3].inack_ctl._y"-
+"t.fifo_in2.fifo_element[3].inack_ctl._y"->"t.fifo_in2.fifo_element[3].inack_ctl.y"-
+~("t.fifo_in2.fifo_element[3].inack_ctl._y")->"t.fifo_in2.fifo_element[3].inack_ctl.y"+
+~"t.fifo_in2.fifo_element[3].buf_func.c1"&~"t.fifo_in2.fifo_element[3].buf_func.c2"|~"t.fifo_in2.fifo_element[3].buf_func.pr_B"->"t.fifo_in2.fifo_element[3].buf_func._y"+
+"t.fifo_in2.fifo_element[3].buf_func.c1"&"t.fifo_in2.fifo_element[3].buf_func.c2"&"t.fifo_in2.fifo_element[3].buf_func.n1"&"t.fifo_in2.fifo_element[3].buf_func.sr_B"->"t.fifo_in2.fifo_element[3].buf_func._y"-
+"t.fifo_in2.fifo_element[3].buf_func._y"->"t.fifo_in2.fifo_element[3].buf_func.y"-
+~("t.fifo_in2.fifo_element[3].buf_func._y")->"t.fifo_in2.fifo_element[3].buf_func.y"+
+= "t.fifo_in2.fifo_element[3].reset_B" "t.fifo_in2.fifo_element[3].reset_buf.a"
+= "t.fifo_in2.fifo_element[3].supply.vdd" "t.fifo_in2.fifo_element[3].reset_buf.vdd"
+= "t.fifo_in2.fifo_element[3].supply.vdd" "t.fifo_in2.fifo_element[3].buf_func.vdd"
+= "t.fifo_in2.fifo_element[3].supply.vdd" "t.fifo_in2.fifo_element[3].inv_outa.vdd"
+= "t.fifo_in2.fifo_element[3].supply.vdd" "t.fifo_in2.fifo_element[3].en_ctl.vdd"
+= "t.fifo_in2.fifo_element[3].supply.vdd" "t.fifo_in2.fifo_element[3].inack_ctl.vdd"
+= "t.fifo_in2.fifo_element[3].supply.vss" "t.fifo_in2.fifo_element[3].reset_buf.vss"
+= "t.fifo_in2.fifo_element[3].supply.vss" "t.fifo_in2.fifo_element[3].buf_func.vss"
+= "t.fifo_in2.fifo_element[3].supply.vss" "t.fifo_in2.fifo_element[3].inv_outa.vss"
+= "t.fifo_in2.fifo_element[3].supply.vss" "t.fifo_in2.fifo_element[3].en_ctl.vss"
+= "t.fifo_in2.fifo_element[3].supply.vss" "t.fifo_in2.fifo_element[3].inack_ctl.vss"
+= "t.fifo_in2.fifo_element[3]._reset_BX" "t.fifo_in2.fifo_element[3].reset_buf.y"
+= "t.fifo_in2.fifo_element[3]._reset_BX" "t.fifo_in2.fifo_element[3].buf_func.sr_B"
+= "t.fifo_in2.fifo_element[3]._reset_BX" "t.fifo_in2.fifo_element[3].buf_func.pr_B"
+= "t.fifo_in2.fifo_element[3]._reset_BX" "t.fifo_in2.fifo_element[3].inack_ctl.sr_B"
+= "t.fifo_in2.fifo_element[3]._reset_BX" "t.fifo_in2.fifo_element[3].inack_ctl.pr_B"
+= "t.fifo_in2.fifo_element[3]._en" "t.fifo_in2.fifo_element[3].buf_func.c1"
+= "t.fifo_in2.fifo_element[3]._en" "t.fifo_in2.fifo_element[3].en_ctl.y"
+= "t.fifo_in2.fifo_element[3]._en" "t.fifo_in2.fifo_element[3].inack_ctl.c1"
+~"t.fifo_in2.fifo_element[3].en_ctl.p1"&~"t.fifo_in2.fifo_element[3].en_ctl.c1"->"t.fifo_in2.fifo_element[3].en_ctl.y"+
+"t.fifo_in2.fifo_element[3].en_ctl.c1"->"t.fifo_in2.fifo_element[3].en_ctl.y"-
+= "t.fifo_in2.fifo_element[3]._out_a_B" "t.fifo_in2.fifo_element[3].buf_func.c2"
+= "t.fifo_in2.fifo_element[3]._out_a_B" "t.fifo_in2.fifo_element[3].inv_outa.y"
+= "t.fifo_in2.fifo_element[3].in.d.d[0]" "t.fifo_in2.fifo_element[3].in.r"
+= "t.fifo_in2.fifo_element[3].in.a" "t.fifo_in2.fifo_element[3].en_ctl.c1"
+= "t.fifo_in2.fifo_element[3].in.a" "t.fifo_in2.fifo_element[3].inack_ctl.y"
+= "t.fifo_in2.fifo_element[3].in.d.d[0]" "t.fifo_in2.fifo_element[3].buf_func.n1"
+= "t.fifo_in2.fifo_element[3].in.d.d[0]" "t.fifo_in2.fifo_element[3].inack_ctl.c2"
+= "t.fifo_in2.fifo_element[3].in.d.d[0]" "t.fifo_in2.fifo_element[3].in.r"
+= "t.fifo_in2.fifo_element[3].out.d.d[0]" "t.fifo_in2.fifo_element[3].out.r"
+= "t.fifo_in2.fifo_element[3].out.a" "t.fifo_in2.fifo_element[3].inv_outa.a"
+= "t.fifo_in2.fifo_element[3].out.d.d[0]" "t.fifo_in2.fifo_element[3].buf_func.y"
+= "t.fifo_in2.fifo_element[3].out.d.d[0]" "t.fifo_in2.fifo_element[3].en_ctl.p1"
+= "t.fifo_in2.fifo_element[3].out.d.d[0]" "t.fifo_in2.fifo_element[3].inack_ctl.n1"
+= "t.fifo_in2.fifo_element[3].out.d.d[0]" "t.fifo_in2.fifo_element[3].out.r"
+= "t.fifo_in2.fifo_element[3].in.a" "t.fifo_in2.fifo_element[2].out.a"
+= "t.fifo_in2.fifo_element[3].in.d.d[0]" "t.fifo_in2.fifo_element[2].out.r"
+= "t.fifo_in2.fifo_element[3].in.d.d[0]" "t.fifo_in2.fifo_element[2].out.d.d[0]"
+= "t.fifo_in2.fifo_element[3].in.d.d[0]" "t.fifo_in2.fifo_element[3].in.r"
+= "t.fifo_in2.fifo_element[2].in.a" "t.fifo_in2.fifo_element[1].out.a"
+= "t.fifo_in2.fifo_element[2].in.d.d[0]" "t.fifo_in2.fifo_element[1].out.r"
+= "t.fifo_in2.fifo_element[2].in.d.d[0]" "t.fifo_in2.fifo_element[1].out.d.d[0]"
+= "t.fifo_in2.fifo_element[2].in.d.d[0]" "t.fifo_in2.fifo_element[2].in.r"
+= "t.fifo_in2.fifo_element[1].in.a" "t.fifo_in2.fifo_element[0].out.a"
+= "t.fifo_in2.fifo_element[1].in.d.d[0]" "t.fifo_in2.fifo_element[0].out.r"
+= "t.fifo_in2.fifo_element[1].in.d.d[0]" "t.fifo_in2.fifo_element[0].out.d.d[0]"
+= "t.fifo_in2.fifo_element[1].in.d.d[0]" "t.fifo_in2.fifo_element[1].in.r"
+= "t.fifo_in2._reset_BXX[0]" "t.fifo_in2.reset_bufarray.out[0]"
+= "t.fifo_in2._reset_BXX[1]" "t.fifo_in2.reset_bufarray.out[1]"
+= "t.fifo_in2._reset_BXX[2]" "t.fifo_in2.reset_bufarray.out[2]"
+= "t.fifo_in2._reset_BXX[3]" "t.fifo_in2.reset_bufarray.out[3]"
+= "t.fifo_in2._reset_BXX[3]" "t.fifo_in2.fifo_element[2].reset_B"
+= "t.fifo_in2._reset_BXX[3]" "t.fifo_in2._reset_BXX[2]"
+= "t.fifo_in2._reset_BXX[3]" "t.fifo_in2.fifo_element[1].reset_B"
+= "t.fifo_in2._reset_BXX[3]" "t.fifo_in2._reset_BXX[1]"
+= "t.fifo_in2._reset_BXX[3]" "t.fifo_in2.fifo_element[0].reset_B"
+= "t.fifo_in2._reset_BXX[3]" "t.fifo_in2._reset_BXX[0]"
+= "t.fifo_in2._reset_BXX[3]" "t.fifo_in2.fifo_element[3].reset_B"
+= "t.fifo_in2.in.d.d[0]" "t.fifo_in2.in.r"
+= "t.fifo_in2.in.a" "t.fifo_in2.fifo_element[0].in.a"
+= "t.fifo_in2.in.d.d[0]" "t.fifo_in2.fifo_element[0].in.r"
+= "t.fifo_in2.in.d.d[0]" "t.fifo_in2.fifo_element[0].in.d.d[0]"
+= "t.fifo_in2.in.d.d[0]" "t.fifo_in2.in.r"
+= "t.fifo_in2.out.d.d[0]" "t.fifo_in2.out.r"
+= "t.fifo_in2.out.a" "t.fifo_in2.fifo_element[3].out.a"
+= "t.fifo_in2.out.d.d[0]" "t.fifo_in2.fifo_element[3].out.r"
+= "t.fifo_in2.out.d.d[0]" "t.fifo_in2.fifo_element[3].out.d.d[0]"
+= "t.fifo_in2.out.d.d[0]" "t.fifo_in2.out.r"
+= "Reset" "t.fifo_in2.reset_B"
+= "Vdd" "t.fifo_in2.supply.vdd"
+= "GND" "t.fifo_in2.supply.vss"
+= "t._out2.d.d[0]" "t._out2.r"
+= "t._out2.r" "t.arb.in2.r"
+= "t._out2.a" "t.arb.in2.a"
+= "t._out2.d.d[0]" "t.arb.in2.d.d[0]"
+= "t._out2.r" "t.fifo_in2.out.r"
+= "t._out2.a" "t.fifo_in2.out.a"
+= "t._out2.d.d[0]" "t.fifo_in2.out.d.d[0]"
+= "t._out2.d.d[0]" "t._out2.r"
+= "t._out1.d.d[0]" "t._out1.r"
+= "t._out1.r" "t.arb.in1.r"
+= "t._out1.a" "t.arb.in1.a"
+= "t._out1.d.d[0]" "t.arb.in1.d.d[0]"
+= "t._out1.r" "t.fifo_in1.out.r"
+= "t._out1.a" "t.fifo_in1.out.a"
+= "t._out1.d.d[0]" "t.fifo_in1.out.d.d[0]"
+= "t._out1.d.d[0]" "t._out1.r"
+= "t.in1.d.d[0]" "t.in1.r"
+= "t.in1.r" "t.fifo_in1.in.r"
+= "t.in1.a" "t.fifo_in1.in.a"
+= "t.in1.d.d[0]" "t.fifo_in1.in.d.d[0]"
+= "t.in1.d.d[0]" "t.in1.r"
+= "t.arb.in1.d.d[0]" "t.arb.in1.r"
+= "t.arb.in1.a" "t.arb.arbiter.d"
+= "t.arb.in1.a" "t.arb.ack_cell1.y"
+= "t.arb.in1.d.d[0]" "t.arb.arbiter.a"
+= "t.arb.in1.d.d[0]" "t.arb.in1.r"
+~"t.arb.ack_cell1.c1"&~"t.arb.ack_cell1.c2"->"t.arb.ack_cell1._y"+
+"t.arb.ack_cell1.c1"&"t.arb.ack_cell1.c2"->"t.arb.ack_cell1._y"-
+"t.arb.ack_cell1._y"->"t.arb.ack_cell1.y"-
+~("t.arb.ack_cell1._y")->"t.arb.ack_cell1.y"+
+= "t.arb.in2.d.d[0]" "t.arb.in2.r"
+= "t.arb.in2.a" "t.arb.arbiter.c"
+= "t.arb.in2.a" "t.arb.ack_cell2.y"
+= "t.arb.in2.d.d[0]" "t.arb.arbiter.b"
+= "t.arb.in2.d.d[0]" "t.arb.in2.r"
+= "t.arb.supply.vdd" "t.arb.arbiter.vdd"
+= "t.arb.supply.vdd" "t.arb.or_cell.vdd"
+= "t.arb.supply.vdd" "t.arb.ack_cell2.vdd"
+= "t.arb.supply.vdd" "t.arb.ack_cell1.vdd"
+= "t.arb.supply.vss" "t.arb.arbiter.vss"
+= "t.arb.supply.vss" "t.arb.or_cell.vss"
+= "t.arb.supply.vss" "t.arb.ack_cell2.vss"
+= "t.arb.supply.vss" "t.arb.ack_cell1.vss"
+"t.arb.arbiter.a"&"t.arb.arbiter._y2"->"t.arb.arbiter._y1"-
+~"t.arb.arbiter.a"|~"t.arb.arbiter._y2"->"t.arb.arbiter._y1"+
+"t.arb.arbiter.b"&"t.arb.arbiter._y1"->"t.arb.arbiter._y2"-
+~"t.arb.arbiter.b"|~"t.arb.arbiter._y1"->"t.arb.arbiter._y2"+
+"t.arb.arbiter._y1"|"t.arb.arbiter.c"->"t.arb.arbiter.y1"-
+~("t.arb.arbiter._y1"|"t.arb.arbiter.c")->"t.arb.arbiter.y1"+
+"t.arb.arbiter._y2"|"t.arb.arbiter.d"->"t.arb.arbiter.y2"-
+~("t.arb.arbiter._y2"|"t.arb.arbiter.d")->"t.arb.arbiter.y2"+
+mk_excllo("t.arb.arbiter._y1","t.arb.arbiter._y2")
+= "t.arb._y1_arb" "t.arb.arbiter.y1"
+= "t.arb._y1_arb" "t.arb.or_cell.a"
+= "t.arb._y1_arb" "t.arb.ack_cell1.c2"
+~"t.arb.ack_cell2.c1"&~"t.arb.ack_cell2.c2"->"t.arb.ack_cell2._y"+
+"t.arb.ack_cell2.c1"&"t.arb.ack_cell2.c2"->"t.arb.ack_cell2._y"-
+"t.arb.ack_cell2._y"->"t.arb.ack_cell2.y"-
+~("t.arb.ack_cell2._y")->"t.arb.ack_cell2.y"+
+"t.arb.or_cell.a"|"t.arb.or_cell.b"->"t.arb.or_cell._y"-
+~("t.arb.or_cell.a"|"t.arb.or_cell.b")->"t.arb.or_cell._y"+
+"t.arb.or_cell._y"->"t.arb.or_cell.y"-
+~("t.arb.or_cell._y")->"t.arb.or_cell.y"+
+= "t.arb.out.d.d[0]" "t.arb.out.r"
+= "t.arb.out.a" "t.arb.ack_cell2.c1"
+= "t.arb.out.a" "t.arb.ack_cell1.c1"
+= "t.arb.out.d.d[0]" "t.arb.or_cell.y"
+= "t.arb.out.d.d[0]" "t.arb.out.r"
+= "t.arb._y2_arb" "t.arb.arbiter.y2"
+= "t.arb._y2_arb" "t.arb.or_cell.b"
+= "t.arb._y2_arb" "t.arb.ack_cell2.c2"
+= "Vdd" "t.arb.supply.vdd"
+= "GND" "t.arb.supply.vss"
+"t.fifo_in1.reset_bufarray.buf1.a"->"t.fifo_in1.reset_bufarray.buf1._y"-
+~("t.fifo_in1.reset_bufarray.buf1.a")->"t.fifo_in1.reset_bufarray.buf1._y"+
+"t.fifo_in1.reset_bufarray.buf1._y"->"t.fifo_in1.reset_bufarray.buf1.y"-
+~("t.fifo_in1.reset_bufarray.buf1._y")->"t.fifo_in1.reset_bufarray.buf1.y"+
+= "t.fifo_in1.reset_bufarray.supply.vdd" "t.fifo_in1.reset_bufarray.buf1.vdd"
+= "t.fifo_in1.reset_bufarray.supply.vss" "t.fifo_in1.reset_bufarray.buf1.vss"
+= "t.fifo_in1.reset_bufarray.out[0]" "t.fifo_in1.reset_bufarray.out[3]"
+= "t.fifo_in1.reset_bufarray.out[0]" "t.fifo_in1.reset_bufarray.out[2]"
+= "t.fifo_in1.reset_bufarray.out[0]" "t.fifo_in1.reset_bufarray.out[1]"
+= "t.fifo_in1.reset_bufarray.out[0]" "t.fifo_in1.reset_bufarray.buf1.y"
+= "t.fifo_in1.reset_bufarray.in" "t.fifo_in1.reset_bufarray.buf1.a"
+"t.fifo_in1.reset_buf.a"->"t.fifo_in1.reset_buf._y"-
+~("t.fifo_in1.reset_buf.a")->"t.fifo_in1.reset_buf._y"+
+"t.fifo_in1.reset_buf._y"->"t.fifo_in1.reset_buf.y"-
+~("t.fifo_in1.reset_buf._y")->"t.fifo_in1.reset_buf.y"+
+= "t.fifo_in1.reset_B" "t.fifo_in1.reset_buf.a"
+= "t.fifo_in1.supply.vss" "t.fifo_in1.fifo_element[3].supply.vss"
+= "t.fifo_in1.supply.vdd" "t.fifo_in1.fifo_element[3].supply.vdd"
+= "t.fifo_in1.supply.vss" "t.fifo_in1.fifo_element[2].supply.vss"
+= "t.fifo_in1.supply.vdd" "t.fifo_in1.fifo_element[2].supply.vdd"
+= "t.fifo_in1.supply.vss" "t.fifo_in1.fifo_element[1].supply.vss"
+= "t.fifo_in1.supply.vdd" "t.fifo_in1.fifo_element[1].supply.vdd"
+= "t.fifo_in1.supply.vss" "t.fifo_in1.fifo_element[0].supply.vss"
+= "t.fifo_in1.supply.vdd" "t.fifo_in1.fifo_element[0].supply.vdd"
+= "t.fifo_in1.supply.vdd" "t.fifo_in1.reset_buf.vdd"
+= "t.fifo_in1.supply.vss" "t.fifo_in1.reset_buf.vss"
+= "t.fifo_in1._reset_BX" "t.fifo_in1.reset_bufarray.in"
+= "t.fifo_in1._reset_BX" "t.fifo_in1.reset_buf.y"
+"t.fifo_in1.fifo_element[0].reset_buf.a"->"t.fifo_in1.fifo_element[0].reset_buf._y"-
+~("t.fifo_in1.fifo_element[0].reset_buf.a")->"t.fifo_in1.fifo_element[0].reset_buf._y"+
+"t.fifo_in1.fifo_element[0].reset_buf._y"->"t.fifo_in1.fifo_element[0].reset_buf.y"-
+~("t.fifo_in1.fifo_element[0].reset_buf._y")->"t.fifo_in1.fifo_element[0].reset_buf.y"+
+"t.fifo_in1.fifo_element[0].inv_outa.a"->"t.fifo_in1.fifo_element[0].inv_outa.y"-
+~("t.fifo_in1.fifo_element[0].inv_outa.a")->"t.fifo_in1.fifo_element[0].inv_outa.y"+
+~"t.fifo_in1.fifo_element[0].inack_ctl.c1"&~"t.fifo_in1.fifo_element[0].inack_ctl.c2"|~"t.fifo_in1.fifo_element[0].inack_ctl.pr_B"->"t.fifo_in1.fifo_element[0].inack_ctl._y"+
+"t.fifo_in1.fifo_element[0].inack_ctl.c1"&"t.fifo_in1.fifo_element[0].inack_ctl.c2"&"t.fifo_in1.fifo_element[0].inack_ctl.n1"&"t.fifo_in1.fifo_element[0].inack_ctl.sr_B"->"t.fifo_in1.fifo_element[0].inack_ctl._y"-
+"t.fifo_in1.fifo_element[0].inack_ctl._y"->"t.fifo_in1.fifo_element[0].inack_ctl.y"-
+~("t.fifo_in1.fifo_element[0].inack_ctl._y")->"t.fifo_in1.fifo_element[0].inack_ctl.y"+
+~"t.fifo_in1.fifo_element[0].buf_func.c1"&~"t.fifo_in1.fifo_element[0].buf_func.c2"|~"t.fifo_in1.fifo_element[0].buf_func.pr_B"->"t.fifo_in1.fifo_element[0].buf_func._y"+
+"t.fifo_in1.fifo_element[0].buf_func.c1"&"t.fifo_in1.fifo_element[0].buf_func.c2"&"t.fifo_in1.fifo_element[0].buf_func.n1"&"t.fifo_in1.fifo_element[0].buf_func.sr_B"->"t.fifo_in1.fifo_element[0].buf_func._y"-
+"t.fifo_in1.fifo_element[0].buf_func._y"->"t.fifo_in1.fifo_element[0].buf_func.y"-
+~("t.fifo_in1.fifo_element[0].buf_func._y")->"t.fifo_in1.fifo_element[0].buf_func.y"+
+= "t.fifo_in1.fifo_element[0].reset_B" "t.fifo_in1.fifo_element[0].reset_buf.a"
+= "t.fifo_in1.fifo_element[0].supply.vdd" "t.fifo_in1.fifo_element[0].reset_buf.vdd"
+= "t.fifo_in1.fifo_element[0].supply.vdd" "t.fifo_in1.fifo_element[0].buf_func.vdd"
+= "t.fifo_in1.fifo_element[0].supply.vdd" "t.fifo_in1.fifo_element[0].inv_outa.vdd"
+= "t.fifo_in1.fifo_element[0].supply.vdd" "t.fifo_in1.fifo_element[0].en_ctl.vdd"
+= "t.fifo_in1.fifo_element[0].supply.vdd" "t.fifo_in1.fifo_element[0].inack_ctl.vdd"
+= "t.fifo_in1.fifo_element[0].supply.vss" "t.fifo_in1.fifo_element[0].reset_buf.vss"
+= "t.fifo_in1.fifo_element[0].supply.vss" "t.fifo_in1.fifo_element[0].buf_func.vss"
+= "t.fifo_in1.fifo_element[0].supply.vss" "t.fifo_in1.fifo_element[0].inv_outa.vss"
+= "t.fifo_in1.fifo_element[0].supply.vss" "t.fifo_in1.fifo_element[0].en_ctl.vss"
+= "t.fifo_in1.fifo_element[0].supply.vss" "t.fifo_in1.fifo_element[0].inack_ctl.vss"
+= "t.fifo_in1.fifo_element[0]._reset_BX" "t.fifo_in1.fifo_element[0].reset_buf.y"
+= "t.fifo_in1.fifo_element[0]._reset_BX" "t.fifo_in1.fifo_element[0].buf_func.sr_B"
+= "t.fifo_in1.fifo_element[0]._reset_BX" "t.fifo_in1.fifo_element[0].buf_func.pr_B"
+= "t.fifo_in1.fifo_element[0]._reset_BX" "t.fifo_in1.fifo_element[0].inack_ctl.sr_B"
+= "t.fifo_in1.fifo_element[0]._reset_BX" "t.fifo_in1.fifo_element[0].inack_ctl.pr_B"
+= "t.fifo_in1.fifo_element[0]._en" "t.fifo_in1.fifo_element[0].buf_func.c1"
+= "t.fifo_in1.fifo_element[0]._en" "t.fifo_in1.fifo_element[0].en_ctl.y"
+= "t.fifo_in1.fifo_element[0]._en" "t.fifo_in1.fifo_element[0].inack_ctl.c1"
+~"t.fifo_in1.fifo_element[0].en_ctl.p1"&~"t.fifo_in1.fifo_element[0].en_ctl.c1"->"t.fifo_in1.fifo_element[0].en_ctl.y"+
+"t.fifo_in1.fifo_element[0].en_ctl.c1"->"t.fifo_in1.fifo_element[0].en_ctl.y"-
+= "t.fifo_in1.fifo_element[0]._out_a_B" "t.fifo_in1.fifo_element[0].buf_func.c2"
+= "t.fifo_in1.fifo_element[0]._out_a_B" "t.fifo_in1.fifo_element[0].inv_outa.y"
+= "t.fifo_in1.fifo_element[0].in.d.d[0]" "t.fifo_in1.fifo_element[0].in.r"
+= "t.fifo_in1.fifo_element[0].in.a" "t.fifo_in1.fifo_element[0].en_ctl.c1"
+= "t.fifo_in1.fifo_element[0].in.a" "t.fifo_in1.fifo_element[0].inack_ctl.y"
+= "t.fifo_in1.fifo_element[0].in.d.d[0]" "t.fifo_in1.fifo_element[0].buf_func.n1"
+= "t.fifo_in1.fifo_element[0].in.d.d[0]" "t.fifo_in1.fifo_element[0].inack_ctl.c2"
+= "t.fifo_in1.fifo_element[0].in.d.d[0]" "t.fifo_in1.fifo_element[0].in.r"
+= "t.fifo_in1.fifo_element[0].out.d.d[0]" "t.fifo_in1.fifo_element[0].out.r"
+= "t.fifo_in1.fifo_element[0].out.a" "t.fifo_in1.fifo_element[0].inv_outa.a"
+= "t.fifo_in1.fifo_element[0].out.d.d[0]" "t.fifo_in1.fifo_element[0].buf_func.y"
+= "t.fifo_in1.fifo_element[0].out.d.d[0]" "t.fifo_in1.fifo_element[0].en_ctl.p1"
+= "t.fifo_in1.fifo_element[0].out.d.d[0]" "t.fifo_in1.fifo_element[0].inack_ctl.n1"
+= "t.fifo_in1.fifo_element[0].out.d.d[0]" "t.fifo_in1.fifo_element[0].out.r"
+"t.fifo_in1.fifo_element[1].reset_buf.a"->"t.fifo_in1.fifo_element[1].reset_buf._y"-
+~("t.fifo_in1.fifo_element[1].reset_buf.a")->"t.fifo_in1.fifo_element[1].reset_buf._y"+
+"t.fifo_in1.fifo_element[1].reset_buf._y"->"t.fifo_in1.fifo_element[1].reset_buf.y"-
+~("t.fifo_in1.fifo_element[1].reset_buf._y")->"t.fifo_in1.fifo_element[1].reset_buf.y"+
+"t.fifo_in1.fifo_element[1].inv_outa.a"->"t.fifo_in1.fifo_element[1].inv_outa.y"-
+~("t.fifo_in1.fifo_element[1].inv_outa.a")->"t.fifo_in1.fifo_element[1].inv_outa.y"+
+~"t.fifo_in1.fifo_element[1].inack_ctl.c1"&~"t.fifo_in1.fifo_element[1].inack_ctl.c2"|~"t.fifo_in1.fifo_element[1].inack_ctl.pr_B"->"t.fifo_in1.fifo_element[1].inack_ctl._y"+
+"t.fifo_in1.fifo_element[1].inack_ctl.c1"&"t.fifo_in1.fifo_element[1].inack_ctl.c2"&"t.fifo_in1.fifo_element[1].inack_ctl.n1"&"t.fifo_in1.fifo_element[1].inack_ctl.sr_B"->"t.fifo_in1.fifo_element[1].inack_ctl._y"-
+"t.fifo_in1.fifo_element[1].inack_ctl._y"->"t.fifo_in1.fifo_element[1].inack_ctl.y"-
+~("t.fifo_in1.fifo_element[1].inack_ctl._y")->"t.fifo_in1.fifo_element[1].inack_ctl.y"+
+~"t.fifo_in1.fifo_element[1].buf_func.c1"&~"t.fifo_in1.fifo_element[1].buf_func.c2"|~"t.fifo_in1.fifo_element[1].buf_func.pr_B"->"t.fifo_in1.fifo_element[1].buf_func._y"+
+"t.fifo_in1.fifo_element[1].buf_func.c1"&"t.fifo_in1.fifo_element[1].buf_func.c2"&"t.fifo_in1.fifo_element[1].buf_func.n1"&"t.fifo_in1.fifo_element[1].buf_func.sr_B"->"t.fifo_in1.fifo_element[1].buf_func._y"-
+"t.fifo_in1.fifo_element[1].buf_func._y"->"t.fifo_in1.fifo_element[1].buf_func.y"-
+~("t.fifo_in1.fifo_element[1].buf_func._y")->"t.fifo_in1.fifo_element[1].buf_func.y"+
+= "t.fifo_in1.fifo_element[1].reset_B" "t.fifo_in1.fifo_element[1].reset_buf.a"
+= "t.fifo_in1.fifo_element[1].supply.vdd" "t.fifo_in1.fifo_element[1].reset_buf.vdd"
+= "t.fifo_in1.fifo_element[1].supply.vdd" "t.fifo_in1.fifo_element[1].buf_func.vdd"
+= "t.fifo_in1.fifo_element[1].supply.vdd" "t.fifo_in1.fifo_element[1].inv_outa.vdd"
+= "t.fifo_in1.fifo_element[1].supply.vdd" "t.fifo_in1.fifo_element[1].en_ctl.vdd"
+= "t.fifo_in1.fifo_element[1].supply.vdd" "t.fifo_in1.fifo_element[1].inack_ctl.vdd"
+= "t.fifo_in1.fifo_element[1].supply.vss" "t.fifo_in1.fifo_element[1].reset_buf.vss"
+= "t.fifo_in1.fifo_element[1].supply.vss" "t.fifo_in1.fifo_element[1].buf_func.vss"
+= "t.fifo_in1.fifo_element[1].supply.vss" "t.fifo_in1.fifo_element[1].inv_outa.vss"
+= "t.fifo_in1.fifo_element[1].supply.vss" "t.fifo_in1.fifo_element[1].en_ctl.vss"
+= "t.fifo_in1.fifo_element[1].supply.vss" "t.fifo_in1.fifo_element[1].inack_ctl.vss"
+= "t.fifo_in1.fifo_element[1]._reset_BX" "t.fifo_in1.fifo_element[1].reset_buf.y"
+= "t.fifo_in1.fifo_element[1]._reset_BX" "t.fifo_in1.fifo_element[1].buf_func.sr_B"
+= "t.fifo_in1.fifo_element[1]._reset_BX" "t.fifo_in1.fifo_element[1].buf_func.pr_B"
+= "t.fifo_in1.fifo_element[1]._reset_BX" "t.fifo_in1.fifo_element[1].inack_ctl.sr_B"
+= "t.fifo_in1.fifo_element[1]._reset_BX" "t.fifo_in1.fifo_element[1].inack_ctl.pr_B"
+= "t.fifo_in1.fifo_element[1]._en" "t.fifo_in1.fifo_element[1].buf_func.c1"
+= "t.fifo_in1.fifo_element[1]._en" "t.fifo_in1.fifo_element[1].en_ctl.y"
+= "t.fifo_in1.fifo_element[1]._en" "t.fifo_in1.fifo_element[1].inack_ctl.c1"
+~"t.fifo_in1.fifo_element[1].en_ctl.p1"&~"t.fifo_in1.fifo_element[1].en_ctl.c1"->"t.fifo_in1.fifo_element[1].en_ctl.y"+
+"t.fifo_in1.fifo_element[1].en_ctl.c1"->"t.fifo_in1.fifo_element[1].en_ctl.y"-
+= "t.fifo_in1.fifo_element[1]._out_a_B" "t.fifo_in1.fifo_element[1].buf_func.c2"
+= "t.fifo_in1.fifo_element[1]._out_a_B" "t.fifo_in1.fifo_element[1].inv_outa.y"
+= "t.fifo_in1.fifo_element[1].in.d.d[0]" "t.fifo_in1.fifo_element[1].in.r"
+= "t.fifo_in1.fifo_element[1].in.a" "t.fifo_in1.fifo_element[1].en_ctl.c1"
+= "t.fifo_in1.fifo_element[1].in.a" "t.fifo_in1.fifo_element[1].inack_ctl.y"
+= "t.fifo_in1.fifo_element[1].in.d.d[0]" "t.fifo_in1.fifo_element[1].buf_func.n1"
+= "t.fifo_in1.fifo_element[1].in.d.d[0]" "t.fifo_in1.fifo_element[1].inack_ctl.c2"
+= "t.fifo_in1.fifo_element[1].in.d.d[0]" "t.fifo_in1.fifo_element[1].in.r"
+= "t.fifo_in1.fifo_element[1].out.d.d[0]" "t.fifo_in1.fifo_element[1].out.r"
+= "t.fifo_in1.fifo_element[1].out.a" "t.fifo_in1.fifo_element[1].inv_outa.a"
+= "t.fifo_in1.fifo_element[1].out.d.d[0]" "t.fifo_in1.fifo_element[1].buf_func.y"
+= "t.fifo_in1.fifo_element[1].out.d.d[0]" "t.fifo_in1.fifo_element[1].en_ctl.p1"
+= "t.fifo_in1.fifo_element[1].out.d.d[0]" "t.fifo_in1.fifo_element[1].inack_ctl.n1"
+= "t.fifo_in1.fifo_element[1].out.d.d[0]" "t.fifo_in1.fifo_element[1].out.r"
+"t.fifo_in1.fifo_element[2].reset_buf.a"->"t.fifo_in1.fifo_element[2].reset_buf._y"-
+~("t.fifo_in1.fifo_element[2].reset_buf.a")->"t.fifo_in1.fifo_element[2].reset_buf._y"+
+"t.fifo_in1.fifo_element[2].reset_buf._y"->"t.fifo_in1.fifo_element[2].reset_buf.y"-
+~("t.fifo_in1.fifo_element[2].reset_buf._y")->"t.fifo_in1.fifo_element[2].reset_buf.y"+
+"t.fifo_in1.fifo_element[2].inv_outa.a"->"t.fifo_in1.fifo_element[2].inv_outa.y"-
+~("t.fifo_in1.fifo_element[2].inv_outa.a")->"t.fifo_in1.fifo_element[2].inv_outa.y"+
+~"t.fifo_in1.fifo_element[2].inack_ctl.c1"&~"t.fifo_in1.fifo_element[2].inack_ctl.c2"|~"t.fifo_in1.fifo_element[2].inack_ctl.pr_B"->"t.fifo_in1.fifo_element[2].inack_ctl._y"+
+"t.fifo_in1.fifo_element[2].inack_ctl.c1"&"t.fifo_in1.fifo_element[2].inack_ctl.c2"&"t.fifo_in1.fifo_element[2].inack_ctl.n1"&"t.fifo_in1.fifo_element[2].inack_ctl.sr_B"->"t.fifo_in1.fifo_element[2].inack_ctl._y"-
+"t.fifo_in1.fifo_element[2].inack_ctl._y"->"t.fifo_in1.fifo_element[2].inack_ctl.y"-
+~("t.fifo_in1.fifo_element[2].inack_ctl._y")->"t.fifo_in1.fifo_element[2].inack_ctl.y"+
+~"t.fifo_in1.fifo_element[2].buf_func.c1"&~"t.fifo_in1.fifo_element[2].buf_func.c2"|~"t.fifo_in1.fifo_element[2].buf_func.pr_B"->"t.fifo_in1.fifo_element[2].buf_func._y"+
+"t.fifo_in1.fifo_element[2].buf_func.c1"&"t.fifo_in1.fifo_element[2].buf_func.c2"&"t.fifo_in1.fifo_element[2].buf_func.n1"&"t.fifo_in1.fifo_element[2].buf_func.sr_B"->"t.fifo_in1.fifo_element[2].buf_func._y"-
+"t.fifo_in1.fifo_element[2].buf_func._y"->"t.fifo_in1.fifo_element[2].buf_func.y"-
+~("t.fifo_in1.fifo_element[2].buf_func._y")->"t.fifo_in1.fifo_element[2].buf_func.y"+
+= "t.fifo_in1.fifo_element[2].reset_B" "t.fifo_in1.fifo_element[2].reset_buf.a"
+= "t.fifo_in1.fifo_element[2].supply.vdd" "t.fifo_in1.fifo_element[2].reset_buf.vdd"
+= "t.fifo_in1.fifo_element[2].supply.vdd" "t.fifo_in1.fifo_element[2].buf_func.vdd"
+= "t.fifo_in1.fifo_element[2].supply.vdd" "t.fifo_in1.fifo_element[2].inv_outa.vdd"
+= "t.fifo_in1.fifo_element[2].supply.vdd" "t.fifo_in1.fifo_element[2].en_ctl.vdd"
+= "t.fifo_in1.fifo_element[2].supply.vdd" "t.fifo_in1.fifo_element[2].inack_ctl.vdd"
+= "t.fifo_in1.fifo_element[2].supply.vss" "t.fifo_in1.fifo_element[2].reset_buf.vss"
+= "t.fifo_in1.fifo_element[2].supply.vss" "t.fifo_in1.fifo_element[2].buf_func.vss"
+= "t.fifo_in1.fifo_element[2].supply.vss" "t.fifo_in1.fifo_element[2].inv_outa.vss"
+= "t.fifo_in1.fifo_element[2].supply.vss" "t.fifo_in1.fifo_element[2].en_ctl.vss"
+= "t.fifo_in1.fifo_element[2].supply.vss" "t.fifo_in1.fifo_element[2].inack_ctl.vss"
+= "t.fifo_in1.fifo_element[2]._reset_BX" "t.fifo_in1.fifo_element[2].reset_buf.y"
+= "t.fifo_in1.fifo_element[2]._reset_BX" "t.fifo_in1.fifo_element[2].buf_func.sr_B"
+= "t.fifo_in1.fifo_element[2]._reset_BX" "t.fifo_in1.fifo_element[2].buf_func.pr_B"
+= "t.fifo_in1.fifo_element[2]._reset_BX" "t.fifo_in1.fifo_element[2].inack_ctl.sr_B"
+= "t.fifo_in1.fifo_element[2]._reset_BX" "t.fifo_in1.fifo_element[2].inack_ctl.pr_B"
+= "t.fifo_in1.fifo_element[2]._en" "t.fifo_in1.fifo_element[2].buf_func.c1"
+= "t.fifo_in1.fifo_element[2]._en" "t.fifo_in1.fifo_element[2].en_ctl.y"
+= "t.fifo_in1.fifo_element[2]._en" "t.fifo_in1.fifo_element[2].inack_ctl.c1"
+~"t.fifo_in1.fifo_element[2].en_ctl.p1"&~"t.fifo_in1.fifo_element[2].en_ctl.c1"->"t.fifo_in1.fifo_element[2].en_ctl.y"+
+"t.fifo_in1.fifo_element[2].en_ctl.c1"->"t.fifo_in1.fifo_element[2].en_ctl.y"-
+= "t.fifo_in1.fifo_element[2]._out_a_B" "t.fifo_in1.fifo_element[2].buf_func.c2"
+= "t.fifo_in1.fifo_element[2]._out_a_B" "t.fifo_in1.fifo_element[2].inv_outa.y"
+= "t.fifo_in1.fifo_element[2].in.d.d[0]" "t.fifo_in1.fifo_element[2].in.r"
+= "t.fifo_in1.fifo_element[2].in.a" "t.fifo_in1.fifo_element[2].en_ctl.c1"
+= "t.fifo_in1.fifo_element[2].in.a" "t.fifo_in1.fifo_element[2].inack_ctl.y"
+= "t.fifo_in1.fifo_element[2].in.d.d[0]" "t.fifo_in1.fifo_element[2].buf_func.n1"
+= "t.fifo_in1.fifo_element[2].in.d.d[0]" "t.fifo_in1.fifo_element[2].inack_ctl.c2"
+= "t.fifo_in1.fifo_element[2].in.d.d[0]" "t.fifo_in1.fifo_element[2].in.r"
+= "t.fifo_in1.fifo_element[2].out.d.d[0]" "t.fifo_in1.fifo_element[2].out.r"
+= "t.fifo_in1.fifo_element[2].out.a" "t.fifo_in1.fifo_element[2].inv_outa.a"
+= "t.fifo_in1.fifo_element[2].out.d.d[0]" "t.fifo_in1.fifo_element[2].buf_func.y"
+= "t.fifo_in1.fifo_element[2].out.d.d[0]" "t.fifo_in1.fifo_element[2].en_ctl.p1"
+= "t.fifo_in1.fifo_element[2].out.d.d[0]" "t.fifo_in1.fifo_element[2].inack_ctl.n1"
+= "t.fifo_in1.fifo_element[2].out.d.d[0]" "t.fifo_in1.fifo_element[2].out.r"
+"t.fifo_in1.fifo_element[3].reset_buf.a"->"t.fifo_in1.fifo_element[3].reset_buf._y"-
+~("t.fifo_in1.fifo_element[3].reset_buf.a")->"t.fifo_in1.fifo_element[3].reset_buf._y"+
+"t.fifo_in1.fifo_element[3].reset_buf._y"->"t.fifo_in1.fifo_element[3].reset_buf.y"-
+~("t.fifo_in1.fifo_element[3].reset_buf._y")->"t.fifo_in1.fifo_element[3].reset_buf.y"+
+"t.fifo_in1.fifo_element[3].inv_outa.a"->"t.fifo_in1.fifo_element[3].inv_outa.y"-
+~("t.fifo_in1.fifo_element[3].inv_outa.a")->"t.fifo_in1.fifo_element[3].inv_outa.y"+
+~"t.fifo_in1.fifo_element[3].inack_ctl.c1"&~"t.fifo_in1.fifo_element[3].inack_ctl.c2"|~"t.fifo_in1.fifo_element[3].inack_ctl.pr_B"->"t.fifo_in1.fifo_element[3].inack_ctl._y"+
+"t.fifo_in1.fifo_element[3].inack_ctl.c1"&"t.fifo_in1.fifo_element[3].inack_ctl.c2"&"t.fifo_in1.fifo_element[3].inack_ctl.n1"&"t.fifo_in1.fifo_element[3].inack_ctl.sr_B"->"t.fifo_in1.fifo_element[3].inack_ctl._y"-
+"t.fifo_in1.fifo_element[3].inack_ctl._y"->"t.fifo_in1.fifo_element[3].inack_ctl.y"-
+~("t.fifo_in1.fifo_element[3].inack_ctl._y")->"t.fifo_in1.fifo_element[3].inack_ctl.y"+
+~"t.fifo_in1.fifo_element[3].buf_func.c1"&~"t.fifo_in1.fifo_element[3].buf_func.c2"|~"t.fifo_in1.fifo_element[3].buf_func.pr_B"->"t.fifo_in1.fifo_element[3].buf_func._y"+
+"t.fifo_in1.fifo_element[3].buf_func.c1"&"t.fifo_in1.fifo_element[3].buf_func.c2"&"t.fifo_in1.fifo_element[3].buf_func.n1"&"t.fifo_in1.fifo_element[3].buf_func.sr_B"->"t.fifo_in1.fifo_element[3].buf_func._y"-
+"t.fifo_in1.fifo_element[3].buf_func._y"->"t.fifo_in1.fifo_element[3].buf_func.y"-
+~("t.fifo_in1.fifo_element[3].buf_func._y")->"t.fifo_in1.fifo_element[3].buf_func.y"+
+= "t.fifo_in1.fifo_element[3].reset_B" "t.fifo_in1.fifo_element[3].reset_buf.a"
+= "t.fifo_in1.fifo_element[3].supply.vdd" "t.fifo_in1.fifo_element[3].reset_buf.vdd"
+= "t.fifo_in1.fifo_element[3].supply.vdd" "t.fifo_in1.fifo_element[3].buf_func.vdd"
+= "t.fifo_in1.fifo_element[3].supply.vdd" "t.fifo_in1.fifo_element[3].inv_outa.vdd"
+= "t.fifo_in1.fifo_element[3].supply.vdd" "t.fifo_in1.fifo_element[3].en_ctl.vdd"
+= "t.fifo_in1.fifo_element[3].supply.vdd" "t.fifo_in1.fifo_element[3].inack_ctl.vdd"
+= "t.fifo_in1.fifo_element[3].supply.vss" "t.fifo_in1.fifo_element[3].reset_buf.vss"
+= "t.fifo_in1.fifo_element[3].supply.vss" "t.fifo_in1.fifo_element[3].buf_func.vss"
+= "t.fifo_in1.fifo_element[3].supply.vss" "t.fifo_in1.fifo_element[3].inv_outa.vss"
+= "t.fifo_in1.fifo_element[3].supply.vss" "t.fifo_in1.fifo_element[3].en_ctl.vss"
+= "t.fifo_in1.fifo_element[3].supply.vss" "t.fifo_in1.fifo_element[3].inack_ctl.vss"
+= "t.fifo_in1.fifo_element[3]._reset_BX" "t.fifo_in1.fifo_element[3].reset_buf.y"
+= "t.fifo_in1.fifo_element[3]._reset_BX" "t.fifo_in1.fifo_element[3].buf_func.sr_B"
+= "t.fifo_in1.fifo_element[3]._reset_BX" "t.fifo_in1.fifo_element[3].buf_func.pr_B"
+= "t.fifo_in1.fifo_element[3]._reset_BX" "t.fifo_in1.fifo_element[3].inack_ctl.sr_B"
+= "t.fifo_in1.fifo_element[3]._reset_BX" "t.fifo_in1.fifo_element[3].inack_ctl.pr_B"
+= "t.fifo_in1.fifo_element[3]._en" "t.fifo_in1.fifo_element[3].buf_func.c1"
+= "t.fifo_in1.fifo_element[3]._en" "t.fifo_in1.fifo_element[3].en_ctl.y"
+= "t.fifo_in1.fifo_element[3]._en" "t.fifo_in1.fifo_element[3].inack_ctl.c1"
+~"t.fifo_in1.fifo_element[3].en_ctl.p1"&~"t.fifo_in1.fifo_element[3].en_ctl.c1"->"t.fifo_in1.fifo_element[3].en_ctl.y"+
+"t.fifo_in1.fifo_element[3].en_ctl.c1"->"t.fifo_in1.fifo_element[3].en_ctl.y"-
+= "t.fifo_in1.fifo_element[3]._out_a_B" "t.fifo_in1.fifo_element[3].buf_func.c2"
+= "t.fifo_in1.fifo_element[3]._out_a_B" "t.fifo_in1.fifo_element[3].inv_outa.y"
+= "t.fifo_in1.fifo_element[3].in.d.d[0]" "t.fifo_in1.fifo_element[3].in.r"
+= "t.fifo_in1.fifo_element[3].in.a" "t.fifo_in1.fifo_element[3].en_ctl.c1"
+= "t.fifo_in1.fifo_element[3].in.a" "t.fifo_in1.fifo_element[3].inack_ctl.y"
+= "t.fifo_in1.fifo_element[3].in.d.d[0]" "t.fifo_in1.fifo_element[3].buf_func.n1"
+= "t.fifo_in1.fifo_element[3].in.d.d[0]" "t.fifo_in1.fifo_element[3].inack_ctl.c2"
+= "t.fifo_in1.fifo_element[3].in.d.d[0]" "t.fifo_in1.fifo_element[3].in.r"
+= "t.fifo_in1.fifo_element[3].out.d.d[0]" "t.fifo_in1.fifo_element[3].out.r"
+= "t.fifo_in1.fifo_element[3].out.a" "t.fifo_in1.fifo_element[3].inv_outa.a"
+= "t.fifo_in1.fifo_element[3].out.d.d[0]" "t.fifo_in1.fifo_element[3].buf_func.y"
+= "t.fifo_in1.fifo_element[3].out.d.d[0]" "t.fifo_in1.fifo_element[3].en_ctl.p1"
+= "t.fifo_in1.fifo_element[3].out.d.d[0]" "t.fifo_in1.fifo_element[3].inack_ctl.n1"
+= "t.fifo_in1.fifo_element[3].out.d.d[0]" "t.fifo_in1.fifo_element[3].out.r"
+= "t.fifo_in1.fifo_element[3].in.a" "t.fifo_in1.fifo_element[2].out.a"
+= "t.fifo_in1.fifo_element[3].in.d.d[0]" "t.fifo_in1.fifo_element[2].out.r"
+= "t.fifo_in1.fifo_element[3].in.d.d[0]" "t.fifo_in1.fifo_element[2].out.d.d[0]"
+= "t.fifo_in1.fifo_element[3].in.d.d[0]" "t.fifo_in1.fifo_element[3].in.r"
+= "t.fifo_in1.fifo_element[2].in.a" "t.fifo_in1.fifo_element[1].out.a"
+= "t.fifo_in1.fifo_element[2].in.d.d[0]" "t.fifo_in1.fifo_element[1].out.r"
+= "t.fifo_in1.fifo_element[2].in.d.d[0]" "t.fifo_in1.fifo_element[1].out.d.d[0]"
+= "t.fifo_in1.fifo_element[2].in.d.d[0]" "t.fifo_in1.fifo_element[2].in.r"
+= "t.fifo_in1.fifo_element[1].in.a" "t.fifo_in1.fifo_element[0].out.a"
+= "t.fifo_in1.fifo_element[1].in.d.d[0]" "t.fifo_in1.fifo_element[0].out.r"
+= "t.fifo_in1.fifo_element[1].in.d.d[0]" "t.fifo_in1.fifo_element[0].out.d.d[0]"
+= "t.fifo_in1.fifo_element[1].in.d.d[0]" "t.fifo_in1.fifo_element[1].in.r"
+= "t.fifo_in1._reset_BXX[0]" "t.fifo_in1.reset_bufarray.out[0]"
+= "t.fifo_in1._reset_BXX[1]" "t.fifo_in1.reset_bufarray.out[1]"
+= "t.fifo_in1._reset_BXX[2]" "t.fifo_in1.reset_bufarray.out[2]"
+= "t.fifo_in1._reset_BXX[3]" "t.fifo_in1.reset_bufarray.out[3]"
+= "t.fifo_in1._reset_BXX[3]" "t.fifo_in1.fifo_element[2].reset_B"
+= "t.fifo_in1._reset_BXX[3]" "t.fifo_in1._reset_BXX[2]"
+= "t.fifo_in1._reset_BXX[3]" "t.fifo_in1.fifo_element[1].reset_B"
+= "t.fifo_in1._reset_BXX[3]" "t.fifo_in1._reset_BXX[1]"
+= "t.fifo_in1._reset_BXX[3]" "t.fifo_in1.fifo_element[0].reset_B"
+= "t.fifo_in1._reset_BXX[3]" "t.fifo_in1._reset_BXX[0]"
+= "t.fifo_in1._reset_BXX[3]" "t.fifo_in1.fifo_element[3].reset_B"
+= "t.fifo_in1.in.d.d[0]" "t.fifo_in1.in.r"
+= "t.fifo_in1.in.a" "t.fifo_in1.fifo_element[0].in.a"
+= "t.fifo_in1.in.d.d[0]" "t.fifo_in1.fifo_element[0].in.r"
+= "t.fifo_in1.in.d.d[0]" "t.fifo_in1.fifo_element[0].in.d.d[0]"
+= "t.fifo_in1.in.d.d[0]" "t.fifo_in1.in.r"
+= "t.fifo_in1.out.d.d[0]" "t.fifo_in1.out.r"
+= "t.fifo_in1.out.a" "t.fifo_in1.fifo_element[3].out.a"
+= "t.fifo_in1.out.d.d[0]" "t.fifo_in1.fifo_element[3].out.r"
+= "t.fifo_in1.out.d.d[0]" "t.fifo_in1.fifo_element[3].out.d.d[0]"
+= "t.fifo_in1.out.d.d[0]" "t.fifo_in1.out.r"
+= "Reset" "t.fifo_in1.reset_B"
+= "Vdd" "t.fifo_in1.supply.vdd"
+= "GND" "t.fifo_in1.supply.vss"
+= "t.out.d.d[0]" "t.out.r"
+= "t.out.r" "t.arb.out.r"
+= "t.out.a" "t.arb.out.a"
+= "t.out.d.d[0]" "t.arb.out.d.d[0]"
+= "t.out.d.d[0]" "t.out.r"
+= "t.in2.d.d[0]" "t.in2.r"
+= "t.in2.r" "t.fifo_in2.in.r"
+= "t.in2.a" "t.fifo_in2.in.a"
+= "t.in2.d.d[0]" "t.fifo_in2.in.d.d[0]"
+= "t.in2.d.d[0]" "t.in2.r"

test/unit_tests/arbiter_handshake_adv/test.act

@@ -0,0 +1,52 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/primitives.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+defproc arbiter_test(a1of1 in1; a1of1 in2; a1of1 out)
+{
+  a1of1 _out1,_out2;
+  fifo_t<4> fifo_in1(.in = in1,.out = _out1);
+  fifo_t<4> fifo_in2(.in = in2,.out = _out2);
+  fifo_in1.supply.vdd = Vdd;
+  fifo_in1.supply.vss = GND; 
+  fifo_in1.reset_B = Reset;
+  fifo_in2.supply.vdd = Vdd;
+  fifo_in2.supply.vss = GND; 
+  fifo_in2.reset_B = Reset; 
+
+
+  arbiter_handshake arb(.in1 = _out1, .in2 = _out2, .out = out);
+  arb.supply.vdd = Vdd;
+  arb.supply.vss = GND; 
+}
+
+arbiter_test t;

test/unit_tests/arbiter_handshake_adv/test.prsim

@@ -0,0 +1,45 @@
+watchall
+system "echo '[0] code starts'"
+set t.in1.r 0
+set t.in2.r 0
+set t.out.a 0
+set Reset 0
+cycle
+status X
+mode run
+set Reset 1
+cycle
+system "echo '[1] reset done'"
+system "echo '----------------------------------------------------------------------------------------------------'"
+set t.in1.r 1
+set t.in2.r 1
+cycle
+assert t.out.r 1
+set t.out.a 1
+system "echo '----------------------------------------------------------------------------------------------------'"
+system "echo '[2] 1 bit processed by the arbiter'"
+cycle
+set t.out.a 0
+cycle
+assert t.out.r 1
+set t.out.a 1
+set t.in1.r 0
+set t.in2.r 0
+system "echo '----------------------------------------------------------------------------------------------------'"
+system "echo '[3] 2 bit processed by the arbiter'"
+cycle
+set t.out.a 0
+set t.in1.r 1
+set t.in2.r 1
+cycle
+assert t.out.r 1
+set t.out.a 1
+system "echo '----------------------------------------------------------------------------------------------------'"
+system "echo '[4] 3 bit processed by the arbiter'"
+cycle
+set t.out.a 0
+cycle
+assert t.out.r 1
+set t.out.a 1
+system "echo '----------------------------------------------------------------------------------------------------'"
+system "echo '[5] 4 bit processed by the arbiter'"

test/unit_tests/arbiter_handshake_simple/run/prsim.out

@@ -0,0 +1,58 @@
+t.in1.r t.in2.r t.out.r t.a.arbiter._y1 t.a.arbiter._y2 t.out.a t.in1.a t.a._y1_arb t.a._y2_arb t.in2.a t.a.or_cell._y t.a.ack_cell1._y t.a.ack_cell2._y 
+[0] code starts
+	         0 t.in1.r : 0
+	         0 t.out.a : 0
+	         0 t.in2.r : 0
+	         1 t.a.arbiter._y1 : 1  [by t.in1.r:=0]
+	      7092 t.a.arbiter._y2 : 1  [by t.in2.r:=0]
+	      7094 t.a._y2_arb : 0  [by t.a.arbiter._y2:=1]
+	     10468 t.a._y1_arb : 0  [by t.a.arbiter._y1:=1]
+	     10582 t.a.or_cell._y : 1  [by t.a._y1_arb:=0]
+	     11605 t.a.ack_cell1._y : 1  [by t.a._y1_arb:=0]
+	     11847 t.a.ack_cell2._y : 1  [by t.a._y2_arb:=0]
+	     11886 t.in2.a : 0  [by t.a.ack_cell2._y:=1]
+	     13331 t.in1.a : 0  [by t.a.ack_cell1._y:=1]
+	     75948 t.out.r : 0  [by t.a.or_cell._y:=1]
+
+[1] reset done
+----------------------------------------------------------------------------------------------------
+	     75948 t.in1.r : 1
+	     75963 t.a.arbiter._y1 : 0  [by t.in1.r:=1]
+	     76454 t.a._y1_arb : 1  [by t.a.arbiter._y1:=0]
+	     76467 t.a.or_cell._y : 0  [by t.a._y1_arb:=1]
+	     76507 t.out.r : 1  [by t.a.or_cell._y:=0]
+	     76507 t.out.a : 1
+	     76922 t.a.ack_cell1._y : 0  [by t.out.a:=1]
+	     76942 t.in1.a : 1  [by t.a.ack_cell1._y:=0]
+[2] test in1 done
+----------------------------------------------------------------------------------------------------
+	     76942 t.in1.r : 0
+	     83003 t.a.arbiter._y1 : 1  [by t.in1.r:=0]
+	     83050 t.a._y1_arb : 0  [by t.a.arbiter._y1:=1]
+	     83066 t.a.or_cell._y : 1  [by t.a._y1_arb:=0]
+	    127164 t.out.r : 0  [by t.a.or_cell._y:=1]
+	    127164 t.out.a : 0
+	    140888 t.a.ack_cell1._y : 1  [by t.out.a:=0]
+	    140892 t.in1.a : 0  [by t.a.ack_cell1._y:=1]
+[3] reset done
+----------------------------------------------------------------------------------------------------
+	    140892 t.in2.r : 1
+	    150021 t.a.arbiter._y2 : 0  [by t.in2.r:=1]
+	    150036 t.a._y2_arb : 1  [by t.a.arbiter._y2:=0]
+	    193284 t.a.or_cell._y : 0  [by t.a._y2_arb:=1]
+	    230215 t.out.r : 1  [by t.a.or_cell._y:=0]
+	    230215 t.out.a : 1
+	    230270 t.a.ack_cell2._y : 0  [by t.out.a:=1]
+	    281923 t.in2.a : 1  [by t.a.ack_cell2._y:=0]
+[4] test in2 done
+----------------------------------------------------------------------------------------------------
+	    281923 t.in2.r : 0
+	    311703 t.a.arbiter._y2 : 1  [by t.in2.r:=0]
+	    325552 t.a._y2_arb : 0  [by t.a.arbiter._y2:=1]
+	    350364 t.a.or_cell._y : 1  [by t.a._y2_arb:=0]
+	    364707 t.out.r : 0  [by t.a.or_cell._y:=1]
+	    364707 t.out.a : 0
+	    365129 t.a.ack_cell2._y : 1  [by t.out.a:=0]
+	    413843 t.in2.a : 0  [by t.a.ack_cell2._y:=1]
+[5] reset done
+----------------------------------------------------------------------------------------------------

test/unit_tests/arbiter_handshake_simple/run/test.prs

@@ -0,0 +1,70 @@
+= "GND" "GND"
+= "Vdd" "Vdd"
+= "Reset" "Reset"
+= "t.a.in1.d.d[0]" "t.a.in1.r"
+= "t.a.in1.a" "t.a.arbiter.d"
+= "t.a.in1.a" "t.a.ack_cell1.y"
+= "t.a.in1.d.d[0]" "t.a.arbiter.a"
+= "t.a.in1.d.d[0]" "t.a.in1.r"
+~"t.a.ack_cell1.c1"&~"t.a.ack_cell1.c2"->"t.a.ack_cell1._y"+
+"t.a.ack_cell1.c1"&"t.a.ack_cell1.c2"->"t.a.ack_cell1._y"-
+"t.a.ack_cell1._y"->"t.a.ack_cell1.y"-
+~("t.a.ack_cell1._y")->"t.a.ack_cell1.y"+
+= "t.a.in2.d.d[0]" "t.a.in2.r"
+= "t.a.in2.a" "t.a.arbiter.c"
+= "t.a.in2.a" "t.a.ack_cell2.y"
+= "t.a.in2.d.d[0]" "t.a.arbiter.b"
+= "t.a.in2.d.d[0]" "t.a.in2.r"
+= "t.a.supply.vdd" "t.a.arbiter.vdd"
+= "t.a.supply.vdd" "t.a.or_cell.vdd"
+= "t.a.supply.vdd" "t.a.ack_cell2.vdd"
+= "t.a.supply.vdd" "t.a.ack_cell1.vdd"
+= "t.a.supply.vss" "t.a.arbiter.vss"
+= "t.a.supply.vss" "t.a.or_cell.vss"
+= "t.a.supply.vss" "t.a.ack_cell2.vss"
+= "t.a.supply.vss" "t.a.ack_cell1.vss"
+"t.a.arbiter.a"&"t.a.arbiter._y2"->"t.a.arbiter._y1"-
+~"t.a.arbiter.a"|~"t.a.arbiter._y2"->"t.a.arbiter._y1"+
+"t.a.arbiter.b"&"t.a.arbiter._y1"->"t.a.arbiter._y2"-
+~"t.a.arbiter.b"|~"t.a.arbiter._y1"->"t.a.arbiter._y2"+
+"t.a.arbiter._y1"|"t.a.arbiter.c"->"t.a.arbiter.y1"-
+~("t.a.arbiter._y1"|"t.a.arbiter.c")->"t.a.arbiter.y1"+
+"t.a.arbiter._y2"|"t.a.arbiter.d"->"t.a.arbiter.y2"-
+~("t.a.arbiter._y2"|"t.a.arbiter.d")->"t.a.arbiter.y2"+
+mk_excllo("t.a.arbiter._y1","t.a.arbiter._y2")
+= "t.a._y1_arb" "t.a.arbiter.y1"
+= "t.a._y1_arb" "t.a.or_cell.a"
+= "t.a._y1_arb" "t.a.ack_cell1.c2"
+~"t.a.ack_cell2.c1"&~"t.a.ack_cell2.c2"->"t.a.ack_cell2._y"+
+"t.a.ack_cell2.c1"&"t.a.ack_cell2.c2"->"t.a.ack_cell2._y"-
+"t.a.ack_cell2._y"->"t.a.ack_cell2.y"-
+~("t.a.ack_cell2._y")->"t.a.ack_cell2.y"+
+"t.a.or_cell.a"|"t.a.or_cell.b"->"t.a.or_cell._y"-
+~("t.a.or_cell.a"|"t.a.or_cell.b")->"t.a.or_cell._y"+
+"t.a.or_cell._y"->"t.a.or_cell.y"-
+~("t.a.or_cell._y")->"t.a.or_cell.y"+
+= "t.a.out.d.d[0]" "t.a.out.r"
+= "t.a.out.a" "t.a.ack_cell2.c1"
+= "t.a.out.a" "t.a.ack_cell1.c1"
+= "t.a.out.d.d[0]" "t.a.or_cell.y"
+= "t.a.out.d.d[0]" "t.a.out.r"
+= "t.a._y2_arb" "t.a.arbiter.y2"
+= "t.a._y2_arb" "t.a.or_cell.b"
+= "t.a._y2_arb" "t.a.ack_cell2.c2"
+= "Vdd" "t.a.supply.vdd"
+= "GND" "t.a.supply.vss"
+= "t.in1.d.d[0]" "t.in1.r"
+= "t.in1.r" "t.a.in1.r"
+= "t.in1.a" "t.a.in1.a"
+= "t.in1.d.d[0]" "t.a.in1.d.d[0]"
+= "t.in1.d.d[0]" "t.in1.r"
+= "t.out.d.d[0]" "t.out.r"
+= "t.out.r" "t.a.out.r"
+= "t.out.a" "t.a.out.a"
+= "t.out.d.d[0]" "t.a.out.d.d[0]"
+= "t.out.d.d[0]" "t.out.r"
+= "t.in2.d.d[0]" "t.in2.r"
+= "t.in2.r" "t.a.in2.r"
+= "t.in2.a" "t.a.in2.a"
+= "t.in2.d.d[0]" "t.a.in2.d.d[0]"
+= "t.in2.d.d[0]" "t.in2.r"

test/unit_tests/arbiter_handshake_simple/test.act

@@ -0,0 +1,41 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/primitives.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+defproc arbiter_test(a1of1 in1; a1of1 in2; a1of1 out)
+{
+  arbiter_handshake a(.in1 = in1, .in2 = in2, .out = out);
+  a.supply.vdd = Vdd;
+  a.supply.vss = GND; 
+}
+
+arbiter_test t;

test/unit_tests/arbiter_handshake_simple/test.prsim

@@ -0,0 +1,42 @@
+watchall
+system "echo '[0] code starts'"
+set t.in1.r 0
+set t.in2.r 0
+set t.out.a 0
+cycle
+status X
+mode run
+system "echo '[1] reset done'"
+system "echo '----------------------------------------------------------------------------------------------------'"
+set t.in1.r 1
+cycle
+assert t.out.r 1
+set t.out.a 1
+cycle
+assert t.in1.a 1
+system "echo '[2] test in1 done'"
+system "echo '----------------------------------------------------------------------------------------------------'"
+set t.in1.r 0
+cycle 
+assert t.out.r 0
+set t.out.a 0
+cycle
+assert t.in1.a 0
+system "echo '[3] reset done'"
+system "echo '----------------------------------------------------------------------------------------------------'"
+set t.in2.r 1
+cycle
+assert t.out.r 1
+set t.out.a 1
+cycle
+assert t.in2.a 1
+system "echo '[4] test in2 done'"
+system "echo '----------------------------------------------------------------------------------------------------'"
+set t.in2.r 0
+cycle 
+assert t.out.r 0
+set t.out.a 0
+cycle
+assert t.in2.a 0
+system "echo '[5] reset done'"
+system "echo '----------------------------------------------------------------------------------------------------'"

test/unit_tests/async_instantiate/run/prsim.out

@@ -0,0 +1 @@
+cell27._y cell25.c3 cell18._y cell14._y cell27.pr_B cell21.y cell23.c3 cell10._y cell30.p3 cell20.c1 cell10.n1 cell30._y cell12.sr_B cell8.c1 cell16.c2 cell2.p1 cell28.c2 cell5.c1 cell21._y cell19.c2 cell6.p2 cell9.pr_B cell9.p3 cell4.p1 cell28.sr_B cell11.pr_B cell26.c4 cell9.n2 cell27.c2 cell12.c2 cell28.pr_B cell21.pr_B cell22.pr_B cell11.c2 cell13.y cell9.n1 cell1.n1 cell12.c1 cell28.c4 cell1.n2 cell22.sr_B cell26.y cell11.n2 cell13.n4 cell15.rs_B cell6.c1 cell28._y cell2.n2 cell10.pr_B cell16.y cell16.c1 cell11.sr_B cell15._y cell2.pr_B cell11._y cell20.y cell21.c2 cell22.c1 cell27.sr_B cell4.y cell10.n4 cell23.pr_B cell2.sr_B cell6.p1 cell9.p4 cell23._y cell11.c1 cell9.sr_B cell9.c1 cell27.y cell29.c3 cell12.n1 cell1.sr_B cell29.sr_B cell13.n3 cell13.n2 cell11.n4 cell15.n2 cell15.rp_B cell2.y cell3.n1 cell15.c2 cell26.c3 cell24.c2 cell17._y cell28.c1 cell6.n1 cell14.n1 cell31.n1 cell21.c3 cell27.c3 cell19.sr_B cell26._y cell7._y cell20.c2 cell10.n2 cell9.p2 cell14.rs_B cell31.y cell13.pr_B cell31.p1 cell30.n2 cell18.sr_B cell10.y cell6.y cell24.sr_B cell14.n2 cell30.n1 cell22.y cell10.sr_B cell10.n3 cell13.c2 cell13.n1 cell24.y cell12.pr_B cell29.pr_B cell24.c1 cell16.n1 cell24.pr_B cell28.c3 cell17.c2 cell11.n3 cell16.rs_B cell4._y cell14.c1 cell8.p2 cell14.c2 cell8.p1 cell15.n1 cell15.y cell23.c2 cell18.c1 cell7.p2 cell9.y cell7.y cell29.c1 cell30.p1 cell12.n3 cell11.n1 cell26.pr_B cell29.y cell22._y cell13.c1 cell18.y cell7.c1 cell19.y cell27.c4 cell25.c1 cell21.c1 cell30.y cell1.y cell26.c1 cell17.c1 cell2.n1 cell25.y cell5.y cell30.p4 cell31.p3 cell25.c2 cell3.p1 cell9.p5 cell9.p1 cell26.sr_B cell19.c1 cell8.y cell23.c1 cell18.c2 cell7.p1 cell22.c2 cell23.y cell14.rp_B cell30.p2 cell29.c4 cell23.sr_B cell1.c1 cell26.c2 cell3.y cell10.c1 cell16.n2 cell21.sr_B cell24.c3 cell31.p4 cell1.pr_B cell12.n2 cell31.p2 cell11.y cell12.n4 cell12._y cell18.pr_B cell10.c2 cell2.c1 cell5.p1 cell31.n2 cell13.sr_B cell12.y cell27.c1 cell1._y cell14.y cell16.rp_B cell15.c1 cell4.c1 cell29.c2 cell17.y cell19.pr_B cell3.c1 cell22.c3 cell28.y cell1.p1 

test/unit_tests/async_instantiate/run/test.prs

@@ -0,0 +1,96 @@
+~"cell26.c1"&~"cell26.c2"&~"cell26.c3"&~"cell26.c4"|~"cell26.pr_B"->"cell26._y"+
+"cell26.c1"&"cell26.c2"&"cell26.c3"&"cell26.c4"&"cell26.sr_B"->"cell26._y"-
+"cell26._y"->"cell26.y"-
+~("cell26._y")->"cell26.y"+
+~"cell16.c1"&~"cell16.c2"|~"cell16.rp_B"->"cell16.y"+
+"cell16.c1"&"cell16.c2"&"cell16.n1"&"cell16.n2"&"cell16.rs_B"->"cell16.y"-
+~"cell8.p1"&~"cell8.p2"&~"cell8.c1"->"cell8.y"+
+"cell8.c1"->"cell8.y"-
+~"cell22.c1"&~"cell22.c2"&~"cell22.c3"|~"cell22.pr_B"->"cell22._y"+
+"cell22.c1"&"cell22.c2"&"cell22.c3"&"cell22.sr_B"->"cell22._y"-
+"cell22._y"->"cell22.y"-
+~("cell22._y")->"cell22.y"+
+~"cell19.c1"&~"cell19.c2"|~"cell19.pr_B"->"cell19.y"+
+"cell19.c1"&"cell19.c2"&"cell19.sr_B"->"cell19.y"-
+~"cell12.c1"&~"cell12.c2"|~"cell12.pr_B"->"cell12._y"+
+"cell12.c1"&"cell12.c2"&("cell12.n1"&"cell12.n2"|"cell12.n3"&"cell12.n4")&"cell12.sr_B"->"cell12._y"-
+"cell12._y"->"cell12.y"-
+~("cell12._y")->"cell12.y"+
+~"cell30.p1"&~"cell30.p2"&~"cell30.p3"&~"cell30.p4"->"cell30._y"+
+"cell30.n1"|"cell30.n2"->"cell30._y"-
+"cell30._y"->"cell30.y"-
+~("cell30._y")->"cell30.y"+
+~"cell17.c1"&~"cell17.c2"->"cell17._y"+
+"cell17.c1"&"cell17.c2"->"cell17._y"-
+"cell17._y"->"cell17.y"-
+~("cell17._y")->"cell17.y"+
+~"cell14.c1"&~"cell14.c2"|~"cell14.rp_B"->"cell14._y"+
+"cell14.c1"&"cell14.c2"&"cell14.n1"&"cell14.n2"&"cell14.rs_B"->"cell14._y"-
+"cell14._y"->"cell14.y"-
+~("cell14._y")->"cell14.y"+
+~"cell7.p1"&~"cell7.p2"&~"cell7.c1"->"cell7._y"-
+"cell7.c1"->"cell7._y"+
+"cell7._y"->"cell7.y"-
+~("cell7._y")->"cell7.y"+
+~"cell1.p1"&~"cell1.c1"|~"cell1.pr_B"->"cell1._y"+
+"cell1.c1"&"cell1.n1"&"cell1.n2"&"cell1.sr_B"->"cell1._y"-
+"cell1._y"->"cell1.y"-
+~("cell1._y")->"cell1.y"+
+~"cell21.c1"&~"cell21.c2"&~"cell21.c3"|~"cell21.pr_B"->"cell21._y"+
+"cell21.c1"&"cell21.c2"&"cell21.c3"&"cell21.sr_B"->"cell21._y"-
+"cell21._y"->"cell21.y"-
+~("cell21._y")->"cell21.y"+
+~"cell18.c1"&~"cell18.c2"|~"cell18.pr_B"->"cell18._y"+
+"cell18.c1"&"cell18.c2"&"cell18.sr_B"->"cell18._y"-
+"cell18._y"->"cell18.y"-
+~("cell18._y")->"cell18.y"+
+~"cell15.c1"&~"cell15.c2"|~"cell15.rp_B"->"cell15._y"+
+"cell15.c1"&"cell15.c2"&"cell15.n1"&"cell15.n2"&"cell15.rs_B"->"cell15._y"-
+"cell15._y"->"cell15.y"-
+~("cell15._y")->"cell15.y"+
+~"cell13.c1"&~"cell13.c2"|~"cell13.pr_B"->"cell13.y"+
+"cell13.c1"&"cell13.c2"&("cell13.n1"&"cell13.n2"|"cell13.n3"&"cell13.n4")&"cell13.sr_B"->"cell13.y"-
+~"cell11.c1"&~"cell11.c2"|~"cell11.pr_B"->"cell11._y"+
+"cell11.c1"&"cell11.c2"&("cell11.n1"&"cell11.n2"|"cell11.n3"&"cell11.n4")&"cell11.sr_B"->"cell11._y"-
+"cell11._y"->"cell11.y"-
+~("cell11._y")->"cell11.y"+
+~"cell28.c1"&~"cell28.c2"&~"cell28.c3"&~"cell28.c4"|~"cell28.pr_B"->"cell28._y"+
+"cell28.c1"&"cell28.c2"&"cell28.c3"&"cell28.c4"&"cell28.sr_B"->"cell28._y"-
+"cell28._y"->"cell28.y"-
+~("cell28._y")->"cell28.y"+
+~"cell24.c1"&~"cell24.c2"&~"cell24.c3"|~"cell24.pr_B"->"cell24.y"+
+"cell24.c1"&"cell24.c2"&"cell24.c3"&"cell24.sr_B"->"cell24.y"-
+~"cell23.c1"&~"cell23.c2"&~"cell23.c3"|~"cell23.pr_B"->"cell23._y"+
+"cell23.c1"&"cell23.c2"&"cell23.c3"&"cell23.sr_B"->"cell23._y"-
+"cell23._y"->"cell23.y"-
+~("cell23._y")->"cell23.y"+
+~"cell10.c1"&~"cell10.c2"|~"cell10.pr_B"->"cell10._y"+
+"cell10.c1"&"cell10.c2"&("cell10.n1"&"cell10.n2"|"cell10.n3"&"cell10.n4")&"cell10.sr_B"->"cell10._y"-
+"cell10._y"->"cell10.y"-
+~("cell10._y")->"cell10.y"+
+~"cell3.p1"&~"cell3.c1"->"cell3.y"+
+"cell3.c1"&"cell3.n1"->"cell3.y"-
+~"cell29.c1"&~"cell29.c2"&~"cell29.c3"&~"cell29.c4"|~"cell29.pr_B"->"cell29.y"+
+"cell29.c1"&"cell29.c2"&"cell29.c3"&"cell29.c4"&"cell29.sr_B"->"cell29.y"-
+~"cell25.c1"&~"cell25.c2"&~"cell25.c3"->"cell25.y"+
+"cell25.c1"&"cell25.c2"&"cell25.c3"->"cell25.y"-
+~"cell5.p1"&~"cell5.c1"->"cell5.y"+
+"cell5.c1"->"cell5.y"-
+~"cell4.p1"&~"cell4.c1"->"cell4._y"-
+"cell4.c1"->"cell4._y"+
+"cell4._y"->"cell4.y"-
+~("cell4._y")->"cell4.y"+
+~"cell31.p1"&~"cell31.p2"&~"cell31.p3"&~"cell31.p4"->"cell31.y"+
+"cell31.n1"|"cell31.n2"->"cell31.y"-
+~"cell27.c1"&~"cell27.c2"&~"cell27.c3"&~"cell27.c4"|~"cell27.pr_B"->"cell27._y"+
+"cell27.c1"&"cell27.c2"&"cell27.c3"&"cell27.c4"&"cell27.sr_B"->"cell27._y"-
+"cell27._y"->"cell27.y"-
+~("cell27._y")->"cell27.y"+
+~"cell20.c1"&~"cell20.c2"->"cell20.y"+
+"cell20.c1"&"cell20.c2"->"cell20.y"-
+~"cell9.p1"&~"cell9.p2"&~"cell9.p3"&~"cell9.c1"|~"cell9.p4"&~"cell9.p5"&~"cell9.c1"|~"cell9.pr_B"->"cell9.y"+
+"cell9.c1"&"cell9.n1"&"cell9.n2"&"cell9.sr_B"->"cell9.y"-
+~"cell6.p1"&~"cell6.p2"&~"cell6.c1"->"cell6.y"+
+"cell6.c1"&"cell6.n1"->"cell6.y"-
+~"cell2.p1"&~"cell2.c1"|~"cell2.pr_B"->"cell2.y"-
+"cell2.c1"&"cell2.n1"&"cell2.n2"&"cell2.sr_B"->"cell2.y"+

test/unit_tests/async_instantiate/test.act

@@ -0,0 +1,60 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_async.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/cell_lib_async.act";
+open tmpl::dataflow_neuro;
+A_1C1P2N_RB_X1 cell1;
+A_1C1P2N_R_X1 cell2;
+A_1C1P_1N_X1 cell3;
+A_1C1P_B cell4;
+A_1C1P cell5;
+A_1C2P1N_X1 cell6;
+A_1C2P_B_X1 cell7;
+A_1C2P cell8;
+A_1C3P2P2N_R_X1 cell9;
+A_2C2N2N_RB_X1 cell10;
+A_2C2N2N_RB_X2 cell11;
+A_2C2N2N_RB_X4 cell12;
+A_2C2N2N_R_X1 cell13;
+A_2C2N_R_B_X2 cell14;
+A_2C2N_R_B_X4 cell15;
+A_2C2N_R_X1 cell16;
+A_2C_B_X1 cell17;
+A_2C_RB_X1 cell18;
+A_2C_R_X1 cell19;
+A_2C_X1 cell20;
+A_3C_RB_X1 cell21;
+A_3C_RB_X2 cell22;
+A_3C_RB_X4 cell23;
+A_3C_R_X1 cell24;
+A_3C_X1 cell25;
+A_4C_RB_X1 cell26;
+A_4C_RB_X2 cell27;
+A_4C_RB_X4 cell28;
+A_4C_R_X1 cell29;
+A_4P1N1N_B_X1 cell30;
+A_4P1N1N_X1 cell31;

test/unit_tests/buf_15/run/prsim.out

@@ -0,0 +1,5 @@
+t.buffer_test._en t.buffer_test._out_a_BX_f[0] t.buffer_test._out_a_BX_t[0] t.buffer_test.f_buf_func[0].n1 t.buffer_test.t_buf_func[7].n1 t.buffer_test.t_buf_func[12].n1 t.buffer_test.f_buf_func[8].n1 t.buffer_test.t_buf_func[10].n1 t.buffer_test._en_X_t[0] t.buffer_test.t_buf_func[3].n1 t.buffer_test.f_buf_func[5].n1 t.out.a t.buffer_test.t_buf_func[11].n1 t.buffer_test.vc.tmp[8] t.buffer_test.f_buf_func[4].n1 t.buffer_test.vc.tmp[0] t.buffer_test.vc.tmp[22] t.buffer_test.f_buf_func[6].n1 t.buffer_test.t_buf_func[2].n1 t.buffer_test.t_buf_func[9].n1 t.buffer_test.f_buf_func[13].n1 t.buffer_test.vc.tmp[18] t.buffer_test.t_buf_func[14].n1 t.buffer_test.vc.tmp[5] t.buffer_test.f_buf_func[7].n1 t.buffer_test.f_buf_func[12].n1 t.buffer_test.t_buf_func[4].n1 t.buffer_test._en_X_f[0] t.buffer_test.vc.tmp[10] t.buffer_test.f_buf_func[14].n1 t.buffer_test.out_a_B_buf_t.buf6._y t.buffer_test.vc.tmp[19] t.buffer_test.t_buf_func[8].n1 t.buffer_test.f_buf_func[9].n1 t.buffer_test.f_buf_func[2].n1 t.buffer_test.vc.tmp[16] t.buffer_test.t_buf_func[1].n1 t.buffer_test.f_buf_func[10].n1 t.buffer_test.vc.tmp[2] t.buffer_test.vc.tmp[14] t.buffer_test.vc.tmp[12] t.buffer_test.vc.tmp[1] t.buffer_test._out_a_B t.buffer_test.f_buf_func[1].n1 t.buffer_test.vc.tmp[4] t.buffer_test.out_a_B_buf_f.buf6._y t.buffer_test.vc.tmp[15] t.buffer_test.vc.tmp[11] t.buffer_test.vc.tmp[13] t.in.v t.buffer_test.vc.OR2_tf[0]._y t.buffer_test.vc.tmp[6] t.buffer_test.vc.tmp[9] t.buffer_test.vc.tmp[24] t.buffer_test.vc.tmp[23] t.buffer_test.vc.OR2_tf[14]._y t.buffer_test._in_v t.buffer_test.t_buf_func[0].n1 t.buffer_test.vc.OR2_tf[4]._y t.buffer_test.t_buf_func[5].n1 t.buffer_test.t_buf_func[6].n1 t.buffer_test.t_buf_func[13].n1 t.buffer_test.f_buf_func[3].n1 t.buffer_test.vc.tmp[7] t.buffer_test.vc.C2Els[0]._y t.buffer_test.vc.OR2_tf[5]._y t.buffer_test.vc.tmp[20] t.buffer_test.en_buf_f.buf6._y t.out.v t.buffer_test.vc.OR2_tf[10]._y t.buffer_test.vc.OR2_tf[8]._y t.buffer_test.vc.OR2_tf[3]._y t.buffer_test.vc.C2Els[7]._y t.buffer_test.vc.C2Els[1]._y t.buffer_test.vc.OR2_tf[6]._y t.buffer_test.vc.C3Els[0]._y t.buffer_test.vc.C2Els[3]._y t.buffer_test.f_buf_func[11].n1 t.buffer_test.vc.tmp[21] t.buffer_test.vc.OR2_tf[11]._y t.buffer_test.in_v_buf._y t.buffer_test.vc.OR2_tf[12]._y t.buffer_test.vc.C2Els[2]._y t.buffer_test.vc.tmp[17] t.buffer_test.vc.tmp[3] t.buffer_test.vc.OR2_tf[2]._y t.buffer_test.vc.OR2_tf[7]._y t.buffer_test.vc.OR2_tf[1]._y t.buffer_test.vc.C3Els[1]._y t.buffer_test.vc.C2Els[4]._y t.buffer_test.vc.OR2_tf[13]._y t.buffer_test.vc.C2Els[6]._y t.buffer_test.vc.OR2_tf[9]._y t.buffer_test.en_buf_t.buf6._y t.buffer_test.vc.C3Els[2]._y t.buffer_test.vc.C2Els[5]._y 
+yo man
+reset completed
+
+Finished

test/unit_tests/buf_15/test.act

@@ -0,0 +1,48 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/primitives.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+defproc buffer_15 (avMx1of2<15> in; avMx1of2<15> out){
+
+    buffer<15> buffer_test(.in=in, .out=out);
+    //Low active Reset 
+    bool _reset_B; 
+    prs {
+    	Reset => _reset_B-
+    }
+    buffer_test.supply.vss = GND;
+    buffer_test.supply.vdd = Vdd;
+    buffer_test.reset_B = _reset_B;
+    
+}
+
+buffer_15 t;

test/unit_tests/buf_15/test.prsim

@@ -0,0 +1,29 @@
+
+set-qdi-channel-neutral "t.in" 15
+set t.out.a 0
+set t.out.v 0
+cycle
+system "echo 'yo man'"
+
+set Reset 0
+
+cycle
+system "echo 'reset completed'"
+status X
+mode run
+
+assert-qdi-channel-neutral "t.out" 15
+cycle
+
+set-qdi-channel-valid "t.in" 15 5
+cycle
+assert t.in.v 1
+assert t.in.a 0
+assert-qdi-channel-valid "t.out" 15 5
+set t.out.v 1
+cycle
+assert t.in.a 1
+set-qdi-channel-neutral "t.in" 15
+cycle
+set t.out.a 1
+system "echo 'Finished'"

test/unit_tests/buf_s_5/run/prsim.out

@@ -0,0 +1,173 @@
+b.b.vc.tmp[1] b.b.f_buf_func[3].n1 b.b.vc.C2Els[1]._y b.b._out_a_BX_f[0] b.b.t_buf_func[1].n1 b.b.vc.OR2_tf[1]._y b.b.vc.tmp[0] b.in.v b.b.f_buf_func[1].n1 b.b.t_buf_func[3].n1 b.b._en_X_f[0] b.b._en_X_t[0] b.b._out_a_BX_t[0] b.b._in_vX[0] b.out.v b.b.f_buf_func[0].n1 b.b.f_buf_func[2].n1 b.b.t_buf_func[4].n1 b.b._out_a_B b.b.t_buf_func[2].n1 b.b.vc.OR2_tf[0]._y b.b.t_buf_func[0].n1 b.b.vc.tmp[2] b.b.in_v_bufN.buf2._y b.b.f_buf_func[4].n1 b.b.vc.OR2_tf[2]._y b.b.en_buf_f.buf2._y b.b.vc.tmp[5] b.b.en_buf_t.buf2._y b.b._en b.b.vc.tmp[4] b.b.vc.C3Els[0]._y b.b.vc.OR2_tf[4]._y b.out.a b.b._in_v b.b.vc.tmp[6] b.b.vc.tmp[3] b.b.out_a_B_buf_t.buf2._y b.b.in_v_buf4._y b.b.vc.C2Els[0]._y b.b.out_a_B_buf_f.buf2._y b.b.vc.OR2_tf[3]._y 
+	     84120 b.b.f_buf_func[0].n1 : 0
+	     84120 b.b.f_buf_func[4].y : 1
+	     84120 b.b.t_buf_func[4].y : 1
+	     84120 b.b.f_buf_func[1].n1 : 0
+	     84120 b.b.f_buf_func[3].n1 : 0
+	     84120 b.b.f_buf_func[3].y : 1
+	     84120 b.b.t_buf_func[3].y : 1
+	     84120 b.b.f_buf_func[0].y : 1
+	     84120 b.b.t_buf_func[0].y : 1
+	     84120 b.b.t_buf_func[2].n1 : 0
+	     84120 Reset : 0
+	     84120 b.b.f_buf_func[2].y : 1
+	     84120 b.out.v : 0
+	     84120 b.b.t_buf_func[0].n1 : 0
+	     84120 b.b.f_buf_func[2].n1 : 0
+	     84120 b.out.a : 0
+	     84120 b.b.t_buf_func[4].n1 : 0
+	     84120 b.b.t_buf_func[1].n1 : 0
+	     84120 b.b.f_buf_func[4].n1 : 0
+	     84120 b.b.t_buf_func[2].y : 1
+	     84120 b.b.t_buf_func[3].n1 : 0
+	     84120 b.b.f_buf_func[1].y : 1
+	     84120 b.b.t_buf_func[1].y : 1
+	     84121 b.b.f_buf_func[2].y : 0
+	     84121 b.b._en : 1  [by b.out.v:=0]
+	     84123 b.b.vc.OR2_tf[1]._y : 1  [by b.b.t_buf_func[1].n1:=0]
+	     84141 b.b.vc.tmp[1] : 0  [by b.b.vc.OR2_tf[1]._y:=1]
+	     84402 b.b.vc.OR2_tf[2]._y : 1  [by b.b.f_buf_func[2].n1:=0]
+	     84542 b.b.t_buf_func[0].y : 0
+	     84671 b.b.t_buf_func[2].y : 0
+	     84888 b.b._out_a_B : 1  [by b.out.a:=0]
+	     85074 b.b.f_buf_func[1].y : 0
+	     85103 b.b.en_buf_t.buf2._y : 0  [by b.b._en:=1]
+	     85191 b.b.vc.OR2_tf[3]._y : 1  [by b.b.t_buf_func[3].n1:=0]
+	     85201 b.b.t_buf_func[1].y : 0
+	     88415 b.b.vc.tmp[2] : 0  [by b.b.vc.OR2_tf[2]._y:=1]
+	     88891 b.b.out_a_B_buf_t.buf2._y : 0  [by b.b._out_a_B:=1]
+	     89393 b.b._out_a_BX_f[0] : 1  [by b.b.out_a_B_buf_t.buf2._y:=0]
+	     89951 b.b.vc.tmp[3] : 0  [by b.b.vc.OR2_tf[3]._y:=1]
+	     97969 b.b.f_buf_func[3].y : 0
+	     98463 b.b.f_buf_func[0].y : 0
+	    104325 b.b.vc.OR2_tf[0]._y : 1  [by b.b.t_buf_func[0].n1:=0]
+	    104528 b.b.vc.tmp[0] : 0  [by b.b.vc.OR2_tf[0]._y:=1]
+	    106382 b.b.vc.C2Els[0]._y : 1  [by b.b.vc.tmp[0]:=0]
+	    106521 b.b.vc.tmp[5] : 0  [by b.b.vc.C2Els[0]._y:=1]
+	    106561 b.b.vc.OR2_tf[4]._y : 1  [by b.b.f_buf_func[4].n1:=0]
+	    106687 b.b._en_X_t[0] : 1  [by b.b.en_buf_t.buf2._y:=0]
+	    108932 b.b.t_buf_func[3].y : 0
+	    113900 b.b.t_buf_func[4].y : 0
+	    129789 b.b.out_a_B_buf_f.buf2._y : 0  [by b.b._out_a_B:=1]
+	    129858 b.b._out_a_BX_t[0] : 1  [by b.b.out_a_B_buf_f.buf2._y:=0]
+	    132834 b._reset_B : 1  [by Reset:=0]
+	    132845 b.b.reset_buf._y : 0  [by b._reset_B:=1]
+	    135773 b.b.f_buf_func[4].y : 0
+	    138591 b.b.en_buf_f.buf2._y : 0  [by b.b._en:=1]
+	    138795 b.b._en_X_f[0] : 1  [by b.b.en_buf_f.buf2._y:=0]
+	    142907 b.b.vc.tmp[4] : 0  [by b.b.vc.OR2_tf[4]._y:=1]
+	    142922 b.b.vc.C3Els[0]._y : 1  [by b.b.vc.tmp[4]:=0]
+	    142923 b.b.vc.tmp[6] : 0  [by b.b.vc.C3Els[0]._y:=1]
+	    142960 b.b.vc.C2Els[1]._y : 1  [by b.b.vc.tmp[6]:=0]
+	    143699 b.b._in_v : 0  [by b.b.vc.C2Els[1]._y:=1]
+	    143811 b.b.in_v_buf4._y : 1  [by b.b._in_v:=0]
+	    184631 b.b._reset_BX : 1  [by b.b.reset_buf._y:=0]
+	    184671 b.b.reset_bufarray.buf2._y : 0  [by b.b._reset_BX:=1]
+	    184928 b.b._reset_BXX[0] : 1  [by b.b.reset_bufarray.buf2._y:=0]
+	    191323 b.in.v : 0  [by b.b.in_v_buf4._y:=1]
+	    191410 b.b.in_v_bufN.buf2._y : 1  [by b.in.v:=0]
+	    191704 b.b._in_vX[0] : 0  [by b.b.in_v_bufN.buf2._y:=1]
+[] set Reset 1
+	    191704 Reset : 1
+	    191705 b._reset_B : 0  [by Reset:=1]
+	    193511 b.b.reset_buf._y : 1  [by b._reset_B:=0]
+	    195518 b.b._reset_BX : 0  [by b.b.reset_buf._y:=1]
+	    196727 b.b.reset_bufarray.buf2._y : 1  [by b.b._reset_BX:=0]
+	    197317 b.b._reset_BXX[0] : 0  [by b.b.reset_bufarray.buf2._y:=1]
+[] set Reset 0
+	    197317 Reset : 0
+	    197495 b._reset_B : 1  [by Reset:=0]
+	    198298 b.b.reset_buf._y : 0  [by b._reset_B:=1]
+	    198462 b.b._reset_BX : 1  [by b.b.reset_buf._y:=0]
+	    200657 b.b.reset_bufarray.buf2._y : 0  [by b.b._reset_BX:=1]
+	    200679 b.b._reset_BXX[0] : 1  [by b.b.reset_bufarray.buf2._y:=0]
+[] Reset finished, setting some inputs.
+
+	    200679 b.b.t_buf_func[0].n1 : 1
+	    200679 b.b.f_buf_func[3].n1 : 1
+	    200679 b.b.f_buf_func[2].n1 : 1
+	    200679 b.b.t_buf_func[1].n1 : 1
+	    200812 b.b.vc.OR2_tf[2]._y : 0  [by b.b.f_buf_func[2].n1:=1]
+	    201171 b.b.vc.tmp[2] : 1  [by b.b.vc.OR2_tf[2]._y:=0]
+	    201526 b.b.vc.OR2_tf[0]._y : 0  [by b.b.t_buf_func[0].n1:=1]
+	    215642 b.b.vc.tmp[0] : 1  [by b.b.vc.OR2_tf[0]._y:=0]
+	    216341 b.b.vc.OR2_tf[1]._y : 0  [by b.b.t_buf_func[1].n1:=1]
+	    216562 b.b.vc.tmp[1] : 1  [by b.b.vc.OR2_tf[1]._y:=0]
+	    216569 b.b.vc.C2Els[0]._y : 0  [by b.b.vc.tmp[1]:=1]
+	    216599 b.b.vc.tmp[5] : 1  [by b.b.vc.C2Els[0]._y:=0]
+	    230807 b.b.vc.OR2_tf[3]._y : 0  [by b.b.f_buf_func[3].n1:=1]
+	    237520 b.b.vc.tmp[3] : 1  [by b.b.vc.OR2_tf[3]._y:=0]
+[] Setting final input
+	    237520 b.b.t_buf_func[4].n1 : 1
+	    294981 b.b.vc.OR2_tf[4]._y : 0  [by b.b.t_buf_func[4].n1:=1]
+	    295072 b.b.vc.tmp[4] : 1  [by b.b.vc.OR2_tf[4]._y:=0]
+	    297261 b.b.vc.C3Els[0]._y : 0  [by b.b.vc.tmp[4]:=1]
+	    297268 b.b.vc.tmp[6] : 1  [by b.b.vc.C3Els[0]._y:=0]
+	    300055 b.b.vc.C2Els[1]._y : 0  [by b.b.vc.tmp[6]:=1]
+	    300161 b.b._in_v : 1  [by b.b.vc.C2Els[1]._y:=0]
+	    300239 b.b.in_v_buf4._y : 0  [by b.b._in_v:=1]
+	    300514 b.in.v : 1  [by b.b.in_v_buf4._y:=0]
+	    319510 b.b.in_v_bufN.buf2._y : 0  [by b.in.v:=1]
+	    319965 b.b._in_vX[0] : 1  [by b.b.in_v_bufN.buf2._y:=0]
+	    319977 b.b.t_buf_func[0]._y : 0  [by b.b._in_vX[0]:=1]
+	    319977 b.b.t_buf_func[4]._y : 0  [by b.b._in_vX[0]:=1]
+	    320369 b.b.t_buf_func[1]._y : 0  [by b.b._in_vX[0]:=1]
+	    320371 b.b.t_buf_func[1].y : 1  [by b.b.t_buf_func[1]._y:=0]
+	    322876 b.b.t_buf_func[0].y : 1  [by b.b.t_buf_func[0]._y:=0]
+	    324241 b.b.f_buf_func[3]._y : 0  [by b.b._in_vX[0]:=1]
+	    324272 b.b.t_buf_func[4].y : 1  [by b.b.t_buf_func[4]._y:=0]
+	    325881 b.b.f_buf_func[2]._y : 0  [by b.b._in_vX[0]:=1]
+	    327130 b.b.f_buf_func[2].y : 1  [by b.b.f_buf_func[2]._y:=0]
+	    328776 b.b.f_buf_func[3].y : 1  [by b.b.f_buf_func[3]._y:=0]
+[] Receiving out val
+	    328776 b.out.v : 1
+	    332275 b.b.inack_ctl._y : 0  [by b.out.v:=1]
+	    332441 b.in.a : 1  [by b.b.inack_ctl._y:=0]
+	    332516 b.b._en : 0  [by b.in.a:=1]
+	    332654 b.b.en_buf_t.buf2._y : 1  [by b.b._en:=0]
+	    332861 b.b.en_buf_f.buf2._y : 1  [by b.b._en:=0]
+	    332863 b.b._en_X_f[0] : 0  [by b.b.en_buf_f.buf2._y:=1]
+	    337917 b.b._en_X_t[0] : 0  [by b.b.en_buf_t.buf2._y:=1]
+[] Removing input
+	    337917 b.b.t_buf_func[0].n1 : 0
+	    337917 b.b.t_buf_func[4].n1 : 0
+	    337917 b.b.f_buf_func[2].n1 : 0
+	    337917 b.b.t_buf_func[1].n1 : 0
+	    337917 b.b.f_buf_func[3].n1 : 0
+	    337918 b.b.vc.OR2_tf[4]._y : 1  [by b.b.t_buf_func[4].n1:=0]
+	    337928 b.b.vc.OR2_tf[1]._y : 1  [by b.b.t_buf_func[1].n1:=0]
+	    337985 b.b.vc.tmp[4] : 0  [by b.b.vc.OR2_tf[4]._y:=1]
+	    338287 b.b.vc.OR2_tf[3]._y : 1  [by b.b.f_buf_func[3].n1:=0]
+	    338303 b.b.vc.tmp[3] : 0  [by b.b.vc.OR2_tf[3]._y:=1]
+	    338465 b.b.vc.OR2_tf[2]._y : 1  [by b.b.f_buf_func[2].n1:=0]
+	    340569 b.b.vc.tmp[1] : 0  [by b.b.vc.OR2_tf[1]._y:=1]
+	    343027 b.b.vc.tmp[2] : 0  [by b.b.vc.OR2_tf[2]._y:=1]
+	    343555 b.b.vc.C3Els[0]._y : 1  [by b.b.vc.tmp[2]:=0]
+	    345990 b.b.vc.tmp[6] : 0  [by b.b.vc.C3Els[0]._y:=1]
+	    381834 b.b.vc.OR2_tf[0]._y : 1  [by b.b.t_buf_func[0].n1:=0]
+	    408714 b.b.vc.tmp[0] : 0  [by b.b.vc.OR2_tf[0]._y:=1]
+	    432639 b.b.vc.C2Els[0]._y : 1  [by b.b.vc.tmp[0]:=0]
+	    445680 b.b.vc.tmp[5] : 0  [by b.b.vc.C2Els[0]._y:=1]
+	    445682 b.b.vc.C2Els[1]._y : 1  [by b.b.vc.tmp[5]:=0]
+	    506640 b.b._in_v : 0  [by b.b.vc.C2Els[1]._y:=1]
+	    506643 b.b.in_v_buf4._y : 1  [by b.b._in_v:=0]
+	    506672 b.in.v : 0  [by b.b.in_v_buf4._y:=1]
+	    506989 b.b.in_v_bufN.buf2._y : 1  [by b.in.v:=0]
+	    508590 b.b._in_vX[0] : 0  [by b.b.in_v_bufN.buf2._y:=1]
+[] Receiving out ack
+	    508590 b.out.a : 1
+	    508743 b.b._out_a_B : 0  [by b.out.a:=1]
+	    508787 b.b.out_a_B_buf_t.buf2._y : 1  [by b.b._out_a_B:=0]
+	    511504 b.b.out_a_B_buf_f.buf2._y : 1  [by b.b._out_a_B:=0]
+	    511505 b.b._out_a_BX_t[0] : 0  [by b.b.out_a_B_buf_f.buf2._y:=1]
+	    511506 b.b.t_buf_func[4]._y : 1  [by b.b._out_a_BX_t[0]:=0]
+	    511527 b.b.t_buf_func[1]._y : 1  [by b.b._out_a_BX_t[0]:=0]
+	    511722 b.b.t_buf_func[0]._y : 1  [by b.b._out_a_BX_t[0]:=0]
+	    511881 b.b.t_buf_func[0].y : 0  [by b.b.t_buf_func[0]._y:=1]
+	    513087 b.b.t_buf_func[4].y : 0  [by b.b.t_buf_func[4]._y:=1]
+	    520872 b.b.t_buf_func[1].y : 0  [by b.b.t_buf_func[1]._y:=1]
+	    522470 b.b._out_a_BX_f[0] : 0  [by b.b.out_a_B_buf_t.buf2._y:=1]
+	    523757 b.b.f_buf_func[3]._y : 1  [by b.b._out_a_BX_f[0]:=0]
+	    525989 b.b.f_buf_func[3].y : 0  [by b.b.f_buf_func[3]._y:=1]
+	    542146 b.b.f_buf_func[2]._y : 1  [by b.b._out_a_BX_f[0]:=0]
+	    542291 b.b.f_buf_func[2].y : 0  [by b.b.f_buf_func[2]._y:=1]

test/unit_tests/buf_s_5/run/test.prs

@@ -0,0 +1,646 @@
+= "GND" "GND"
+= "Vdd" "Vdd"
+= "Reset" "Reset"
+"Reset"->"b._reset_B"-
+~("Reset")->"b._reset_B"+
+"b.b.out_a_B_buf_t.buf2.a"->"b.b.out_a_B_buf_t.buf2._y"-
+~("b.b.out_a_B_buf_t.buf2.a")->"b.b.out_a_B_buf_t.buf2._y"+
+"b.b.out_a_B_buf_t.buf2._y"->"b.b.out_a_B_buf_t.buf2.y"-
+~("b.b.out_a_B_buf_t.buf2._y")->"b.b.out_a_B_buf_t.buf2.y"+
+= "b.b.out_a_B_buf_t.supply.vdd" "b.b.out_a_B_buf_t.buf2.vdd"
+= "b.b.out_a_B_buf_t.supply.vss" "b.b.out_a_B_buf_t.buf2.vss"
+= "b.b.out_a_B_buf_t.out[0]" "b.b.out_a_B_buf_t.out[4]"
+= "b.b.out_a_B_buf_t.out[0]" "b.b.out_a_B_buf_t.out[3]"
+= "b.b.out_a_B_buf_t.out[0]" "b.b.out_a_B_buf_t.out[2]"
+= "b.b.out_a_B_buf_t.out[0]" "b.b.out_a_B_buf_t.out[1]"
+= "b.b.out_a_B_buf_t.out[0]" "b.b.out_a_B_buf_t.buf2.y"
+= "b.b.out_a_B_buf_t.in" "b.b.out_a_B_buf_t.buf2.a"
+= "b.b._en_X_f[0]" "b.b.en_buf_f.out[0]"
+= "b.b._en_X_f[1]" "b.b.en_buf_f.out[1]"
+= "b.b._en_X_f[2]" "b.b.en_buf_f.out[2]"
+= "b.b._en_X_f[3]" "b.b.en_buf_f.out[3]"
+= "b.b._en_X_f[4]" "b.b.en_buf_f.out[4]"
+= "b.b._en_X_f[0]" "b.b.f_buf_func[4].c1"
+= "b.b._en_X_f[0]" "b.b.f_buf_func[3].c1"
+= "b.b._en_X_f[0]" "b.b.f_buf_func[2].c1"
+= "b.b._en_X_f[0]" "b.b.f_buf_func[1].c1"
+= "b.b._en_X_f[0]" "b.b.f_buf_func[0].c1"
+= "b.b._en_X_f[0]" "b.b._en_X_f[4]"
+= "b.b._en_X_f[0]" "b.b._en_X_f[3]"
+= "b.b._en_X_f[0]" "b.b._en_X_f[2]"
+= "b.b._en_X_f[0]" "b.b._en_X_f[1]"
+~"b.b.inack_ctl.c1"&~"b.b.inack_ctl.c2"&~"b.b.inack_ctl.c3"|~"b.b.inack_ctl.pr_B"->"b.b.inack_ctl._y"+
+"b.b.inack_ctl.c1"&"b.b.inack_ctl.c2"&"b.b.inack_ctl.c3"&"b.b.inack_ctl.sr_B"->"b.b.inack_ctl._y"-
+"b.b.inack_ctl._y"->"b.b.inack_ctl.y"-
+~("b.b.inack_ctl._y")->"b.b.inack_ctl.y"+
+"b.b.reset_bufarray.buf2.a"->"b.b.reset_bufarray.buf2._y"-
+~("b.b.reset_bufarray.buf2.a")->"b.b.reset_bufarray.buf2._y"+
+"b.b.reset_bufarray.buf2._y"->"b.b.reset_bufarray.buf2.y"-
+~("b.b.reset_bufarray.buf2._y")->"b.b.reset_bufarray.buf2.y"+
+= "b.b.reset_bufarray.supply.vdd" "b.b.reset_bufarray.buf2.vdd"
+= "b.b.reset_bufarray.supply.vss" "b.b.reset_bufarray.buf2.vss"
+= "b.b.reset_bufarray.out[0]" "b.b.reset_bufarray.out[4]"
+= "b.b.reset_bufarray.out[0]" "b.b.reset_bufarray.out[3]"
+= "b.b.reset_bufarray.out[0]" "b.b.reset_bufarray.out[2]"
+= "b.b.reset_bufarray.out[0]" "b.b.reset_bufarray.out[1]"
+= "b.b.reset_bufarray.out[0]" "b.b.reset_bufarray.buf2.y"
+= "b.b.reset_bufarray.in" "b.b.reset_bufarray.buf2.a"
+"b.b.in_v_buf4.a"->"b.b.in_v_buf4._y"-
+~("b.b.in_v_buf4.a")->"b.b.in_v_buf4._y"+
+"b.b.in_v_buf4._y"->"b.b.in_v_buf4.y"-
+~("b.b.in_v_buf4._y")->"b.b.in_v_buf4.y"+
+"b.b.out_a_inv.a"->"b.b.out_a_inv.y"-
+~("b.b.out_a_inv.a")->"b.b.out_a_inv.y"+
+= "b.b._out_a_BX_f[0]" "b.b.out_a_B_buf_t.out[0]"
+= "b.b._out_a_BX_f[1]" "b.b.out_a_B_buf_t.out[1]"
+= "b.b._out_a_BX_f[2]" "b.b.out_a_B_buf_t.out[2]"
+= "b.b._out_a_BX_f[3]" "b.b.out_a_B_buf_t.out[3]"
+= "b.b._out_a_BX_f[4]" "b.b.out_a_B_buf_t.out[4]"
+= "b.b._out_a_BX_f[0]" "b.b.f_buf_func[4].c2"
+= "b.b._out_a_BX_f[0]" "b.b.f_buf_func[3].c2"
+= "b.b._out_a_BX_f[0]" "b.b.f_buf_func[2].c2"
+= "b.b._out_a_BX_f[0]" "b.b.f_buf_func[1].c2"
+= "b.b._out_a_BX_f[0]" "b.b.f_buf_func[0].c2"
+= "b.b._out_a_BX_f[0]" "b.b._out_a_BX_f[4]"
+= "b.b._out_a_BX_f[0]" "b.b._out_a_BX_f[3]"
+= "b.b._out_a_BX_f[0]" "b.b._out_a_BX_f[2]"
+= "b.b._out_a_BX_f[0]" "b.b._out_a_BX_f[1]"
+= "b.b.supply.vss" "b.b.en_buf_f.supply.vss"
+= "b.b.supply.vdd" "b.b.en_buf_f.supply.vdd"
+= "b.b.supply.vss" "b.b.en_buf_t.supply.vss"
+= "b.b.supply.vdd" "b.b.en_buf_t.supply.vdd"
+= "b.b.supply.vss" "b.b.in_v_bufN.supply.vss"
+= "b.b.supply.vdd" "b.b.in_v_bufN.supply.vdd"
+= "b.b.supply.vss" "b.b.vc.supply.vss"
+= "b.b.supply.vdd" "b.b.vc.supply.vdd"
+= "b.b.supply.vdd" "b.b.t_buf_func[4].vdd"
+= "b.b.supply.vdd" "b.b.f_buf_func[4].vdd"
+= "b.b.supply.vdd" "b.b.t_buf_func[3].vdd"
+= "b.b.supply.vdd" "b.b.f_buf_func[3].vdd"
+= "b.b.supply.vdd" "b.b.t_buf_func[2].vdd"
+= "b.b.supply.vdd" "b.b.f_buf_func[2].vdd"
+= "b.b.supply.vdd" "b.b.t_buf_func[1].vdd"
+= "b.b.supply.vdd" "b.b.f_buf_func[1].vdd"
+= "b.b.supply.vdd" "b.b.t_buf_func[0].vdd"
+= "b.b.supply.vdd" "b.b.f_buf_func[0].vdd"
+= "b.b.supply.vdd" "b.b.in_v_buf4.vdd"
+= "b.b.supply.vdd" "b.b.reset_buf.vdd"
+= "b.b.supply.vdd" "b.b.en_ctl.vdd"
+= "b.b.supply.vdd" "b.b.inack_ctl.vdd"
+= "b.b.supply.vss" "b.b.t_buf_func[4].vss"
+= "b.b.supply.vss" "b.b.f_buf_func[4].vss"
+= "b.b.supply.vss" "b.b.t_buf_func[3].vss"
+= "b.b.supply.vss" "b.b.f_buf_func[3].vss"
+= "b.b.supply.vss" "b.b.t_buf_func[2].vss"
+= "b.b.supply.vss" "b.b.f_buf_func[2].vss"
+= "b.b.supply.vss" "b.b.t_buf_func[1].vss"
+= "b.b.supply.vss" "b.b.f_buf_func[1].vss"
+= "b.b.supply.vss" "b.b.t_buf_func[0].vss"
+= "b.b.supply.vss" "b.b.f_buf_func[0].vss"
+= "b.b.supply.vss" "b.b.in_v_buf4.vss"
+= "b.b.supply.vss" "b.b.reset_buf.vss"
+= "b.b.supply.vss" "b.b.en_ctl.vss"
+= "b.b.supply.vss" "b.b.inack_ctl.vss"
+~"b.b.vc.C2Els[0].c1"&~"b.b.vc.C2Els[0].c2"->"b.b.vc.C2Els[0]._y"+
+"b.b.vc.C2Els[0].c1"&"b.b.vc.C2Els[0].c2"->"b.b.vc.C2Els[0]._y"-
+"b.b.vc.C2Els[0]._y"->"b.b.vc.C2Els[0].y"-
+~("b.b.vc.C2Els[0]._y")->"b.b.vc.C2Els[0].y"+
+~"b.b.vc.C2Els[1].c1"&~"b.b.vc.C2Els[1].c2"->"b.b.vc.C2Els[1]._y"+
+"b.b.vc.C2Els[1].c1"&"b.b.vc.C2Els[1].c2"->"b.b.vc.C2Els[1]._y"-
+"b.b.vc.C2Els[1]._y"->"b.b.vc.C2Els[1].y"-
+~("b.b.vc.C2Els[1]._y")->"b.b.vc.C2Els[1].y"+
+~"b.b.vc.C3Els[0].c1"&~"b.b.vc.C3Els[0].c2"&~"b.b.vc.C3Els[0].c3"->"b.b.vc.C3Els[0]._y"+
+"b.b.vc.C3Els[0].c1"&"b.b.vc.C3Els[0].c2"&"b.b.vc.C3Els[0].c3"->"b.b.vc.C3Els[0]._y"-
+"b.b.vc.C3Els[0]._y"->"b.b.vc.C3Els[0].y"-
+~("b.b.vc.C3Els[0]._y")->"b.b.vc.C3Els[0].y"+
+"b.b.vc.OR2_tf[0].a"|"b.b.vc.OR2_tf[0].b"->"b.b.vc.OR2_tf[0]._y"-
+~("b.b.vc.OR2_tf[0].a"|"b.b.vc.OR2_tf[0].b")->"b.b.vc.OR2_tf[0]._y"+
+"b.b.vc.OR2_tf[0]._y"->"b.b.vc.OR2_tf[0].y"-
+~("b.b.vc.OR2_tf[0]._y")->"b.b.vc.OR2_tf[0].y"+
+"b.b.vc.OR2_tf[1].a"|"b.b.vc.OR2_tf[1].b"->"b.b.vc.OR2_tf[1]._y"-
+~("b.b.vc.OR2_tf[1].a"|"b.b.vc.OR2_tf[1].b")->"b.b.vc.OR2_tf[1]._y"+
+"b.b.vc.OR2_tf[1]._y"->"b.b.vc.OR2_tf[1].y"-
+~("b.b.vc.OR2_tf[1]._y")->"b.b.vc.OR2_tf[1].y"+
+"b.b.vc.OR2_tf[2].a"|"b.b.vc.OR2_tf[2].b"->"b.b.vc.OR2_tf[2]._y"-
+~("b.b.vc.OR2_tf[2].a"|"b.b.vc.OR2_tf[2].b")->"b.b.vc.OR2_tf[2]._y"+
+"b.b.vc.OR2_tf[2]._y"->"b.b.vc.OR2_tf[2].y"-
+~("b.b.vc.OR2_tf[2]._y")->"b.b.vc.OR2_tf[2].y"+
+"b.b.vc.OR2_tf[3].a"|"b.b.vc.OR2_tf[3].b"->"b.b.vc.OR2_tf[3]._y"-
+~("b.b.vc.OR2_tf[3].a"|"b.b.vc.OR2_tf[3].b")->"b.b.vc.OR2_tf[3]._y"+
+"b.b.vc.OR2_tf[3]._y"->"b.b.vc.OR2_tf[3].y"-
+~("b.b.vc.OR2_tf[3]._y")->"b.b.vc.OR2_tf[3].y"+
+"b.b.vc.OR2_tf[4].a"|"b.b.vc.OR2_tf[4].b"->"b.b.vc.OR2_tf[4]._y"-
+~("b.b.vc.OR2_tf[4].a"|"b.b.vc.OR2_tf[4].b")->"b.b.vc.OR2_tf[4]._y"+
+"b.b.vc.OR2_tf[4]._y"->"b.b.vc.OR2_tf[4].y"-
+~("b.b.vc.OR2_tf[4]._y")->"b.b.vc.OR2_tf[4].y"+
+= "b.b.vc.tmp[0]" "b.b.vc.C2Els[0].c1"
+= "b.b.vc.tmp[0]" "b.b.vc.OR2_tf[0].y"
+= "b.b.vc.tmp[1]" "b.b.vc.C2Els[0].c2"
+= "b.b.vc.tmp[1]" "b.b.vc.OR2_tf[1].y"
+= "b.b.vc.tmp[2]" "b.b.vc.C3Els[0].c1"
+= "b.b.vc.tmp[2]" "b.b.vc.OR2_tf[2].y"
+= "b.b.vc.tmp[3]" "b.b.vc.C3Els[0].c2"
+= "b.b.vc.tmp[3]" "b.b.vc.OR2_tf[3].y"
+= "b.b.vc.tmp[4]" "b.b.vc.C3Els[0].c3"
+= "b.b.vc.tmp[4]" "b.b.vc.OR2_tf[4].y"
+= "b.b.vc.tmp[5]" "b.b.vc.C2Els[1].c1"
+= "b.b.vc.tmp[5]" "b.b.vc.C2Els[0].y"
+= "b.b.vc.tmp[6]" "b.b.vc.C2Els[1].c2"
+= "b.b.vc.tmp[6]" "b.b.vc.C3Els[0].y"
+= "b.b.vc.supply.vdd" "b.b.vc.C3Els[0].vdd"
+= "b.b.vc.supply.vdd" "b.b.vc.C2Els[1].vdd"
+= "b.b.vc.supply.vdd" "b.b.vc.C2Els[0].vdd"
+= "b.b.vc.supply.vdd" "b.b.vc.OR2_tf[4].vdd"
+= "b.b.vc.supply.vdd" "b.b.vc.OR2_tf[3].vdd"
+= "b.b.vc.supply.vdd" "b.b.vc.OR2_tf[2].vdd"
+= "b.b.vc.supply.vdd" "b.b.vc.OR2_tf[1].vdd"
+= "b.b.vc.supply.vdd" "b.b.vc.OR2_tf[0].vdd"
+= "b.b.vc.supply.vss" "b.b.vc.C3Els[0].vss"
+= "b.b.vc.supply.vss" "b.b.vc.C2Els[1].vss"
+= "b.b.vc.supply.vss" "b.b.vc.C2Els[0].vss"
+= "b.b.vc.supply.vss" "b.b.vc.OR2_tf[4].vss"
+= "b.b.vc.supply.vss" "b.b.vc.OR2_tf[3].vss"
+= "b.b.vc.supply.vss" "b.b.vc.OR2_tf[2].vss"
+= "b.b.vc.supply.vss" "b.b.vc.OR2_tf[1].vss"
+= "b.b.vc.supply.vss" "b.b.vc.OR2_tf[0].vss"
+= "b.b.vc.in.d[0].d[0]" "b.b.vc.in.d[0].f"
+= "b.b.vc.in.d[0].d[1]" "b.b.vc.in.d[0].t"
+= "b.b.vc.in.d[1].d[0]" "b.b.vc.in.d[1].f"
+= "b.b.vc.in.d[1].d[1]" "b.b.vc.in.d[1].t"
+= "b.b.vc.in.d[2].d[0]" "b.b.vc.in.d[2].f"
+= "b.b.vc.in.d[2].d[1]" "b.b.vc.in.d[2].t"
+= "b.b.vc.in.d[3].d[0]" "b.b.vc.in.d[3].f"
+= "b.b.vc.in.d[3].d[1]" "b.b.vc.in.d[3].t"
+= "b.b.vc.in.d[4].d[0]" "b.b.vc.in.d[4].f"
+= "b.b.vc.in.d[4].d[1]" "b.b.vc.in.d[4].t"
+= "b.b.vc.in.d[4].d[0]" "b.b.vc.in.d[4].f"
+= "b.b.vc.in.d[4].d[1]" "b.b.vc.in.d[4].t"
+= "b.b.vc.in.d[3].d[0]" "b.b.vc.in.d[3].f"
+= "b.b.vc.in.d[3].d[1]" "b.b.vc.in.d[3].t"
+= "b.b.vc.in.d[2].d[0]" "b.b.vc.in.d[2].f"
+= "b.b.vc.in.d[2].d[1]" "b.b.vc.in.d[2].t"
+= "b.b.vc.in.d[1].d[0]" "b.b.vc.in.d[1].f"
+= "b.b.vc.in.d[1].d[1]" "b.b.vc.in.d[1].t"
+= "b.b.vc.in.d[0].d[0]" "b.b.vc.in.d[0].f"
+= "b.b.vc.in.d[0].d[1]" "b.b.vc.in.d[0].t"
+= "b.b.vc.in.d[4].d[0]" "b.b.vc.OR2_tf[4].b"
+= "b.b.vc.in.d[4].d[0]" "b.b.vc.in.d[4].f"
+= "b.b.vc.in.d[4].d[1]" "b.b.vc.OR2_tf[4].a"
+= "b.b.vc.in.d[4].d[1]" "b.b.vc.in.d[4].t"
+= "b.b.vc.in.d[3].d[0]" "b.b.vc.OR2_tf[3].b"
+= "b.b.vc.in.d[3].d[0]" "b.b.vc.in.d[3].f"
+= "b.b.vc.in.d[3].d[1]" "b.b.vc.OR2_tf[3].a"
+= "b.b.vc.in.d[3].d[1]" "b.b.vc.in.d[3].t"
+= "b.b.vc.in.d[2].d[0]" "b.b.vc.OR2_tf[2].b"
+= "b.b.vc.in.d[2].d[0]" "b.b.vc.in.d[2].f"
+= "b.b.vc.in.d[2].d[1]" "b.b.vc.OR2_tf[2].a"
+= "b.b.vc.in.d[2].d[1]" "b.b.vc.in.d[2].t"
+= "b.b.vc.in.d[1].d[0]" "b.b.vc.OR2_tf[1].b"
+= "b.b.vc.in.d[1].d[0]" "b.b.vc.in.d[1].f"
+= "b.b.vc.in.d[1].d[1]" "b.b.vc.OR2_tf[1].a"
+= "b.b.vc.in.d[1].d[1]" "b.b.vc.in.d[1].t"
+= "b.b.vc.in.d[0].d[0]" "b.b.vc.OR2_tf[0].b"
+= "b.b.vc.in.d[0].d[0]" "b.b.vc.in.d[0].f"
+= "b.b.vc.in.d[0].d[1]" "b.b.vc.OR2_tf[0].a"
+= "b.b.vc.in.d[0].d[1]" "b.b.vc.in.d[0].t"
+= "b.b.vc.out" "b.b.vc.C2Els[1].y"
+= "b.b.vc.out" "b.b.vc.tmp[7]"
+"b.b.out_a_B_buf_f.buf2.a"->"b.b.out_a_B_buf_f.buf2._y"-
+~("b.b.out_a_B_buf_f.buf2.a")->"b.b.out_a_B_buf_f.buf2._y"+
+"b.b.out_a_B_buf_f.buf2._y"->"b.b.out_a_B_buf_f.buf2.y"-
+~("b.b.out_a_B_buf_f.buf2._y")->"b.b.out_a_B_buf_f.buf2.y"+
+= "b.b.out_a_B_buf_f.supply.vdd" "b.b.out_a_B_buf_f.buf2.vdd"
+= "b.b.out_a_B_buf_f.supply.vss" "b.b.out_a_B_buf_f.buf2.vss"
+= "b.b.out_a_B_buf_f.out[0]" "b.b.out_a_B_buf_f.out[4]"
+= "b.b.out_a_B_buf_f.out[0]" "b.b.out_a_B_buf_f.out[3]"
+= "b.b.out_a_B_buf_f.out[0]" "b.b.out_a_B_buf_f.out[2]"
+= "b.b.out_a_B_buf_f.out[0]" "b.b.out_a_B_buf_f.out[1]"
+= "b.b.out_a_B_buf_f.out[0]" "b.b.out_a_B_buf_f.buf2.y"
+= "b.b.out_a_B_buf_f.in" "b.b.out_a_B_buf_f.buf2.a"
+= "b.b._en" "b.b.en_buf_f.in"
+= "b.b._en" "b.b.en_buf_t.in"
+= "b.b._en" "b.b.en_ctl.y"
+= "b.b._en" "b.b.inack_ctl.c1"
+~"b.b.en_ctl.p1"&~"b.b.en_ctl.c1"->"b.b.en_ctl.y"+
+"b.b.en_ctl.c1"->"b.b.en_ctl.y"-
+= "b.b.out.d.d[0].d[0]" "b.b.out.d.d[0].f"
+= "b.b.out.d.d[0].d[1]" "b.b.out.d.d[0].t"
+= "b.b.out.d.d[1].d[0]" "b.b.out.d.d[1].f"
+= "b.b.out.d.d[1].d[1]" "b.b.out.d.d[1].t"
+= "b.b.out.d.d[2].d[0]" "b.b.out.d.d[2].f"
+= "b.b.out.d.d[2].d[1]" "b.b.out.d.d[2].t"
+= "b.b.out.d.d[3].d[0]" "b.b.out.d.d[3].f"
+= "b.b.out.d.d[3].d[1]" "b.b.out.d.d[3].t"
+= "b.b.out.d.d[4].d[0]" "b.b.out.d.d[4].f"
+= "b.b.out.d.d[4].d[1]" "b.b.out.d.d[4].t"
+= "b.b.out.d.d[4].d[0]" "b.b.out.d.d[4].f"
+= "b.b.out.d.d[4].d[1]" "b.b.out.d.d[4].t"
+= "b.b.out.d.d[3].d[0]" "b.b.out.d.d[3].f"
+= "b.b.out.d.d[3].d[1]" "b.b.out.d.d[3].t"
+= "b.b.out.d.d[2].d[0]" "b.b.out.d.d[2].f"
+= "b.b.out.d.d[2].d[1]" "b.b.out.d.d[2].t"
+= "b.b.out.d.d[1].d[0]" "b.b.out.d.d[1].f"
+= "b.b.out.d.d[1].d[1]" "b.b.out.d.d[1].t"
+= "b.b.out.d.d[0].d[0]" "b.b.out.d.d[0].f"
+= "b.b.out.d.d[0].d[1]" "b.b.out.d.d[0].t"
+= "b.b.out.d.d[4].d[0]" "b.b.out.d.d[4].f"
+= "b.b.out.d.d[4].d[1]" "b.b.out.d.d[4].t"
+= "b.b.out.d.d[3].d[0]" "b.b.out.d.d[3].f"
+= "b.b.out.d.d[3].d[1]" "b.b.out.d.d[3].t"
+= "b.b.out.d.d[2].d[0]" "b.b.out.d.d[2].f"
+= "b.b.out.d.d[2].d[1]" "b.b.out.d.d[2].t"
+= "b.b.out.d.d[1].d[0]" "b.b.out.d.d[1].f"
+= "b.b.out.d.d[1].d[1]" "b.b.out.d.d[1].t"
+= "b.b.out.d.d[0].d[0]" "b.b.out.d.d[0].f"
+= "b.b.out.d.d[0].d[1]" "b.b.out.d.d[0].t"
+= "b.b.out.a" "b.b.out_a_inv.a"
+= "b.b.out.v" "b.b.en_ctl.p1"
+= "b.b.out.v" "b.b.inack_ctl.c3"
+= "b.b.out.d.d[4].d[0]" "b.b.f_buf_func[4].y"
+= "b.b.out.d.d[4].d[0]" "b.b.out.d.d[4].f"
+= "b.b.out.d.d[4].d[1]" "b.b.t_buf_func[4].y"
+= "b.b.out.d.d[4].d[1]" "b.b.out.d.d[4].t"
+= "b.b.out.d.d[3].d[0]" "b.b.f_buf_func[3].y"
+= "b.b.out.d.d[3].d[0]" "b.b.out.d.d[3].f"
+= "b.b.out.d.d[3].d[1]" "b.b.t_buf_func[3].y"
+= "b.b.out.d.d[3].d[1]" "b.b.out.d.d[3].t"
+= "b.b.out.d.d[2].d[0]" "b.b.f_buf_func[2].y"
+= "b.b.out.d.d[2].d[0]" "b.b.out.d.d[2].f"
+= "b.b.out.d.d[2].d[1]" "b.b.t_buf_func[2].y"
+= "b.b.out.d.d[2].d[1]" "b.b.out.d.d[2].t"
+= "b.b.out.d.d[1].d[0]" "b.b.f_buf_func[1].y"
+= "b.b.out.d.d[1].d[0]" "b.b.out.d.d[1].f"
+= "b.b.out.d.d[1].d[1]" "b.b.t_buf_func[1].y"
+= "b.b.out.d.d[1].d[1]" "b.b.out.d.d[1].t"
+= "b.b.out.d.d[0].d[0]" "b.b.f_buf_func[0].y"
+= "b.b.out.d.d[0].d[0]" "b.b.out.d.d[0].f"
+= "b.b.out.d.d[0].d[1]" "b.b.t_buf_func[0].y"
+= "b.b.out.d.d[0].d[1]" "b.b.out.d.d[0].t"
+= "b.b.in.d.d[0].d[0]" "b.b.in.d.d[0].f"
+= "b.b.in.d.d[0].d[1]" "b.b.in.d.d[0].t"
+= "b.b.in.d.d[1].d[0]" "b.b.in.d.d[1].f"
+= "b.b.in.d.d[1].d[1]" "b.b.in.d.d[1].t"
+= "b.b.in.d.d[2].d[0]" "b.b.in.d.d[2].f"
+= "b.b.in.d.d[2].d[1]" "b.b.in.d.d[2].t"
+= "b.b.in.d.d[3].d[0]" "b.b.in.d.d[3].f"
+= "b.b.in.d.d[3].d[1]" "b.b.in.d.d[3].t"
+= "b.b.in.d.d[4].d[0]" "b.b.in.d.d[4].f"
+= "b.b.in.d.d[4].d[1]" "b.b.in.d.d[4].t"
+= "b.b.in.d.d[4].d[0]" "b.b.in.d.d[4].f"
+= "b.b.in.d.d[4].d[1]" "b.b.in.d.d[4].t"
+= "b.b.in.d.d[3].d[0]" "b.b.in.d.d[3].f"
+= "b.b.in.d.d[3].d[1]" "b.b.in.d.d[3].t"
+= "b.b.in.d.d[2].d[0]" "b.b.in.d.d[2].f"
+= "b.b.in.d.d[2].d[1]" "b.b.in.d.d[2].t"
+= "b.b.in.d.d[1].d[0]" "b.b.in.d.d[1].f"
+= "b.b.in.d.d[1].d[1]" "b.b.in.d.d[1].t"
+= "b.b.in.d.d[0].d[0]" "b.b.in.d.d[0].f"
+= "b.b.in.d.d[0].d[1]" "b.b.in.d.d[0].t"
+= "b.b.in.d.d[4].d[0]" "b.b.in.d.d[4].f"
+= "b.b.in.d.d[4].d[1]" "b.b.in.d.d[4].t"
+= "b.b.in.d.d[3].d[0]" "b.b.in.d.d[3].f"
+= "b.b.in.d.d[3].d[1]" "b.b.in.d.d[3].t"
+= "b.b.in.d.d[2].d[0]" "b.b.in.d.d[2].f"
+= "b.b.in.d.d[2].d[1]" "b.b.in.d.d[2].t"
+= "b.b.in.d.d[1].d[0]" "b.b.in.d.d[1].f"
+= "b.b.in.d.d[1].d[1]" "b.b.in.d.d[1].t"
+= "b.b.in.d.d[0].d[0]" "b.b.in.d.d[0].f"
+= "b.b.in.d.d[0].d[1]" "b.b.in.d.d[0].t"
+= "b.b.in.d.d[0].f" "b.b.vc.in.d[0].f"
+= "b.b.in.d.d[0].t" "b.b.vc.in.d[0].t"
+= "b.b.in.d.d[0].d[0]" "b.b.vc.in.d[0].d[0]"
+= "b.b.in.d.d[0].d[1]" "b.b.vc.in.d[0].d[1]"
+= "b.b.in.d.d[1].f" "b.b.vc.in.d[1].f"
+= "b.b.in.d.d[1].t" "b.b.vc.in.d[1].t"
+= "b.b.in.d.d[1].d[0]" "b.b.vc.in.d[1].d[0]"
+= "b.b.in.d.d[1].d[1]" "b.b.vc.in.d[1].d[1]"
+= "b.b.in.d.d[2].f" "b.b.vc.in.d[2].f"
+= "b.b.in.d.d[2].t" "b.b.vc.in.d[2].t"
+= "b.b.in.d.d[2].d[0]" "b.b.vc.in.d[2].d[0]"
+= "b.b.in.d.d[2].d[1]" "b.b.vc.in.d[2].d[1]"
+= "b.b.in.d.d[3].f" "b.b.vc.in.d[3].f"
+= "b.b.in.d.d[3].t" "b.b.vc.in.d[3].t"
+= "b.b.in.d.d[3].d[0]" "b.b.vc.in.d[3].d[0]"
+= "b.b.in.d.d[3].d[1]" "b.b.vc.in.d[3].d[1]"
+= "b.b.in.d.d[4].f" "b.b.vc.in.d[4].f"
+= "b.b.in.d.d[4].t" "b.b.vc.in.d[4].t"
+= "b.b.in.d.d[4].d[0]" "b.b.vc.in.d[4].d[0]"
+= "b.b.in.d.d[4].d[1]" "b.b.vc.in.d[4].d[1]"
+= "b.b.in.a" "b.b.en_ctl.c1"
+= "b.b.in.a" "b.b.inack_ctl.y"
+= "b.b.in.v" "b.b.in_v_bufN.in"
+= "b.b.in.v" "b.b.in_v_buf4.y"
+= "b.b.in.v" "b.b.inack_ctl.c2"
+= "b.b.in.d.d[4].d[0]" "b.b.f_buf_func[4].n1"
+= "b.b.in.d.d[4].d[0]" "b.b.in.d.d[4].f"
+= "b.b.in.d.d[4].d[1]" "b.b.t_buf_func[4].n1"
+= "b.b.in.d.d[4].d[1]" "b.b.in.d.d[4].t"
+= "b.b.in.d.d[3].d[0]" "b.b.f_buf_func[3].n1"
+= "b.b.in.d.d[3].d[0]" "b.b.in.d.d[3].f"
+= "b.b.in.d.d[3].d[1]" "b.b.t_buf_func[3].n1"
+= "b.b.in.d.d[3].d[1]" "b.b.in.d.d[3].t"
+= "b.b.in.d.d[2].d[0]" "b.b.f_buf_func[2].n1"
+= "b.b.in.d.d[2].d[0]" "b.b.in.d.d[2].f"
+= "b.b.in.d.d[2].d[1]" "b.b.t_buf_func[2].n1"
+= "b.b.in.d.d[2].d[1]" "b.b.in.d.d[2].t"
+= "b.b.in.d.d[1].d[0]" "b.b.f_buf_func[1].n1"
+= "b.b.in.d.d[1].d[0]" "b.b.in.d.d[1].f"
+= "b.b.in.d.d[1].d[1]" "b.b.t_buf_func[1].n1"
+= "b.b.in.d.d[1].d[1]" "b.b.in.d.d[1].t"
+= "b.b.in.d.d[0].d[0]" "b.b.f_buf_func[0].n1"
+= "b.b.in.d.d[0].d[0]" "b.b.in.d.d[0].f"
+= "b.b.in.d.d[0].d[1]" "b.b.t_buf_func[0].n1"
+= "b.b.in.d.d[0].d[1]" "b.b.in.d.d[0].t"
+"b.b.reset_buf.a"->"b.b.reset_buf._y"-
+~("b.b.reset_buf.a")->"b.b.reset_buf._y"+
+"b.b.reset_buf._y"->"b.b.reset_buf.y"-
+~("b.b.reset_buf._y")->"b.b.reset_buf.y"+
+= "b.b._in_v" "b.b.in_v_buf4.a"
+= "b.b._in_v" "b.b.vc.out"
+= "b.b._out_a_BX_t[0]" "b.b.out_a_B_buf_f.out[0]"
+= "b.b._out_a_BX_t[1]" "b.b.out_a_B_buf_f.out[1]"
+= "b.b._out_a_BX_t[2]" "b.b.out_a_B_buf_f.out[2]"
+= "b.b._out_a_BX_t[3]" "b.b.out_a_B_buf_f.out[3]"
+= "b.b._out_a_BX_t[4]" "b.b.out_a_B_buf_f.out[4]"
+= "b.b._out_a_BX_t[0]" "b.b.t_buf_func[4].c2"
+= "b.b._out_a_BX_t[0]" "b.b.t_buf_func[3].c2"
+= "b.b._out_a_BX_t[0]" "b.b.t_buf_func[2].c2"
+= "b.b._out_a_BX_t[0]" "b.b.t_buf_func[1].c2"
+= "b.b._out_a_BX_t[0]" "b.b.t_buf_func[0].c2"
+= "b.b._out_a_BX_t[0]" "b.b._out_a_BX_t[4]"
+= "b.b._out_a_BX_t[0]" "b.b._out_a_BX_t[3]"
+= "b.b._out_a_BX_t[0]" "b.b._out_a_BX_t[2]"
+= "b.b._out_a_BX_t[0]" "b.b._out_a_BX_t[1]"
+= "b.b._reset_BX" "b.b.reset_bufarray.in"
+= "b.b._reset_BX" "b.b.reset_buf.y"
+= "b.b._reset_BX" "b.b.inack_ctl.sr_B"
+= "b.b._reset_BX" "b.b.inack_ctl.pr_B"
+= "b.b.reset_B" "b.b.reset_buf.a"
+"b.b.en_buf_f.buf2.a"->"b.b.en_buf_f.buf2._y"-
+~("b.b.en_buf_f.buf2.a")->"b.b.en_buf_f.buf2._y"+
+"b.b.en_buf_f.buf2._y"->"b.b.en_buf_f.buf2.y"-
+~("b.b.en_buf_f.buf2._y")->"b.b.en_buf_f.buf2.y"+
+= "b.b.en_buf_f.supply.vdd" "b.b.en_buf_f.buf2.vdd"
+= "b.b.en_buf_f.supply.vss" "b.b.en_buf_f.buf2.vss"
+= "b.b.en_buf_f.out[0]" "b.b.en_buf_f.out[4]"
+= "b.b.en_buf_f.out[0]" "b.b.en_buf_f.out[3]"
+= "b.b.en_buf_f.out[0]" "b.b.en_buf_f.out[2]"
+= "b.b.en_buf_f.out[0]" "b.b.en_buf_f.out[1]"
+= "b.b.en_buf_f.out[0]" "b.b.en_buf_f.buf2.y"
+= "b.b.en_buf_f.in" "b.b.en_buf_f.buf2.a"
+"b.b.en_buf_t.buf2.a"->"b.b.en_buf_t.buf2._y"-
+~("b.b.en_buf_t.buf2.a")->"b.b.en_buf_t.buf2._y"+
+"b.b.en_buf_t.buf2._y"->"b.b.en_buf_t.buf2.y"-
+~("b.b.en_buf_t.buf2._y")->"b.b.en_buf_t.buf2.y"+
+= "b.b.en_buf_t.supply.vdd" "b.b.en_buf_t.buf2.vdd"
+= "b.b.en_buf_t.supply.vss" "b.b.en_buf_t.buf2.vss"
+= "b.b.en_buf_t.out[0]" "b.b.en_buf_t.out[4]"
+= "b.b.en_buf_t.out[0]" "b.b.en_buf_t.out[3]"
+= "b.b.en_buf_t.out[0]" "b.b.en_buf_t.out[2]"
+= "b.b.en_buf_t.out[0]" "b.b.en_buf_t.out[1]"
+= "b.b.en_buf_t.out[0]" "b.b.en_buf_t.buf2.y"
+= "b.b.en_buf_t.in" "b.b.en_buf_t.buf2.a"
+= "b.b._out_a_B" "b.b.out_a_B_buf_t.in"
+= "b.b._out_a_B" "b.b.out_a_B_buf_f.in"
+= "b.b._out_a_B" "b.b.out_a_inv.y"
+= "b.b._reset_BXX[0]" "b.b.reset_bufarray.out[0]"
+= "b.b._reset_BXX[1]" "b.b.reset_bufarray.out[1]"
+= "b.b._reset_BXX[2]" "b.b.reset_bufarray.out[2]"
+= "b.b._reset_BXX[3]" "b.b.reset_bufarray.out[3]"
+= "b.b._reset_BXX[4]" "b.b.reset_bufarray.out[4]"
+= "b.b._reset_BXX[0]" "b.b.f_buf_func[4].sr_B"
+= "b.b._reset_BXX[0]" "b.b.f_buf_func[4].pr_B"
+= "b.b._reset_BXX[0]" "b.b.t_buf_func[4].sr_B"
+= "b.b._reset_BXX[0]" "b.b.t_buf_func[4].pr_B"
+= "b.b._reset_BXX[0]" "b.b.f_buf_func[3].sr_B"
+= "b.b._reset_BXX[0]" "b.b.f_buf_func[3].pr_B"
+= "b.b._reset_BXX[0]" "b.b.t_buf_func[3].sr_B"
+= "b.b._reset_BXX[0]" "b.b.t_buf_func[3].pr_B"
+= "b.b._reset_BXX[0]" "b.b.f_buf_func[2].sr_B"
+= "b.b._reset_BXX[0]" "b.b.f_buf_func[2].pr_B"
+= "b.b._reset_BXX[0]" "b.b.t_buf_func[2].sr_B"
+= "b.b._reset_BXX[0]" "b.b.t_buf_func[2].pr_B"
+= "b.b._reset_BXX[0]" "b.b.f_buf_func[1].sr_B"
+= "b.b._reset_BXX[0]" "b.b.f_buf_func[1].pr_B"
+= "b.b._reset_BXX[0]" "b.b.t_buf_func[1].sr_B"
+= "b.b._reset_BXX[0]" "b.b.t_buf_func[1].pr_B"
+= "b.b._reset_BXX[0]" "b.b.f_buf_func[0].sr_B"
+= "b.b._reset_BXX[0]" "b.b.f_buf_func[0].pr_B"
+= "b.b._reset_BXX[0]" "b.b.t_buf_func[0].sr_B"
+= "b.b._reset_BXX[0]" "b.b.t_buf_func[0].pr_B"
+= "b.b._reset_BXX[0]" "b.b._reset_BXX[4]"
+= "b.b._reset_BXX[0]" "b.b._reset_BXX[3]"
+= "b.b._reset_BXX[0]" "b.b._reset_BXX[2]"
+= "b.b._reset_BXX[0]" "b.b._reset_BXX[1]"
+= "b.b._in_vX[0]" "b.b.in_v_bufN.out[0]"
+= "b.b._in_vX[1]" "b.b.in_v_bufN.out[1]"
+= "b.b._in_vX[2]" "b.b.in_v_bufN.out[2]"
+= "b.b._in_vX[3]" "b.b.in_v_bufN.out[3]"
+= "b.b._in_vX[4]" "b.b.in_v_bufN.out[4]"
+= "b.b._in_vX[0]" "b.b.t_buf_func[4].n2"
+= "b.b._in_vX[0]" "b.b.f_buf_func[4].n2"
+= "b.b._in_vX[0]" "b.b.t_buf_func[3].n2"
+= "b.b._in_vX[0]" "b.b.f_buf_func[3].n2"
+= "b.b._in_vX[0]" "b.b.t_buf_func[2].n2"
+= "b.b._in_vX[0]" "b.b.f_buf_func[2].n2"
+= "b.b._in_vX[0]" "b.b.t_buf_func[1].n2"
+= "b.b._in_vX[0]" "b.b.f_buf_func[1].n2"
+= "b.b._in_vX[0]" "b.b.t_buf_func[0].n2"
+= "b.b._in_vX[0]" "b.b.f_buf_func[0].n2"
+= "b.b._in_vX[0]" "b.b._in_vX[4]"
+= "b.b._in_vX[0]" "b.b._in_vX[3]"
+= "b.b._in_vX[0]" "b.b._in_vX[2]"
+= "b.b._in_vX[0]" "b.b._in_vX[1]"
+"b.b.in_v_bufN.buf2.a"->"b.b.in_v_bufN.buf2._y"-
+~("b.b.in_v_bufN.buf2.a")->"b.b.in_v_bufN.buf2._y"+
+"b.b.in_v_bufN.buf2._y"->"b.b.in_v_bufN.buf2.y"-
+~("b.b.in_v_bufN.buf2._y")->"b.b.in_v_bufN.buf2.y"+
+= "b.b.in_v_bufN.supply.vdd" "b.b.in_v_bufN.buf2.vdd"
+= "b.b.in_v_bufN.supply.vss" "b.b.in_v_bufN.buf2.vss"
+= "b.b.in_v_bufN.out[0]" "b.b.in_v_bufN.out[4]"
+= "b.b.in_v_bufN.out[0]" "b.b.in_v_bufN.out[3]"
+= "b.b.in_v_bufN.out[0]" "b.b.in_v_bufN.out[2]"
+= "b.b.in_v_bufN.out[0]" "b.b.in_v_bufN.out[1]"
+= "b.b.in_v_bufN.out[0]" "b.b.in_v_bufN.buf2.y"
+= "b.b.in_v_bufN.in" "b.b.in_v_bufN.buf2.a"
+~"b.b.t_buf_func[0].c1"&~"b.b.t_buf_func[0].c2"|~"b.b.t_buf_func[0].pr_B"->"b.b.t_buf_func[0]._y"+
+"b.b.t_buf_func[0].c1"&"b.b.t_buf_func[0].c2"&"b.b.t_buf_func[0].n1"&"b.b.t_buf_func[0].n2"&"b.b.t_buf_func[0].sr_B"->"b.b.t_buf_func[0]._y"-
+"b.b.t_buf_func[0]._y"->"b.b.t_buf_func[0].y"-
+~("b.b.t_buf_func[0]._y")->"b.b.t_buf_func[0].y"+
+~"b.b.t_buf_func[1].c1"&~"b.b.t_buf_func[1].c2"|~"b.b.t_buf_func[1].pr_B"->"b.b.t_buf_func[1]._y"+
+"b.b.t_buf_func[1].c1"&"b.b.t_buf_func[1].c2"&"b.b.t_buf_func[1].n1"&"b.b.t_buf_func[1].n2"&"b.b.t_buf_func[1].sr_B"->"b.b.t_buf_func[1]._y"-
+"b.b.t_buf_func[1]._y"->"b.b.t_buf_func[1].y"-
+~("b.b.t_buf_func[1]._y")->"b.b.t_buf_func[1].y"+
+~"b.b.t_buf_func[2].c1"&~"b.b.t_buf_func[2].c2"|~"b.b.t_buf_func[2].pr_B"->"b.b.t_buf_func[2]._y"+
+"b.b.t_buf_func[2].c1"&"b.b.t_buf_func[2].c2"&"b.b.t_buf_func[2].n1"&"b.b.t_buf_func[2].n2"&"b.b.t_buf_func[2].sr_B"->"b.b.t_buf_func[2]._y"-
+"b.b.t_buf_func[2]._y"->"b.b.t_buf_func[2].y"-
+~("b.b.t_buf_func[2]._y")->"b.b.t_buf_func[2].y"+
+~"b.b.t_buf_func[3].c1"&~"b.b.t_buf_func[3].c2"|~"b.b.t_buf_func[3].pr_B"->"b.b.t_buf_func[3]._y"+
+"b.b.t_buf_func[3].c1"&"b.b.t_buf_func[3].c2"&"b.b.t_buf_func[3].n1"&"b.b.t_buf_func[3].n2"&"b.b.t_buf_func[3].sr_B"->"b.b.t_buf_func[3]._y"-
+"b.b.t_buf_func[3]._y"->"b.b.t_buf_func[3].y"-
+~("b.b.t_buf_func[3]._y")->"b.b.t_buf_func[3].y"+
+~"b.b.t_buf_func[4].c1"&~"b.b.t_buf_func[4].c2"|~"b.b.t_buf_func[4].pr_B"->"b.b.t_buf_func[4]._y"+
+"b.b.t_buf_func[4].c1"&"b.b.t_buf_func[4].c2"&"b.b.t_buf_func[4].n1"&"b.b.t_buf_func[4].n2"&"b.b.t_buf_func[4].sr_B"->"b.b.t_buf_func[4]._y"-
+"b.b.t_buf_func[4]._y"->"b.b.t_buf_func[4].y"-
+~("b.b.t_buf_func[4]._y")->"b.b.t_buf_func[4].y"+
+~"b.b.f_buf_func[0].c1"&~"b.b.f_buf_func[0].c2"|~"b.b.f_buf_func[0].pr_B"->"b.b.f_buf_func[0]._y"+
+"b.b.f_buf_func[0].c1"&"b.b.f_buf_func[0].c2"&"b.b.f_buf_func[0].n1"&"b.b.f_buf_func[0].n2"&"b.b.f_buf_func[0].sr_B"->"b.b.f_buf_func[0]._y"-
+"b.b.f_buf_func[0]._y"->"b.b.f_buf_func[0].y"-
+~("b.b.f_buf_func[0]._y")->"b.b.f_buf_func[0].y"+
+~"b.b.f_buf_func[1].c1"&~"b.b.f_buf_func[1].c2"|~"b.b.f_buf_func[1].pr_B"->"b.b.f_buf_func[1]._y"+
+"b.b.f_buf_func[1].c1"&"b.b.f_buf_func[1].c2"&"b.b.f_buf_func[1].n1"&"b.b.f_buf_func[1].n2"&"b.b.f_buf_func[1].sr_B"->"b.b.f_buf_func[1]._y"-
+"b.b.f_buf_func[1]._y"->"b.b.f_buf_func[1].y"-
+~("b.b.f_buf_func[1]._y")->"b.b.f_buf_func[1].y"+
+~"b.b.f_buf_func[2].c1"&~"b.b.f_buf_func[2].c2"|~"b.b.f_buf_func[2].pr_B"->"b.b.f_buf_func[2]._y"+
+"b.b.f_buf_func[2].c1"&"b.b.f_buf_func[2].c2"&"b.b.f_buf_func[2].n1"&"b.b.f_buf_func[2].n2"&"b.b.f_buf_func[2].sr_B"->"b.b.f_buf_func[2]._y"-
+"b.b.f_buf_func[2]._y"->"b.b.f_buf_func[2].y"-
+~("b.b.f_buf_func[2]._y")->"b.b.f_buf_func[2].y"+
+~"b.b.f_buf_func[3].c1"&~"b.b.f_buf_func[3].c2"|~"b.b.f_buf_func[3].pr_B"->"b.b.f_buf_func[3]._y"+
+"b.b.f_buf_func[3].c1"&"b.b.f_buf_func[3].c2"&"b.b.f_buf_func[3].n1"&"b.b.f_buf_func[3].n2"&"b.b.f_buf_func[3].sr_B"->"b.b.f_buf_func[3]._y"-
+"b.b.f_buf_func[3]._y"->"b.b.f_buf_func[3].y"-
+~("b.b.f_buf_func[3]._y")->"b.b.f_buf_func[3].y"+
+~"b.b.f_buf_func[4].c1"&~"b.b.f_buf_func[4].c2"|~"b.b.f_buf_func[4].pr_B"->"b.b.f_buf_func[4]._y"+
+"b.b.f_buf_func[4].c1"&"b.b.f_buf_func[4].c2"&"b.b.f_buf_func[4].n1"&"b.b.f_buf_func[4].n2"&"b.b.f_buf_func[4].sr_B"->"b.b.f_buf_func[4]._y"-
+"b.b.f_buf_func[4]._y"->"b.b.f_buf_func[4].y"-
+~("b.b.f_buf_func[4]._y")->"b.b.f_buf_func[4].y"+
+= "b.b._en_X_t[0]" "b.b.en_buf_t.out[0]"
+= "b.b._en_X_t[1]" "b.b.en_buf_t.out[1]"
+= "b.b._en_X_t[2]" "b.b.en_buf_t.out[2]"
+= "b.b._en_X_t[3]" "b.b.en_buf_t.out[3]"
+= "b.b._en_X_t[4]" "b.b.en_buf_t.out[4]"
+= "b.b._en_X_t[0]" "b.b.t_buf_func[4].c1"
+= "b.b._en_X_t[0]" "b.b.t_buf_func[3].c1"
+= "b.b._en_X_t[0]" "b.b.t_buf_func[2].c1"
+= "b.b._en_X_t[0]" "b.b.t_buf_func[1].c1"
+= "b.b._en_X_t[0]" "b.b.t_buf_func[0].c1"
+= "b.b._en_X_t[0]" "b.b._en_X_t[4]"
+= "b.b._en_X_t[0]" "b.b._en_X_t[3]"
+= "b.b._en_X_t[0]" "b.b._en_X_t[2]"
+= "b.b._en_X_t[0]" "b.b._en_X_t[1]"
+= "Vdd" "b.b.supply.vdd"
+= "GND" "b.b.supply.vss"
+= "b._reset_B" "b.b.reset_B"
+= "b.out.d.d[0].d[0]" "b.out.d.d[0].f"
+= "b.out.d.d[0].d[1]" "b.out.d.d[0].t"
+= "b.out.d.d[1].d[0]" "b.out.d.d[1].f"
+= "b.out.d.d[1].d[1]" "b.out.d.d[1].t"
+= "b.out.d.d[2].d[0]" "b.out.d.d[2].f"
+= "b.out.d.d[2].d[1]" "b.out.d.d[2].t"
+= "b.out.d.d[3].d[0]" "b.out.d.d[3].f"
+= "b.out.d.d[3].d[1]" "b.out.d.d[3].t"
+= "b.out.d.d[4].d[0]" "b.out.d.d[4].f"
+= "b.out.d.d[4].d[1]" "b.out.d.d[4].t"
+= "b.out.d.d[4].d[0]" "b.out.d.d[4].f"
+= "b.out.d.d[4].d[1]" "b.out.d.d[4].t"
+= "b.out.d.d[3].d[0]" "b.out.d.d[3].f"
+= "b.out.d.d[3].d[1]" "b.out.d.d[3].t"
+= "b.out.d.d[2].d[0]" "b.out.d.d[2].f"
+= "b.out.d.d[2].d[1]" "b.out.d.d[2].t"
+= "b.out.d.d[1].d[0]" "b.out.d.d[1].f"
+= "b.out.d.d[1].d[1]" "b.out.d.d[1].t"
+= "b.out.d.d[0].d[0]" "b.out.d.d[0].f"
+= "b.out.d.d[0].d[1]" "b.out.d.d[0].t"
+= "b.out.d.d[4].d[0]" "b.out.d.d[4].f"
+= "b.out.d.d[4].d[1]" "b.out.d.d[4].t"
+= "b.out.d.d[3].d[0]" "b.out.d.d[3].f"
+= "b.out.d.d[3].d[1]" "b.out.d.d[3].t"
+= "b.out.d.d[2].d[0]" "b.out.d.d[2].f"
+= "b.out.d.d[2].d[1]" "b.out.d.d[2].t"
+= "b.out.d.d[1].d[0]" "b.out.d.d[1].f"
+= "b.out.d.d[1].d[1]" "b.out.d.d[1].t"
+= "b.out.d.d[0].d[0]" "b.out.d.d[0].f"
+= "b.out.d.d[0].d[1]" "b.out.d.d[0].t"
+= "b.out.v" "b.b.out.v"
+= "b.out.a" "b.b.out.a"
+= "b.out.d.d[0].f" "b.b.out.d.d[0].f"
+= "b.out.d.d[0].t" "b.b.out.d.d[0].t"
+= "b.out.d.d[0].d[0]" "b.b.out.d.d[0].d[0]"
+= "b.out.d.d[0].d[1]" "b.b.out.d.d[0].d[1]"
+= "b.out.d.d[1].f" "b.b.out.d.d[1].f"
+= "b.out.d.d[1].t" "b.b.out.d.d[1].t"
+= "b.out.d.d[1].d[0]" "b.b.out.d.d[1].d[0]"
+= "b.out.d.d[1].d[1]" "b.b.out.d.d[1].d[1]"
+= "b.out.d.d[2].f" "b.b.out.d.d[2].f"
+= "b.out.d.d[2].t" "b.b.out.d.d[2].t"
+= "b.out.d.d[2].d[0]" "b.b.out.d.d[2].d[0]"
+= "b.out.d.d[2].d[1]" "b.b.out.d.d[2].d[1]"
+= "b.out.d.d[3].f" "b.b.out.d.d[3].f"
+= "b.out.d.d[3].t" "b.b.out.d.d[3].t"
+= "b.out.d.d[3].d[0]" "b.b.out.d.d[3].d[0]"
+= "b.out.d.d[3].d[1]" "b.b.out.d.d[3].d[1]"
+= "b.out.d.d[4].f" "b.b.out.d.d[4].f"
+= "b.out.d.d[4].t" "b.b.out.d.d[4].t"
+= "b.out.d.d[4].d[0]" "b.b.out.d.d[4].d[0]"
+= "b.out.d.d[4].d[1]" "b.b.out.d.d[4].d[1]"
+= "b.out.d.d[4].d[0]" "b.out.d.d[4].f"
+= "b.out.d.d[4].d[1]" "b.out.d.d[4].t"
+= "b.out.d.d[3].d[0]" "b.out.d.d[3].f"
+= "b.out.d.d[3].d[1]" "b.out.d.d[3].t"
+= "b.out.d.d[2].d[0]" "b.out.d.d[2].f"
+= "b.out.d.d[2].d[1]" "b.out.d.d[2].t"
+= "b.out.d.d[1].d[0]" "b.out.d.d[1].f"
+= "b.out.d.d[1].d[1]" "b.out.d.d[1].t"
+= "b.out.d.d[0].d[0]" "b.out.d.d[0].f"
+= "b.out.d.d[0].d[1]" "b.out.d.d[0].t"
+= "b.in.d.d[0].d[0]" "b.in.d.d[0].f"
+= "b.in.d.d[0].d[1]" "b.in.d.d[0].t"
+= "b.in.d.d[1].d[0]" "b.in.d.d[1].f"
+= "b.in.d.d[1].d[1]" "b.in.d.d[1].t"
+= "b.in.d.d[2].d[0]" "b.in.d.d[2].f"
+= "b.in.d.d[2].d[1]" "b.in.d.d[2].t"
+= "b.in.d.d[3].d[0]" "b.in.d.d[3].f"
+= "b.in.d.d[3].d[1]" "b.in.d.d[3].t"
+= "b.in.d.d[4].d[0]" "b.in.d.d[4].f"
+= "b.in.d.d[4].d[1]" "b.in.d.d[4].t"
+= "b.in.d.d[4].d[0]" "b.in.d.d[4].f"
+= "b.in.d.d[4].d[1]" "b.in.d.d[4].t"
+= "b.in.d.d[3].d[0]" "b.in.d.d[3].f"
+= "b.in.d.d[3].d[1]" "b.in.d.d[3].t"
+= "b.in.d.d[2].d[0]" "b.in.d.d[2].f"
+= "b.in.d.d[2].d[1]" "b.in.d.d[2].t"
+= "b.in.d.d[1].d[0]" "b.in.d.d[1].f"
+= "b.in.d.d[1].d[1]" "b.in.d.d[1].t"
+= "b.in.d.d[0].d[0]" "b.in.d.d[0].f"
+= "b.in.d.d[0].d[1]" "b.in.d.d[0].t"
+= "b.in.d.d[4].d[0]" "b.in.d.d[4].f"
+= "b.in.d.d[4].d[1]" "b.in.d.d[4].t"
+= "b.in.d.d[3].d[0]" "b.in.d.d[3].f"
+= "b.in.d.d[3].d[1]" "b.in.d.d[3].t"
+= "b.in.d.d[2].d[0]" "b.in.d.d[2].f"
+= "b.in.d.d[2].d[1]" "b.in.d.d[2].t"
+= "b.in.d.d[1].d[0]" "b.in.d.d[1].f"
+= "b.in.d.d[1].d[1]" "b.in.d.d[1].t"
+= "b.in.d.d[0].d[0]" "b.in.d.d[0].f"
+= "b.in.d.d[0].d[1]" "b.in.d.d[0].t"
+= "b.in.v" "b.b.in.v"
+= "b.in.a" "b.b.in.a"
+= "b.in.d.d[0].f" "b.b.in.d.d[0].f"
+= "b.in.d.d[0].t" "b.b.in.d.d[0].t"
+= "b.in.d.d[0].d[0]" "b.b.in.d.d[0].d[0]"
+= "b.in.d.d[0].d[1]" "b.b.in.d.d[0].d[1]"
+= "b.in.d.d[1].f" "b.b.in.d.d[1].f"
+= "b.in.d.d[1].t" "b.b.in.d.d[1].t"
+= "b.in.d.d[1].d[0]" "b.b.in.d.d[1].d[0]"
+= "b.in.d.d[1].d[1]" "b.b.in.d.d[1].d[1]"
+= "b.in.d.d[2].f" "b.b.in.d.d[2].f"
+= "b.in.d.d[2].t" "b.b.in.d.d[2].t"
+= "b.in.d.d[2].d[0]" "b.b.in.d.d[2].d[0]"
+= "b.in.d.d[2].d[1]" "b.b.in.d.d[2].d[1]"
+= "b.in.d.d[3].f" "b.b.in.d.d[3].f"
+= "b.in.d.d[3].t" "b.b.in.d.d[3].t"
+= "b.in.d.d[3].d[0]" "b.b.in.d.d[3].d[0]"
+= "b.in.d.d[3].d[1]" "b.b.in.d.d[3].d[1]"
+= "b.in.d.d[4].f" "b.b.in.d.d[4].f"
+= "b.in.d.d[4].t" "b.b.in.d.d[4].t"
+= "b.in.d.d[4].d[0]" "b.b.in.d.d[4].d[0]"
+= "b.in.d.d[4].d[1]" "b.b.in.d.d[4].d[1]"
+= "b.in.d.d[4].d[0]" "b.in.d.d[4].f"
+= "b.in.d.d[4].d[1]" "b.in.d.d[4].t"
+= "b.in.d.d[3].d[0]" "b.in.d.d[3].f"
+= "b.in.d.d[3].d[1]" "b.in.d.d[3].t"
+= "b.in.d.d[2].d[0]" "b.in.d.d[2].f"
+= "b.in.d.d[2].d[1]" "b.in.d.d[2].t"
+= "b.in.d.d[1].d[0]" "b.in.d.d[1].f"
+= "b.in.d.d[1].d[1]" "b.in.d.d[1].t"
+= "b.in.d.d[0].d[0]" "b.in.d.d[0].f"
+= "b.in.d.d[0].d[1]" "b.in.d.d[0].t"

test/unit_tests/buf_s_5/test.act

@@ -0,0 +1,47 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/primitives.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+defproc buffer_s_5(avMx1of2<5> in; avMx1of2<5> out)
+
+{
+  bool _reset_B; 
+  prs {
+    Reset => _reset_B-
+  }
+  buffer_s<5> b(.in = in, .out = out);
+  b.supply.vdd = Vdd;
+  b.supply.vss = GND; 
+  b.reset_B = _reset_B;
+}
+
+buffer_s_5 b;

test/unit_tests/buf_s_5/test.prsim

@@ -0,0 +1,66 @@
+watchall
+
+set-qdi-channel-neutral "b.in" 5
+set b.out.a 0
+set b.out.v 0
+# set b.in.a 1
+# set b.in.v 1
+set Reset 0
+
+# Set output channel variables to all active (incorrect)
+set b.out.d.d[0].t 1
+set b.out.d.d[0].f 1
+set b.out.d.d[1].t 1
+set b.out.d.d[1].f 1
+set b.out.d.d[2].t 1
+set b.out.d.d[2].f 1
+set b.out.d.d[3].t 1
+set b.out.d.d[3].f 1
+set b.out.d.d[4].t 1
+set b.out.d.d[4].f 1
+
+cycle
+
+system "echo '[] set Reset 1'"
+set Reset 1
+cycle
+
+system "echo '[] set Reset 0'"
+set Reset 0
+mode run
+cycle
+
+assert-qdi-channel-neutral "b.out" 5
+
+system "echo '[] Reset finished, setting some inputs.'"
+status X
+
+
+set b.in.d.d[0].t 1
+set b.in.d.d[1].t 1
+set b.in.d.d[2].f 1
+set b.in.d.d[3].f 1
+
+cycle
+
+system "echo '[] Setting final input'"
+
+set b.in.d.d[4].t 1
+cycle
+
+system "echo '[] Receiving out val'"
+
+set b.out.v 1
+cycle
+
+assert b.in.a 1
+
+system "echo '[] Removing input'"
+set-qdi-channel-neutral "b.in" 5
+cycle
+
+system "echo '[] Receiving out ack'"
+set b.out.a 1
+cycle
+
+assert-qdi-channel-neutral "b.out" 5

test/unit_tests/buffer_token/run/prsim.out

@@ -0,0 +1,29 @@
+t.a._out_a_B t.in.r t.in.a t.out.r t.a._en t.a.inack_ctl._y t.out.a t.a.buf_func._y 
+[0] code starts
+	      7093 t.in.r : 0
+	      7093 t.out.a : 0
+	     17560 t.a._out_a_B : 1  [by t.out.a:=0]
+	     17560 Reset : 0
+	     17562 t.a.reset_buf._y : 1  [by Reset:=0]
+	     22315 t.a._reset_BX : 0  [by t.a.reset_buf._y:=1]
+	     22429 t.a.inack_ctl._y : 1  [by t.a._reset_BX:=0]
+	     23452 t.a.buf_func._y : 1  [by t.a._reset_BX:=0]
+	     25178 t.out.r : 0  [by t.a.buf_func._y:=1]
+	     87795 t.in.a : 0  [by t.a.inack_ctl._y:=1]
+	     87834 t.a._en : 1  [by t.in.a:=0]
+
+	     87834 Reset : 1
+	     87849 t.a.reset_buf._y : 0  [by Reset:=1]
+	     88340 t.a._reset_BX : 1  [by t.a.reset_buf._y:=0]
+[1] reset done
+----------------------------------------------------------------------------------------------------
+	     88340 t.in.r : 1
+	     88353 t.a.buf_func._y : 0  [by t.in.r:=1]
+	     88393 t.out.r : 1  [by t.a.buf_func._y:=0]
+	     88808 t.a.inack_ctl._y : 0  [by t.out.r:=1]
+	     88828 t.in.a : 1  [by t.a.inack_ctl._y:=0]
+	     94889 t.a._en : 0  [by t.in.a:=1]
+	     94889 t.out.a : 1
+	     94936 t.a._out_a_B : 0  [by t.out.a:=1]
+	     94952 t.a.buf_func._y : 1  [by t.a._out_a_B:=0]
+	    139050 t.out.r : 0  [by t.a.buf_func._y:=1]

test/unit_tests/buffer_token/test.act

@@ -0,0 +1,43 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/primitives.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+defproc buffer_token_test(a1of1 in; a1of1 out)
+{
+  buffer_t a(.in = in, .out = out);
+  a.supply.vdd = Vdd;
+  a.supply.vss = GND; 
+  a.reset_B = Reset;
+
+}
+
+buffer_token_test t;

test/unit_tests/buffer_token/test.prsim

@@ -0,0 +1,20 @@
+watchall
+system "echo '[0] code starts'"
+set t.in.r 0
+set t.out.a 0
+cycle
+set Reset 0
+cycle
+status X
+mode run
+set Reset 1
+cycle
+system "echo '[1] reset done'"
+system "echo '----------------------------------------------------------------------------------------------------'"
+set t.in.r 1
+cycle
+assert t.out.r 1
+set t.out.a 1
+cycle
+assert t.in.a 1
+

test/unit_tests/ctree_15/run/prsim.out

@@ -0,0 +1,4 @@
+t.ctree_test.tmp[22] t.ctree_test.C2Els[0]._y t.ctree_test.tmp[17] t.in[14] t.in[4] t.in[2] t.in[8] t.in[13] t.ctree_test.tmp[21] t.ctree_test.tmp[23] t.out t.in[12] t.in[6] t.in[7] t.in[10] t.in[5] t.ctree_test.tmp[19] t.ctree_test.tmp[18] t.ctree_test.C3Els[0]._y t.in[3] t.ctree_test.tmp[24] t.ctree_test.C3Els[2]._y t.ctree_test.C2Els[4]._y t.in[0] t.in[1] t.ctree_test.tmp[15] t.ctree_test.tmp[16] t.in[11] t.ctree_test.tmp[20] t.ctree_test.C2Els[7]._y t.in[9] t.ctree_test.C2Els[2]._y t.ctree_test.C2Els[1]._y t.ctree_test.C2Els[6]._y t.ctree_test.C2Els[5]._y t.ctree_test.C2Els[3]._y t.ctree_test.C3Els[1]._y 
+[0] starting test all 1
+[1] starting test all 0
+[2] testing state holding

test/unit_tests/ctree_15/run/test.prs

@@ -0,0 +1,139 @@
+= "GND" "GND"
+= "Vdd" "Vdd"
+= "Reset" "Reset"
+~"t.ctree_test.C2Els[0].c1"&~"t.ctree_test.C2Els[0].c2"->"t.ctree_test.C2Els[0]._y"+
+"t.ctree_test.C2Els[0].c1"&"t.ctree_test.C2Els[0].c2"->"t.ctree_test.C2Els[0]._y"-
+"t.ctree_test.C2Els[0]._y"->"t.ctree_test.C2Els[0].y"-
+~("t.ctree_test.C2Els[0]._y")->"t.ctree_test.C2Els[0].y"+
+~"t.ctree_test.C2Els[1].c1"&~"t.ctree_test.C2Els[1].c2"->"t.ctree_test.C2Els[1]._y"+
+"t.ctree_test.C2Els[1].c1"&"t.ctree_test.C2Els[1].c2"->"t.ctree_test.C2Els[1]._y"-
+"t.ctree_test.C2Els[1]._y"->"t.ctree_test.C2Els[1].y"-
+~("t.ctree_test.C2Els[1]._y")->"t.ctree_test.C2Els[1].y"+
+~"t.ctree_test.C2Els[2].c1"&~"t.ctree_test.C2Els[2].c2"->"t.ctree_test.C2Els[2]._y"+
+"t.ctree_test.C2Els[2].c1"&"t.ctree_test.C2Els[2].c2"->"t.ctree_test.C2Els[2]._y"-
+"t.ctree_test.C2Els[2]._y"->"t.ctree_test.C2Els[2].y"-
+~("t.ctree_test.C2Els[2]._y")->"t.ctree_test.C2Els[2].y"+
+~"t.ctree_test.C2Els[3].c1"&~"t.ctree_test.C2Els[3].c2"->"t.ctree_test.C2Els[3]._y"+
+"t.ctree_test.C2Els[3].c1"&"t.ctree_test.C2Els[3].c2"->"t.ctree_test.C2Els[3]._y"-
+"t.ctree_test.C2Els[3]._y"->"t.ctree_test.C2Els[3].y"-
+~("t.ctree_test.C2Els[3]._y")->"t.ctree_test.C2Els[3].y"+
+~"t.ctree_test.C2Els[4].c1"&~"t.ctree_test.C2Els[4].c2"->"t.ctree_test.C2Els[4]._y"+
+"t.ctree_test.C2Els[4].c1"&"t.ctree_test.C2Els[4].c2"->"t.ctree_test.C2Els[4]._y"-
+"t.ctree_test.C2Els[4]._y"->"t.ctree_test.C2Els[4].y"-
+~("t.ctree_test.C2Els[4]._y")->"t.ctree_test.C2Els[4].y"+
+~"t.ctree_test.C2Els[5].c1"&~"t.ctree_test.C2Els[5].c2"->"t.ctree_test.C2Els[5]._y"+
+"t.ctree_test.C2Els[5].c1"&"t.ctree_test.C2Els[5].c2"->"t.ctree_test.C2Els[5]._y"-
+"t.ctree_test.C2Els[5]._y"->"t.ctree_test.C2Els[5].y"-
+~("t.ctree_test.C2Els[5]._y")->"t.ctree_test.C2Els[5].y"+
+~"t.ctree_test.C2Els[6].c1"&~"t.ctree_test.C2Els[6].c2"->"t.ctree_test.C2Els[6]._y"+
+"t.ctree_test.C2Els[6].c1"&"t.ctree_test.C2Els[6].c2"->"t.ctree_test.C2Els[6]._y"-
+"t.ctree_test.C2Els[6]._y"->"t.ctree_test.C2Els[6].y"-
+~("t.ctree_test.C2Els[6]._y")->"t.ctree_test.C2Els[6].y"+
+~"t.ctree_test.C2Els[7].c1"&~"t.ctree_test.C2Els[7].c2"->"t.ctree_test.C2Els[7]._y"+
+"t.ctree_test.C2Els[7].c1"&"t.ctree_test.C2Els[7].c2"->"t.ctree_test.C2Els[7]._y"-
+"t.ctree_test.C2Els[7]._y"->"t.ctree_test.C2Els[7].y"-
+~("t.ctree_test.C2Els[7]._y")->"t.ctree_test.C2Els[7].y"+
+~"t.ctree_test.C3Els[0].c1"&~"t.ctree_test.C3Els[0].c2"&~"t.ctree_test.C3Els[0].c3"->"t.ctree_test.C3Els[0]._y"+
+"t.ctree_test.C3Els[0].c1"&"t.ctree_test.C3Els[0].c2"&"t.ctree_test.C3Els[0].c3"->"t.ctree_test.C3Els[0]._y"-
+"t.ctree_test.C3Els[0]._y"->"t.ctree_test.C3Els[0].y"-
+~("t.ctree_test.C3Els[0]._y")->"t.ctree_test.C3Els[0].y"+
+~"t.ctree_test.C3Els[1].c1"&~"t.ctree_test.C3Els[1].c2"&~"t.ctree_test.C3Els[1].c3"->"t.ctree_test.C3Els[1]._y"+
+"t.ctree_test.C3Els[1].c1"&"t.ctree_test.C3Els[1].c2"&"t.ctree_test.C3Els[1].c3"->"t.ctree_test.C3Els[1]._y"-
+"t.ctree_test.C3Els[1]._y"->"t.ctree_test.C3Els[1].y"-
+~("t.ctree_test.C3Els[1]._y")->"t.ctree_test.C3Els[1].y"+
+~"t.ctree_test.C3Els[2].c1"&~"t.ctree_test.C3Els[2].c2"&~"t.ctree_test.C3Els[2].c3"->"t.ctree_test.C3Els[2]._y"+
+"t.ctree_test.C3Els[2].c1"&"t.ctree_test.C3Els[2].c2"&"t.ctree_test.C3Els[2].c3"->"t.ctree_test.C3Els[2]._y"-
+"t.ctree_test.C3Els[2]._y"->"t.ctree_test.C3Els[2].y"-
+~("t.ctree_test.C3Els[2]._y")->"t.ctree_test.C3Els[2].y"+
+= "t.ctree_test.tmp[15]" "t.ctree_test.C2Els[6].c1"
+= "t.ctree_test.tmp[15]" "t.ctree_test.C2Els[0].y"
+= "t.ctree_test.tmp[16]" "t.ctree_test.C2Els[6].c2"
+= "t.ctree_test.tmp[16]" "t.ctree_test.C2Els[1].y"
+= "t.ctree_test.tmp[17]" "t.ctree_test.C2Els[7].c1"
+= "t.ctree_test.tmp[17]" "t.ctree_test.C2Els[2].y"
+= "t.ctree_test.tmp[18]" "t.ctree_test.C2Els[7].c2"
+= "t.ctree_test.tmp[18]" "t.ctree_test.C2Els[3].y"
+= "t.ctree_test.tmp[19]" "t.ctree_test.C3Els[1].c1"
+= "t.ctree_test.tmp[19]" "t.ctree_test.C2Els[4].y"
+= "t.ctree_test.tmp[20]" "t.ctree_test.C3Els[1].c2"
+= "t.ctree_test.tmp[20]" "t.ctree_test.C2Els[5].y"
+= "t.ctree_test.tmp[21]" "t.ctree_test.C3Els[1].c3"
+= "t.ctree_test.tmp[21]" "t.ctree_test.C3Els[0].y"
+= "t.ctree_test.tmp[22]" "t.ctree_test.C3Els[2].c1"
+= "t.ctree_test.tmp[22]" "t.ctree_test.C2Els[6].y"
+= "t.ctree_test.tmp[23]" "t.ctree_test.C3Els[2].c2"
+= "t.ctree_test.tmp[23]" "t.ctree_test.C2Els[7].y"
+= "t.ctree_test.tmp[24]" "t.ctree_test.C3Els[2].c3"
+= "t.ctree_test.tmp[24]" "t.ctree_test.C3Els[1].y"
+= "t.ctree_test.supply.vdd" "t.ctree_test.C3Els[2].vdd"
+= "t.ctree_test.supply.vdd" "t.ctree_test.C3Els[1].vdd"
+= "t.ctree_test.supply.vdd" "t.ctree_test.C3Els[0].vdd"
+= "t.ctree_test.supply.vdd" "t.ctree_test.C2Els[7].vdd"
+= "t.ctree_test.supply.vdd" "t.ctree_test.C2Els[6].vdd"
+= "t.ctree_test.supply.vdd" "t.ctree_test.C2Els[5].vdd"
+= "t.ctree_test.supply.vdd" "t.ctree_test.C2Els[4].vdd"
+= "t.ctree_test.supply.vdd" "t.ctree_test.C2Els[3].vdd"
+= "t.ctree_test.supply.vdd" "t.ctree_test.C2Els[2].vdd"
+= "t.ctree_test.supply.vdd" "t.ctree_test.C2Els[1].vdd"
+= "t.ctree_test.supply.vdd" "t.ctree_test.C2Els[0].vdd"
+= "t.ctree_test.supply.vss" "t.ctree_test.C3Els[2].vss"
+= "t.ctree_test.supply.vss" "t.ctree_test.C3Els[1].vss"
+= "t.ctree_test.supply.vss" "t.ctree_test.C3Els[0].vss"
+= "t.ctree_test.supply.vss" "t.ctree_test.C2Els[7].vss"
+= "t.ctree_test.supply.vss" "t.ctree_test.C2Els[6].vss"
+= "t.ctree_test.supply.vss" "t.ctree_test.C2Els[5].vss"
+= "t.ctree_test.supply.vss" "t.ctree_test.C2Els[4].vss"
+= "t.ctree_test.supply.vss" "t.ctree_test.C2Els[3].vss"
+= "t.ctree_test.supply.vss" "t.ctree_test.C2Els[2].vss"
+= "t.ctree_test.supply.vss" "t.ctree_test.C2Els[1].vss"
+= "t.ctree_test.supply.vss" "t.ctree_test.C2Els[0].vss"
+= "t.ctree_test.in[0]" "t.ctree_test.C2Els[0].c1"
+= "t.ctree_test.in[0]" "t.ctree_test.tmp[0]"
+= "t.ctree_test.in[1]" "t.ctree_test.C2Els[0].c2"
+= "t.ctree_test.in[1]" "t.ctree_test.tmp[1]"
+= "t.ctree_test.in[2]" "t.ctree_test.C2Els[1].c1"
+= "t.ctree_test.in[2]" "t.ctree_test.tmp[2]"
+= "t.ctree_test.in[3]" "t.ctree_test.C2Els[1].c2"
+= "t.ctree_test.in[3]" "t.ctree_test.tmp[3]"
+= "t.ctree_test.in[4]" "t.ctree_test.C2Els[2].c1"
+= "t.ctree_test.in[4]" "t.ctree_test.tmp[4]"
+= "t.ctree_test.in[5]" "t.ctree_test.C2Els[2].c2"
+= "t.ctree_test.in[5]" "t.ctree_test.tmp[5]"
+= "t.ctree_test.in[6]" "t.ctree_test.C2Els[3].c1"
+= "t.ctree_test.in[6]" "t.ctree_test.tmp[6]"
+= "t.ctree_test.in[7]" "t.ctree_test.C2Els[3].c2"
+= "t.ctree_test.in[7]" "t.ctree_test.tmp[7]"
+= "t.ctree_test.in[8]" "t.ctree_test.C2Els[4].c1"
+= "t.ctree_test.in[8]" "t.ctree_test.tmp[8]"
+= "t.ctree_test.in[9]" "t.ctree_test.C2Els[4].c2"
+= "t.ctree_test.in[9]" "t.ctree_test.tmp[9]"
+= "t.ctree_test.in[10]" "t.ctree_test.C2Els[5].c1"
+= "t.ctree_test.in[10]" "t.ctree_test.tmp[10]"
+= "t.ctree_test.in[11]" "t.ctree_test.C2Els[5].c2"
+= "t.ctree_test.in[11]" "t.ctree_test.tmp[11]"
+= "t.ctree_test.in[12]" "t.ctree_test.C3Els[0].c1"
+= "t.ctree_test.in[12]" "t.ctree_test.tmp[12]"
+= "t.ctree_test.in[13]" "t.ctree_test.C3Els[0].c2"
+= "t.ctree_test.in[13]" "t.ctree_test.tmp[13]"
+= "t.ctree_test.in[14]" "t.ctree_test.C3Els[0].c3"
+= "t.ctree_test.in[14]" "t.ctree_test.tmp[14]"
+= "t.ctree_test.out" "t.ctree_test.C3Els[2].y"
+= "t.ctree_test.out" "t.ctree_test.tmp[25]"
+= "Vdd" "t.ctree_test.supply.vdd"
+= "GND" "t.ctree_test.supply.vss"
+= "t.out" "t.ctree_test.out"
+= "t.in[0]" "t.ctree_test.in[0]"
+= "t.in[1]" "t.ctree_test.in[1]"
+= "t.in[2]" "t.ctree_test.in[2]"
+= "t.in[3]" "t.ctree_test.in[3]"
+= "t.in[4]" "t.ctree_test.in[4]"
+= "t.in[5]" "t.ctree_test.in[5]"
+= "t.in[6]" "t.ctree_test.in[6]"
+= "t.in[7]" "t.ctree_test.in[7]"
+= "t.in[8]" "t.ctree_test.in[8]"
+= "t.in[9]" "t.ctree_test.in[9]"
+= "t.in[10]" "t.ctree_test.in[10]"
+= "t.in[11]" "t.ctree_test.in[11]"
+= "t.in[12]" "t.ctree_test.in[12]"
+= "t.in[13]" "t.ctree_test.in[13]"
+= "t.in[14]" "t.ctree_test.in[14]"

test/unit_tests/ctree_15/test.act

@@ -0,0 +1,41 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/treegates.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+defproc ctree_15 (bool? in[15]; bool! out){
+    ctree<15> ctree_test(.in=in, .out=out);
+    ctree_test.supply.vss = GND;
+    ctree_test.supply.vdd = Vdd;
+
+}
+
+ctree_15 t;

test/unit_tests/ctree_15/test.prsim

@@ -0,0 +1,62 @@
+
+system "echo '[0] starting test all 1'"
+
+set t.in[0] 1
+set t.in[1] 1
+set t.in[2] 1
+set t.in[3] 1
+set t.in[4] 1
+set t.in[5] 1
+set t.in[6] 1
+set t.in[7] 1
+set t.in[8] 1
+set t.in[9] 1
+set t.in[10] 1
+set t.in[11] 1
+set t.in[12] 1
+set t.in[13] 1
+set t.in[14] 1
+cycle
+mode run
+assert t.out 1
+system "echo '[1] starting test all 0'"
+
+set t.in[0] 0
+set t.in[1] 0
+set t.in[2] 0
+set t.in[3] 0
+set t.in[4] 0
+set t.in[5] 0
+set t.in[6] 0
+set t.in[7] 0
+set t.in[8] 0
+set t.in[9] 0
+set t.in[10] 0
+set t.in[11] 0
+set t.in[12] 0
+set t.in[13] 0
+set t.in[14] 0
+cycle
+mode run
+assert t.out 0
+
+system "echo '[2] testing state holding'"
+
+set t.in[0] 0
+set t.in[1] 0
+set t.in[2] 0
+set t.in[3] 0
+set t.in[4] 0
+set t.in[5] 1
+set t.in[6] 0
+set t.in[7] 0
+set t.in[8] 0
+set t.in[9] 0
+set t.in[10] 0
+set t.in[11] 0
+set t.in[12] 0
+set t.in[13] 0
+set t.in[14] 0
+cycle
+mode run
+assert t.out 0

test/unit_tests/delayprog_4/run/prsim.out

@@ -0,0 +1,134 @@
+t.s[2] t.dp.dly[2].a t.dp._a[1] t.dp.dly[5]._y t.s[3] t.a t.s[0] t.dp.and2[2]._y t.dp.and2[0]._y t.dp._a[3] t.dp.dly[11]._y t.dp._a[2] t.dp.and2[3]._y t.dp.mu2[0]._s t.dp.dly[9]._y t.s[1] t.dp.dly[11].y t.dp.dly[0]._y t.dp.dly[4].y t.dp.dly[6].y t.dp.dly[2]._y t.dp.dly[7]._y t.dp.dly[9].a t.dp.dly[1].y t.dp.dly[1].a t.dp.dly[4].a t.y t.dp.dly[2].y t.dp.dly[14]._y t.dp.dly[10].a t.dp.mu2[2]._s t.dp.dly[6]._y t.dp.dly[1]._y t.dp.dly[12]._y t.dp.dly[5].y t.dp.dly[8].a t.dp.dly[0].a t.dp.dly[7].a t.dp.mu2[0]._y t.dp.mu2[3]._y t.dp.mu2[1]._s t.dp.dly[11].a t.dp.dly[14].a t.dp.dly[13].a t.dp.dly[13]._y t.dp.dly[7].y t.dp.dly[8]._y t.dp.mu2[2]._y t.dp.dly[3].y t.dp.dly[14].y t.dp.dly[0].y t.dp.dly[3]._y t.dp.dly[13].y t.dp.and2[1]._y t.dp.mu2[3]._s t.dp.dly[10].y t.dp.dly[9].y t.dp.dly[4]._y t.dp.dly[12].y t.dp.dly[8].y t.dp.mu2[1]._y t.dp.dly[12].a t.dp.dly[10]._y 
+0
+	         0 t.a : 0
+	         0 t.s[3] : 1
+	         0 t.s[1] : 1
+	         0 t.s[0] : 1
+	         0 t.s[2] : 1
+	         1 t.dp.and2[0]._y : 1  [by t.a:=0]
+	         2 t.dp.mu2[0]._s : 0  [by t.s[0]:=1]
+	      1138 t.dp.dly[0].a : 0  [by t.dp.and2[0]._y:=1]
+	      1252 t.dp.dly[0]._y : 1  [by t.dp.dly[0].a:=0]
+	      4753 t.dp.mu2[2]._s : 0  [by t.s[2]:=1]
+	      7092 t.dp.mu2[3]._s : 0  [by t.s[3]:=1]
+	     10467 t.dp.mu2[1]._s : 0  [by t.s[1]:=1]
+	     66618 t.dp.dly[0].y : 0  [by t.dp.dly[0]._y:=1]
+	     68344 t.dp.mu2[0]._y : 1  [by t.dp.dly[0].y:=0]
+	     68383 t.dp._a[1] : 0  [by t.dp.mu2[0]._y:=1]
+	     68398 t.dp.and2[1]._y : 1  [by t.dp._a[1]:=0]
+	     68889 t.dp.dly[1].a : 0  [by t.dp.and2[1]._y:=1]
+	     68902 t.dp.dly[1]._y : 1  [by t.dp.dly[1].a:=0]
+	     68942 t.dp.dly[1].y : 0  [by t.dp.dly[1]._y:=1]
+	     69357 t.dp.mu2[1]._y : 1  [by t.dp.dly[1].y:=0]
+	     69377 t.dp._a[2] : 0  [by t.dp.mu2[1]._y:=1]
+	     75438 t.dp.and2[2]._y : 1  [by t.dp._a[2]:=0]
+	     75485 t.dp.dly[2].a : 0  [by t.dp.and2[2]._y:=1]
+	     75501 t.dp.dly[2]._y : 1  [by t.dp.dly[2].a:=0]
+	    119599 t.dp.dly[2].y : 0  [by t.dp.dly[2]._y:=1]
+	    133323 t.dp.dly[3]._y : 1  [by t.dp.dly[2].y:=0]
+	    133327 t.dp.dly[3].y : 0  [by t.dp.dly[3]._y:=1]
+	    142456 t.dp.mu2[2]._y : 1  [by t.dp.dly[3].y:=0]
+	    142471 t.dp._a[3] : 0  [by t.dp.mu2[2]._y:=1]
+	    185719 t.dp.and2[3]._y : 1  [by t.dp._a[3]:=0]
+	    222650 t.dp.dly[4].a : 0  [by t.dp.and2[3]._y:=1]
+	    222705 t.dp.dly[4]._y : 1  [by t.dp.dly[4].a:=0]
+	    274358 t.dp.dly[4].y : 0  [by t.dp.dly[4]._y:=1]
+	    304138 t.dp.dly[5]._y : 1  [by t.dp.dly[4].y:=0]
+	    317987 t.dp.dly[5].y : 0  [by t.dp.dly[5]._y:=1]
+	    342799 t.dp.dly[6]._y : 1  [by t.dp.dly[5].y:=0]
+	    357142 t.dp.dly[6].y : 0  [by t.dp.dly[6]._y:=1]
+	    357564 t.dp.mu2[3]._y : 1  [by t.dp.dly[6].y:=0]
+	    406278 t.y : 0  [by t.dp.mu2[3]._y:=1]
+[] setting high
+	    406278 t.a : 1
+	    406279 t.dp.and2[0]._y : 0  [by t.a:=1]
+	    406280 t.dp.dly[0].a : 1  [by t.dp.and2[0]._y:=0]
+	    426485 t.dp.dly[0]._y : 0  [by t.dp.dly[0].a:=1]
+	    426767 t.dp.dly[0].y : 1  [by t.dp.dly[0]._y:=0]
+	    427535 t.dp.mu2[0]._y : 0  [by t.dp.dly[0].y:=1]
+	    427538 t.dp._a[1] : 1  [by t.dp.mu2[0]._y:=0]
+	    449979 t.dp.and2[1]._y : 0  [by t.dp._a[1]:=1]
+	    450530 t.dp.dly[1].a : 1  [by t.dp.and2[1]._y:=0]
+	    451601 t.dp.dly[1]._y : 0  [by t.dp.dly[1].a:=1]
+	    452555 t.dp.dly[1].y : 1  [by t.dp.dly[1]._y:=0]
+	    453636 t.dp.mu2[1]._y : 0  [by t.dp.dly[1].y:=1]
+	    508106 t.dp._a[2] : 1  [by t.dp.mu2[1]._y:=0]
+	    509088 t.dp.and2[2]._y : 0  [by t.dp._a[2]:=1]
+	    509106 t.dp.dly[2].a : 1  [by t.dp.and2[2]._y:=0]
+	    513119 t.dp.dly[2]._y : 0  [by t.dp.dly[2].a:=1]
+	    517122 t.dp.dly[2].y : 1  [by t.dp.dly[2]._y:=0]
+	    562023 t.dp.dly[3]._y : 0  [by t.dp.dly[2].y:=1]
+	    583607 t.dp.dly[3].y : 1  [by t.dp.dly[3]._y:=0]
+	    588367 t.dp.mu2[2]._y : 0  [by t.dp.dly[3].y:=1]
+	    588869 t.dp._a[3] : 1  [by t.dp.mu2[2]._y:=0]
+	    589072 t.dp.and2[3]._y : 0  [by t.dp._a[3]:=1]
+	    590926 t.dp.dly[4].a : 1  [by t.dp.and2[3]._y:=0]
+	    591065 t.dp.dly[4]._y : 0  [by t.dp.dly[4].a:=1]
+	    627411 t.dp.dly[4].y : 1  [by t.dp.dly[4]._y:=0]
+	    627480 t.dp.dly[5]._y : 0  [by t.dp.dly[4].y:=1]
+	    627491 t.dp.dly[5].y : 1  [by t.dp.dly[5]._y:=0]
+	    679277 t.dp.dly[6]._y : 0  [by t.dp.dly[5].y:=1]
+	    679481 t.dp.dly[6].y : 1  [by t.dp.dly[6]._y:=0]
+	    679496 t.dp.mu2[3]._y : 0  [by t.dp.dly[6].y:=1]
+	    679497 t.y : 1  [by t.dp.mu2[3]._y:=0]
+[] setting low
+	    679497 t.a : 0
+	    679534 t.dp.and2[0]._y : 1  [by t.a:=0]
+	    680273 t.dp.dly[0].a : 0  [by t.dp.and2[0]._y:=1]
+	    680385 t.dp.dly[0]._y : 1  [by t.dp.dly[0].a:=0]
+	    727897 t.dp.dly[0].y : 0  [by t.dp.dly[0]._y:=1]
+	    727937 t.dp.mu2[0]._y : 1  [by t.dp.dly[0].y:=0]
+	    728194 t.dp._a[1] : 0  [by t.dp.mu2[0]._y:=1]
+	    728281 t.dp.and2[1]._y : 1  [by t.dp._a[1]:=0]
+	    728575 t.dp.dly[1].a : 0  [by t.dp.and2[1]._y:=1]
+	    728576 t.dp.dly[1]._y : 1  [by t.dp.dly[1].a:=0]
+	    730382 t.dp.dly[1].y : 0  [by t.dp.dly[1]._y:=1]
+	    732389 t.dp.mu2[1]._y : 1  [by t.dp.dly[1].y:=0]
+	    733598 t.dp._a[2] : 0  [by t.dp.mu2[1]._y:=1]
+	    734188 t.dp.and2[2]._y : 1  [by t.dp._a[2]:=0]
+	    734366 t.dp.dly[2].a : 0  [by t.dp.and2[2]._y:=1]
+	    735169 t.dp.dly[2]._y : 1  [by t.dp.dly[2].a:=0]
+	    735333 t.dp.dly[2].y : 0  [by t.dp.dly[2]._y:=1]
+	    737528 t.dp.dly[3]._y : 1  [by t.dp.dly[2].y:=0]
+	    737550 t.dp.dly[3].y : 0  [by t.dp.dly[3]._y:=1]
+	    738397 t.dp.mu2[2]._y : 1  [by t.dp.dly[3].y:=0]
+	    768525 t.dp._a[3] : 0  [by t.dp.mu2[2]._y:=1]
+	    768658 t.dp.and2[3]._y : 1  [by t.dp._a[3]:=0]
+	    784320 t.dp.dly[4].a : 0  [by t.dp.and2[3]._y:=1]
+	    784679 t.dp.dly[4]._y : 1  [by t.dp.dly[4].a:=0]
+	    798795 t.dp.dly[4].y : 0  [by t.dp.dly[4]._y:=1]
+	    799016 t.dp.dly[5]._y : 1  [by t.dp.dly[4].y:=0]
+	    799023 t.dp.dly[5].y : 0  [by t.dp.dly[5]._y:=1]
+	    799053 t.dp.dly[6]._y : 1  [by t.dp.dly[5].y:=0]
+	    805766 t.dp.dly[6].y : 0  [by t.dp.dly[6]._y:=1]
+	    863227 t.dp.mu2[3]._y : 1  [by t.dp.dly[6].y:=0]
+	    863318 t.y : 0  [by t.dp.mu2[3]._y:=1]
+[] setting configs low
+	    863318 t.s[0] : 0
+	    863318 t.s[3] : 0
+	    863318 t.s[2] : 0
+	    863318 t.s[1] : 0
+	    863325 t.dp.mu2[3]._s : 1  [by t.s[3]:=0]
+	    863424 t.dp.mu2[1]._s : 1  [by t.s[1]:=0]
+	    865507 t.dp.mu2[0]._s : 1  [by t.s[0]:=0]
+	    866105 t.dp.mu2[2]._s : 1  [by t.s[2]:=0]
+[] setting high
+	    866105 t.a : 1
+	    866183 t.dp.mu2[0]._y : 0  [by t.a:=1]
+	    866458 t.dp._a[1] : 1  [by t.dp.mu2[0]._y:=0]
+	    885454 t.dp.mu2[1]._y : 0  [by t.dp._a[1]:=1]
+	    885909 t.dp._a[2] : 1  [by t.dp.mu2[1]._y:=0]
+	    885921 t.dp.mu2[2]._y : 0  [by t.dp._a[2]:=1]
+	    886325 t.dp._a[3] : 1  [by t.dp.mu2[2]._y:=0]
+	    886337 t.dp.mu2[3]._y : 0  [by t.dp._a[3]:=1]
+	    892253 t.y : 1  [by t.dp.mu2[3]._y:=0]
+[] setting low
+	    892253 t.a : 0
+	    896529 t.dp.mu2[0]._y : 1  [by t.a:=0]
+	    899428 t.dp._a[1] : 0  [by t.dp.mu2[0]._y:=1]
+	    903723 t.dp.mu2[1]._y : 1  [by t.dp._a[1]:=0]
+	    903725 t.dp._a[2] : 0  [by t.dp.mu2[1]._y:=1]
+	    908260 t.dp.mu2[2]._y : 1  [by t.dp._a[2]:=0]
+	    909509 t.dp._a[3] : 0  [by t.dp.mu2[2]._y:=1]
+	    913008 t.dp.mu2[3]._y : 1  [by t.dp._a[3]:=0]
+	    913174 t.y : 0  [by t.dp.mu2[3]._y:=1]

test/unit_tests/delayprog_4/run/test.prs

@@ -0,0 +1,190 @@
+= "GND" "GND"
+= "Vdd" "Vdd"
+= "Reset" "Reset"
+= "t.y" "t.dp.y"
+= "t.a" "t.dp.a"
+= "t.dp.a" "t.dp.mu2[0].a"
+= "t.dp.a" "t.dp.and2[0].a"
+= "t.dp.a" "t.dp._a[0]"
+"t.dp.and2[0].a"&"t.dp.and2[0].b"->"t.dp.and2[0]._y"-
+~("t.dp.and2[0].a"&"t.dp.and2[0].b")->"t.dp.and2[0]._y"+
+"t.dp.and2[0]._y"->"t.dp.and2[0].y"-
+~("t.dp.and2[0]._y")->"t.dp.and2[0].y"+
+"t.dp.and2[1].a"&"t.dp.and2[1].b"->"t.dp.and2[1]._y"-
+~("t.dp.and2[1].a"&"t.dp.and2[1].b")->"t.dp.and2[1]._y"+
+"t.dp.and2[1]._y"->"t.dp.and2[1].y"-
+~("t.dp.and2[1]._y")->"t.dp.and2[1].y"+
+"t.dp.and2[2].a"&"t.dp.and2[2].b"->"t.dp.and2[2]._y"-
+~("t.dp.and2[2].a"&"t.dp.and2[2].b")->"t.dp.and2[2]._y"+
+"t.dp.and2[2]._y"->"t.dp.and2[2].y"-
+~("t.dp.and2[2]._y")->"t.dp.and2[2].y"+
+"t.dp.and2[3].a"&"t.dp.and2[3].b"->"t.dp.and2[3]._y"-
+~("t.dp.and2[3].a"&"t.dp.and2[3].b")->"t.dp.and2[3]._y"+
+"t.dp.and2[3]._y"->"t.dp.and2[3].y"-
+~("t.dp.and2[3]._y")->"t.dp.and2[3].y"+
+= "t.dp.s[0]" "t.dp.mu2[0].s"
+= "t.dp.s[0]" "t.dp.and2[0].b"
+= "t.dp.s[1]" "t.dp.mu2[1].s"
+= "t.dp.s[1]" "t.dp.and2[1].b"
+= "t.dp.s[2]" "t.dp.mu2[2].s"
+= "t.dp.s[2]" "t.dp.and2[2].b"
+= "t.dp.s[3]" "t.dp.mu2[3].s"
+= "t.dp.s[3]" "t.dp.and2[3].b"
+= "t.dp.supply.vdd" "t.dp.dly[14].vdd"
+= "t.dp.supply.vdd" "t.dp.dly[13].vdd"
+= "t.dp.supply.vdd" "t.dp.dly[12].vdd"
+= "t.dp.supply.vdd" "t.dp.dly[11].vdd"
+= "t.dp.supply.vdd" "t.dp.dly[10].vdd"
+= "t.dp.supply.vdd" "t.dp.dly[9].vdd"
+= "t.dp.supply.vdd" "t.dp.dly[8].vdd"
+= "t.dp.supply.vdd" "t.dp.dly[7].vdd"
+= "t.dp.supply.vdd" "t.dp.dly[6].vdd"
+= "t.dp.supply.vdd" "t.dp.dly[5].vdd"
+= "t.dp.supply.vdd" "t.dp.dly[4].vdd"
+= "t.dp.supply.vdd" "t.dp.dly[3].vdd"
+= "t.dp.supply.vdd" "t.dp.dly[2].vdd"
+= "t.dp.supply.vdd" "t.dp.dly[1].vdd"
+= "t.dp.supply.vdd" "t.dp.dly[0].vdd"
+= "t.dp.supply.vdd" "t.dp.mu2[3].vdd"
+= "t.dp.supply.vdd" "t.dp.mu2[2].vdd"
+= "t.dp.supply.vdd" "t.dp.mu2[1].vdd"
+= "t.dp.supply.vdd" "t.dp.mu2[0].vdd"
+= "t.dp.supply.vdd" "t.dp.and2[3].vdd"
+= "t.dp.supply.vdd" "t.dp.and2[2].vdd"
+= "t.dp.supply.vdd" "t.dp.and2[1].vdd"
+= "t.dp.supply.vdd" "t.dp.and2[0].vdd"
+= "t.dp.supply.vss" "t.dp.dly[14].vss"
+= "t.dp.supply.vss" "t.dp.dly[13].vss"
+= "t.dp.supply.vss" "t.dp.dly[12].vss"
+= "t.dp.supply.vss" "t.dp.dly[11].vss"
+= "t.dp.supply.vss" "t.dp.dly[10].vss"
+= "t.dp.supply.vss" "t.dp.dly[9].vss"
+= "t.dp.supply.vss" "t.dp.dly[8].vss"
+= "t.dp.supply.vss" "t.dp.dly[7].vss"
+= "t.dp.supply.vss" "t.dp.dly[6].vss"
+= "t.dp.supply.vss" "t.dp.dly[5].vss"
+= "t.dp.supply.vss" "t.dp.dly[4].vss"
+= "t.dp.supply.vss" "t.dp.dly[3].vss"
+= "t.dp.supply.vss" "t.dp.dly[2].vss"
+= "t.dp.supply.vss" "t.dp.dly[1].vss"
+= "t.dp.supply.vss" "t.dp.dly[0].vss"
+= "t.dp.supply.vss" "t.dp.mu2[3].vss"
+= "t.dp.supply.vss" "t.dp.mu2[2].vss"
+= "t.dp.supply.vss" "t.dp.mu2[1].vss"
+= "t.dp.supply.vss" "t.dp.mu2[0].vss"
+= "t.dp.supply.vss" "t.dp.and2[3].vss"
+= "t.dp.supply.vss" "t.dp.and2[2].vss"
+= "t.dp.supply.vss" "t.dp.and2[1].vss"
+= "t.dp.supply.vss" "t.dp.and2[0].vss"
+"t.dp.mu2[0].s"->"t.dp.mu2[0]._s"-
+~("t.dp.mu2[0].s")->"t.dp.mu2[0]._s"+
+~"t.dp.mu2[0].a"&~"t.dp.mu2[0].s"|~"t.dp.mu2[0].b"&~"t.dp.mu2[0]._s"->"t.dp.mu2[0]._y"+
+"t.dp.mu2[0].a"&"t.dp.mu2[0]._s"|"t.dp.mu2[0].b"&"t.dp.mu2[0].s"->"t.dp.mu2[0]._y"-
+"t.dp.mu2[0]._y"->"t.dp.mu2[0].y"-
+~("t.dp.mu2[0]._y")->"t.dp.mu2[0].y"+
+"t.dp.mu2[1].s"->"t.dp.mu2[1]._s"-
+~("t.dp.mu2[1].s")->"t.dp.mu2[1]._s"+
+~"t.dp.mu2[1].a"&~"t.dp.mu2[1].s"|~"t.dp.mu2[1].b"&~"t.dp.mu2[1]._s"->"t.dp.mu2[1]._y"+
+"t.dp.mu2[1].a"&"t.dp.mu2[1]._s"|"t.dp.mu2[1].b"&"t.dp.mu2[1].s"->"t.dp.mu2[1]._y"-
+"t.dp.mu2[1]._y"->"t.dp.mu2[1].y"-
+~("t.dp.mu2[1]._y")->"t.dp.mu2[1].y"+
+"t.dp.mu2[2].s"->"t.dp.mu2[2]._s"-
+~("t.dp.mu2[2].s")->"t.dp.mu2[2]._s"+
+~"t.dp.mu2[2].a"&~"t.dp.mu2[2].s"|~"t.dp.mu2[2].b"&~"t.dp.mu2[2]._s"->"t.dp.mu2[2]._y"+
+"t.dp.mu2[2].a"&"t.dp.mu2[2]._s"|"t.dp.mu2[2].b"&"t.dp.mu2[2].s"->"t.dp.mu2[2]._y"-
+"t.dp.mu2[2]._y"->"t.dp.mu2[2].y"-
+~("t.dp.mu2[2]._y")->"t.dp.mu2[2].y"+
+"t.dp.mu2[3].s"->"t.dp.mu2[3]._s"-
+~("t.dp.mu2[3].s")->"t.dp.mu2[3]._s"+
+~"t.dp.mu2[3].a"&~"t.dp.mu2[3].s"|~"t.dp.mu2[3].b"&~"t.dp.mu2[3]._s"->"t.dp.mu2[3]._y"+
+"t.dp.mu2[3].a"&"t.dp.mu2[3]._s"|"t.dp.mu2[3].b"&"t.dp.mu2[3].s"->"t.dp.mu2[3]._y"-
+"t.dp.mu2[3]._y"->"t.dp.mu2[3].y"-
+~("t.dp.mu2[3]._y")->"t.dp.mu2[3].y"+
+"t.dp.dly[0].a"->"t.dp.dly[0]._y"-
+~("t.dp.dly[0].a")->"t.dp.dly[0]._y"+
+"t.dp.dly[0]._y"->"t.dp.dly[0].y"-
+~("t.dp.dly[0]._y")->"t.dp.dly[0].y"+
+"t.dp.dly[1].a"->"t.dp.dly[1]._y"-
+~("t.dp.dly[1].a")->"t.dp.dly[1]._y"+
+"t.dp.dly[1]._y"->"t.dp.dly[1].y"-
+~("t.dp.dly[1]._y")->"t.dp.dly[1].y"+
+"t.dp.dly[2].a"->"t.dp.dly[2]._y"-
+~("t.dp.dly[2].a")->"t.dp.dly[2]._y"+
+"t.dp.dly[2]._y"->"t.dp.dly[2].y"-
+~("t.dp.dly[2]._y")->"t.dp.dly[2].y"+
+"t.dp.dly[3].a"->"t.dp.dly[3]._y"-
+~("t.dp.dly[3].a")->"t.dp.dly[3]._y"+
+"t.dp.dly[3]._y"->"t.dp.dly[3].y"-
+~("t.dp.dly[3]._y")->"t.dp.dly[3].y"+
+"t.dp.dly[4].a"->"t.dp.dly[4]._y"-
+~("t.dp.dly[4].a")->"t.dp.dly[4]._y"+
+"t.dp.dly[4]._y"->"t.dp.dly[4].y"-
+~("t.dp.dly[4]._y")->"t.dp.dly[4].y"+
+"t.dp.dly[5].a"->"t.dp.dly[5]._y"-
+~("t.dp.dly[5].a")->"t.dp.dly[5]._y"+
+"t.dp.dly[5]._y"->"t.dp.dly[5].y"-
+~("t.dp.dly[5]._y")->"t.dp.dly[5].y"+
+"t.dp.dly[6].a"->"t.dp.dly[6]._y"-
+~("t.dp.dly[6].a")->"t.dp.dly[6]._y"+
+"t.dp.dly[6]._y"->"t.dp.dly[6].y"-
+~("t.dp.dly[6]._y")->"t.dp.dly[6].y"+
+"t.dp.dly[7].a"->"t.dp.dly[7]._y"-
+~("t.dp.dly[7].a")->"t.dp.dly[7]._y"+
+"t.dp.dly[7]._y"->"t.dp.dly[7].y"-
+~("t.dp.dly[7]._y")->"t.dp.dly[7].y"+
+"t.dp.dly[8].a"->"t.dp.dly[8]._y"-
+~("t.dp.dly[8].a")->"t.dp.dly[8]._y"+
+"t.dp.dly[8]._y"->"t.dp.dly[8].y"-
+~("t.dp.dly[8]._y")->"t.dp.dly[8].y"+
+"t.dp.dly[9].a"->"t.dp.dly[9]._y"-
+~("t.dp.dly[9].a")->"t.dp.dly[9]._y"+
+"t.dp.dly[9]._y"->"t.dp.dly[9].y"-
+~("t.dp.dly[9]._y")->"t.dp.dly[9].y"+
+"t.dp.dly[10].a"->"t.dp.dly[10]._y"-
+~("t.dp.dly[10].a")->"t.dp.dly[10]._y"+
+"t.dp.dly[10]._y"->"t.dp.dly[10].y"-
+~("t.dp.dly[10]._y")->"t.dp.dly[10].y"+
+"t.dp.dly[11].a"->"t.dp.dly[11]._y"-
+~("t.dp.dly[11].a")->"t.dp.dly[11]._y"+
+"t.dp.dly[11]._y"->"t.dp.dly[11].y"-
+~("t.dp.dly[11]._y")->"t.dp.dly[11].y"+
+"t.dp.dly[12].a"->"t.dp.dly[12]._y"-
+~("t.dp.dly[12].a")->"t.dp.dly[12]._y"+
+"t.dp.dly[12]._y"->"t.dp.dly[12].y"-
+~("t.dp.dly[12]._y")->"t.dp.dly[12].y"+
+"t.dp.dly[13].a"->"t.dp.dly[13]._y"-
+~("t.dp.dly[13].a")->"t.dp.dly[13]._y"+
+"t.dp.dly[13]._y"->"t.dp.dly[13].y"-
+~("t.dp.dly[13]._y")->"t.dp.dly[13].y"+
+"t.dp.dly[14].a"->"t.dp.dly[14]._y"-
+~("t.dp.dly[14].a")->"t.dp.dly[14]._y"+
+"t.dp.dly[14]._y"->"t.dp.dly[14].y"-
+~("t.dp.dly[14]._y")->"t.dp.dly[14].y"+
+= "t.dp.dly[6].y" "t.dp.mu2[3].b"
+= "t.dp.dly[6].a" "t.dp.dly[5].y"
+= "t.dp.dly[5].a" "t.dp.dly[4].y"
+= "t.dp.dly[4].a" "t.dp.and2[3].y"
+= "t.dp.dly[3].y" "t.dp.mu2[2].b"
+= "t.dp.dly[3].a" "t.dp.dly[2].y"
+= "t.dp.dly[2].a" "t.dp.and2[2].y"
+= "t.dp.dly[1].y" "t.dp.mu2[1].b"
+= "t.dp.dly[1].a" "t.dp.and2[1].y"
+= "t.dp.dly[0].y" "t.dp.mu2[0].b"
+= "t.dp.dly[0].a" "t.dp.and2[0].y"
+= "t.dp._a[1]" "t.dp.mu2[1].a"
+= "t.dp._a[1]" "t.dp.and2[1].a"
+= "t.dp._a[1]" "t.dp.mu2[0].y"
+= "t.dp._a[2]" "t.dp.mu2[2].a"
+= "t.dp._a[2]" "t.dp.and2[2].a"
+= "t.dp._a[2]" "t.dp.mu2[1].y"
+= "t.dp._a[3]" "t.dp.mu2[3].a"
+= "t.dp._a[3]" "t.dp.and2[3].a"
+= "t.dp._a[3]" "t.dp.mu2[2].y"
+= "t.dp.y" "t.dp.mu2[3].y"
+= "t.dp.y" "t.dp._a[4]"
+= "Vdd" "t.dp.supply.vdd"
+= "GND" "t.dp.supply.vss"
+= "t.s[0]" "t.dp.s[0]"
+= "t.s[1]" "t.dp.s[1]"
+= "t.s[2]" "t.dp.s[2]"
+= "t.s[3]" "t.dp.s[3]"

test/unit_tests/delayprog_4/test.act

@@ -0,0 +1,41 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/primitives.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+defproc delayprog_4 (bool? s[4], a; bool! y){
+    delayprog<4> dp(.a=a, .y=y, .s = s);
+    dp.supply.vss = GND;
+    dp.supply.vdd = Vdd;
+
+}
+
+delayprog_4 t;

test/unit_tests/delayprog_4/test.prsim

@@ -0,0 +1,42 @@
+watchall
+
+system "echo '0'"
+
+set t.a  0
+set t.s[0] 1
+set t.s[1] 1
+set t.s[2] 1
+set t.s[3] 1
+
+cycle
+mode run
+
+assert t.y 0
+
+system "echo '[] setting high'"
+set t.a  1
+cycle
+assert t.y 1
+
+system "echo '[] setting low'"
+set t.a  0
+cycle
+assert t.y 0
+
+system "echo '[] setting configs low'"
+set t.s[0] 0
+set t.s[1] 0
+set t.s[2] 0
+set t.s[3] 0
+cycle
+assert t.y 0
+
+system "echo '[] setting high'"
+set t.a  1
+cycle
+assert t.y 1
+
+system "echo '[] setting low'"
+set t.a  0
+cycle
+assert t.y 0

test/unit_tests/demux_7/run/prsim.out

@@ -0,0 +1,330 @@
+my_demux.my_demux._c_f_buf[0] my_demux.my_demux._out1_a_BX_f[0] my_demux.my_demux.out1_f_buf_func[1].n1 my_demux.my_demux._en my_demux.my_demux._en2_X_t[0] my_demux.my_demux.vc.OR2_tf[2]._y my_demux.my_demux.out1_f_buf_func[5].n1 my_demux.my_demux.out1_t_buf_func[2].n1 my_demux.my_demux._c_t_buf[0] my_demux.my_demux._out2_a_BX_t[0] my_demux.my_demux.out1_f_buf_func[6].n1 my_demux.my_demux.out1_t_buf_func[4].n1 my_demux.my_demux._out1_a_B my_demux.my_demux.vc.tmp[9] my_demux.my_demux._out1_a_BX_t[0] my_demux.my_demux._en1_X_t[0] my_demux.my_demux.c_buf_f.in my_demux.my_demux.vc.tmp[7] my_demux.my_demux._out2_a_BX_f[0] my_demux.my_demux._en2_X_f[0] my_demux.my_demux.c_buf_t.in my_demux.my_demux.out1_t_buf_func[1].n1 my_demux.my_demux.out1_f_buf_func[0].n1 my_demux.out1.a my_demux.my_demux.out1_t_buf_func[0].n1 my_demux.my_demux.out1_f_buf_func[2].n1 my_demux.my_demux.c_buf_t.buf2._y my_demux.my_demux.vc.C2Els[1]._y my_demux.my_demux._en1_X_f[0] my_demux.my_demux.out1_f_buf_func[4].n1 my_demux.my_demux.vc.tmp[6] my_demux.my_demux.vc.tmp[1] my_demux.my_demux.out_or._y my_demux.my_demux.out1_f_buf_func[3].n1 my_demux.my_demux.vc.OR2_tf[5]._y my_demux.my_demux.vc.OR2_tf[0]._y my_demux.my_demux.out1_t_buf_func[3].n1 my_demux.my_demux.vc.C2Els[0]._y my_demux.my_demux.out1_t_buf_func[6].n1 my_demux.my_demux.vc.tmp[8] my_demux.my_demux._c_v my_demux.out2.a my_demux.my_demux.out2_a_B_buf_t.buf2._y my_demux.my_demux.out1_t_buf_func[5].n1 my_demux.my_demux._in_c_v_ my_demux.out2.v my_demux.my_demux._in_v my_demux.my_demux.vc.tmp[4] my_demux.my_demux.out1_en_buf_f.buf2._y my_demux.my_demux.out2_en_buf_f.buf2._y my_demux.my_demux.vc.tmp[0] my_demux.my_demux.vc.OR2_tf[3]._y my_demux.my_demux._out2_a_B my_demux.my_demux.vc.tmp[5] my_demux.out1.v my_demux.my_demux.c_buf_f.buf2._y my_demux.my_demux.out1_a_B_buf_t.buf2._y my_demux.my_demux._out_v my_demux.my_demux.vc.C3Els[0]._y my_demux.in.v my_demux.my_demux.vc.C3Els[1]._y my_demux.my_demux.out2_en_buf_t.buf2._y my_demux.my_demux.out2_a_B_buf_f.buf2._y my_demux.my_demux.in_v_buf._y my_demux.my_demux.vc.tmp[3] my_demux.my_demux.vc.OR2_tf[1]._y my_demux.my_demux.vc.OR2_tf[6]._y my_demux.my_demux.vc.tmp[2] my_demux.my_demux.out1_a_B_buf_f.buf2._y my_demux.my_demux.c_f_c_t_or._y my_demux.my_demux.out1_en_buf_t.buf2._y my_demux.my_demux.vc.OR2_tf[4]._y my_demux.my_demux.c_el._y 
+	    119199 my_demux.my_demux.out1_f_buf_func[0].n1 : 0
+	    119199 my_demux.my_demux.c_buf_f.in : 0
+	    119199 my_demux.my_demux.c_buf_t.in : 0
+	    119199 my_demux.my_demux.out1_f_buf_func[1].n1 : 0
+	    119199 my_demux.my_demux.out1_f_buf_func[3].n1 : 0
+	    119199 my_demux.out1.a : 0
+	    119199 my_demux.out2.v : 0
+	    119199 my_demux.my_demux.out1_t_buf_func[6].n1 : 0
+	    119199 my_demux.out2.a : 0
+	    119199 my_demux.out1.v : 0
+	    119199 my_demux.my_demux.out1_t_buf_func[2].n1 : 0
+	    119199 my_demux.my_demux.out1_f_buf_func[6].n1 : 0
+	    119199 my_demux.my_demux.out1_t_buf_func[5].n1 : 0
+	    119199 my_demux.my_demux.out1_t_buf_func[0].n1 : 0
+	    119199 my_demux.my_demux.out1_f_buf_func[2].n1 : 0
+	    119199 my_demux.my_demux.out1_f_buf_func[5].n1 : 0
+	    119199 my_demux.my_demux.out1_t_buf_func[4].n1 : 0
+	    119199 my_demux.my_demux.out1_t_buf_func[1].n1 : 0
+	    119199 my_demux.my_demux.out1_f_buf_func[4].n1 : 0
+	    119199 my_demux.my_demux.out1_t_buf_func[3].n1 : 0
+	    119200 my_demux.my_demux.c_buf_f.buf2._y : 1  [by my_demux.my_demux.c_buf_f.in:=0]
+	    119200 my_demux.my_demux.vc.OR2_tf[5]._y : 1  [by my_demux.my_demux.out1_f_buf_func[5].n1:=0]
+	    119236 my_demux.my_demux.c_buf_t.buf2._y : 1  [by my_demux.my_demux.c_buf_t.in:=0]
+	    119239 my_demux.my_demux.out_or._y : 1  [by my_demux.out1.v:=0]
+	    119286 my_demux.my_demux.vc.OR2_tf[0]._y : 1  [by my_demux.my_demux.out1_t_buf_func[0].n1:=0]
+	    119311 my_demux.my_demux._out1_a_B : 1  [by my_demux.out1.a:=0]
+	    119333 my_demux.my_demux.out1_a_B_buf_f.buf2._y : 0  [by my_demux.my_demux._out1_a_B:=1]
+	    119378 my_demux.my_demux.vc.tmp[5] : 0  [by my_demux.my_demux.vc.OR2_tf[5]._y:=1]
+	    119403 my_demux.my_demux._out_v : 0  [by my_demux.my_demux.out_or._y:=1]
+	    119456 my_demux.my_demux.vc.OR2_tf[6]._y : 1  [by my_demux.my_demux.out1_f_buf_func[6].n1:=0]
+	    119493 my_demux.my_demux.vc.OR2_tf[2]._y : 1  [by my_demux.my_demux.out1_f_buf_func[2].n1:=0]
+	    119536 my_demux.my_demux._en : 1  [by my_demux.my_demux._out_v:=0]
+	    119543 my_demux.my_demux.out2_en_buf_t.buf2._y : 0  [by my_demux.my_demux._en:=1]
+	    119566 my_demux.my_demux.out1_en_buf_f.buf2._y : 0  [by my_demux.my_demux._en:=1]
+	    119757 my_demux.my_demux.out1_en_buf_t.buf2._y : 0  [by my_demux.my_demux._en:=1]
+	    119790 my_demux.my_demux._c_f_buf[0] : 0  [by my_demux.my_demux.c_buf_f.buf2._y:=1]
+	    119848 my_demux.my_demux._en1_X_t[0] : 1  [by my_demux.my_demux.out1_en_buf_t.buf2._y:=0]
+	    119852 my_demux.my_demux.vc.tmp[2] : 0  [by my_demux.my_demux.vc.OR2_tf[2]._y:=1]
+	    119938 my_demux.my_demux.c_f_c_t_or._y : 1  [by my_demux.my_demux.c_buf_t.in:=0]
+	    120039 my_demux.my_demux._c_t_buf[0] : 0  [by my_demux.my_demux.c_buf_t.buf2._y:=1]
+	    120158 my_demux.my_demux.out1_a_B_buf_t.buf2._y : 0  [by my_demux.my_demux._out1_a_B:=1]
+	    120165 my_demux.my_demux._out1_a_BX_f[0] : 1  [by my_demux.my_demux.out1_a_B_buf_t.buf2._y:=0]
+	    120408 my_demux.my_demux.vc.OR2_tf[3]._y : 1  [by my_demux.my_demux.out1_t_buf_func[3].n1:=0]
+	    121005 my_demux.my_demux.vc.OR2_tf[1]._y : 1  [by my_demux.my_demux.out1_t_buf_func[1].n1:=0]
+	    121111 my_demux.my_demux.vc.tmp[1] : 0  [by my_demux.my_demux.vc.OR2_tf[1]._y:=1]
+	    121206 my_demux.my_demux.vc.OR2_tf[4]._y : 1  [by my_demux.my_demux.out1_f_buf_func[4].n1:=0]
+	    121284 my_demux.my_demux.vc.tmp[4] : 0  [by my_demux.my_demux.vc.OR2_tf[4]._y:=1]
+	    121481 my_demux.my_demux.vc.tmp[0] : 0  [by my_demux.my_demux.vc.OR2_tf[0]._y:=1]
+	    121756 my_demux.my_demux.vc.C2Els[0]._y : 1  [by my_demux.my_demux.vc.tmp[0]:=0]
+	    122127 my_demux.my_demux._c_v : 0  [by my_demux.my_demux.c_f_c_t_or._y:=1]
+	    123195 my_demux.my_demux.vc.tmp[3] : 0  [by my_demux.my_demux.vc.OR2_tf[3]._y:=1]
+	    123650 my_demux.my_demux.vc.C2Els[1]._y : 1  [by my_demux.my_demux.vc.tmp[3]:=0]
+	    123662 my_demux.my_demux.vc.tmp[8] : 0  [by my_demux.my_demux.vc.C2Els[1]._y:=1]
+	    126256 my_demux.my_demux._en2_X_t[0] : 1  [by my_demux.my_demux.out2_en_buf_t.buf2._y:=0]
+	    133652 my_demux.my_demux.out2_en_buf_f.buf2._y : 0  [by my_demux.my_demux._en:=1]
+	    134056 my_demux.my_demux._en2_X_f[0] : 1  [by my_demux.my_demux.out2_en_buf_f.buf2._y:=0]
+	    135118 my_demux.my_demux.vc.tmp[6] : 0  [by my_demux.my_demux.vc.OR2_tf[6]._y:=1]
+	    135130 my_demux.my_demux.vc.C3Els[0]._y : 1  [by my_demux.my_demux.vc.tmp[6]:=0]
+	    140752 my_demux.my_demux.vc.tmp[7] : 0  [by my_demux.my_demux.vc.C2Els[0]._y:=1]
+	    141046 my_demux.my_demux.vc.tmp[9] : 0  [by my_demux.my_demux.vc.C3Els[0]._y:=1]
+	    145322 my_demux.my_demux.vc.C3Els[1]._y : 1  [by my_demux.my_demux.vc.tmp[9]:=0]
+	    148221 my_demux.my_demux._in_v : 0  [by my_demux.my_demux.vc.C3Els[1]._y:=1]
+	    148223 my_demux.my_demux.c_el._y : 1  [by my_demux.my_demux._in_v:=0]
+	    149461 my_demux.my_demux._out1_a_BX_t[0] : 1  [by my_demux.my_demux.out1_a_B_buf_f.buf2._y:=0]
+	    152516 my_demux.my_demux.in_v_buf._y : 1  [by my_demux.my_demux._in_v:=0]
+	    152758 my_demux.my_demux._in_c_v_ : 0  [by my_demux.my_demux.c_el._y:=1]
+	    153765 my_demux.in.v : 0  [by my_demux.my_demux.in_v_buf._y:=1]
+	    166711 my_demux.my_demux._out2_a_B : 1  [by my_demux.out2.a:=0]
+	    166877 my_demux.my_demux.out2_a_B_buf_f.buf2._y : 0  [by my_demux.my_demux._out2_a_B:=1]
+	    166952 my_demux.my_demux._out2_a_BX_t[0] : 1  [by my_demux.my_demux.out2_a_B_buf_f.buf2._y:=0]
+	    170210 my_demux.my_demux.out2_a_B_buf_t.buf2._y : 0  [by my_demux.my_demux._out2_a_B:=1]
+	    170555 my_demux.my_demux._out2_a_BX_f[0] : 1  [by my_demux.my_demux.out2_a_B_buf_t.buf2._y:=0]
+	    177027 my_demux.my_demux._en1_X_f[0] : 1  [by my_demux.my_demux.out1_en_buf_f.buf2._y:=0]
+System initialized
+	    177027 Reset : 0
+	    177165 my_demux._reset_B : 1  [by Reset:=0]
+	    182428 my_demux.my_demux.reset_buf._y : 0  [by my_demux._reset_B:=1]
+	    182430 my_demux.my_demux._reset_BX : 1  [by my_demux.my_demux.reset_buf._y:=0]
+	    226347 my_demux.my_demux.reset_bufarray.buf4._y : 0  [by my_demux.my_demux._reset_BX:=1]
+	    226348 my_demux.my_demux._reset_BXX[0] : 1  [by my_demux.my_demux.reset_bufarray.buf4._y:=0]
+System reset completed
+
+Output neutral checked
+	    226348 my_demux.my_demux.c_buf_t.in : 1
+	    226348 my_demux.my_demux.out1_t_buf_func[6].n1 : 1
+	    226348 my_demux.my_demux.out1_t_buf_func[1].n1 : 1
+	    226348 my_demux.my_demux.out1_t_buf_func[5].n1 : 1
+	    226348 my_demux.my_demux.out1_t_buf_func[4].n1 : 1
+	    226348 my_demux.my_demux.out1_t_buf_func[0].n1 : 1
+	    226348 my_demux.my_demux.out1_t_buf_func[3].n1 : 1
+	    226348 my_demux.my_demux.out1_t_buf_func[2].n1 : 1
+	    226359 my_demux.my_demux.c_f_c_t_or._y : 0  [by my_demux.my_demux.c_buf_t.in:=1]
+	    226364 my_demux.my_demux.vc.OR2_tf[4]._y : 0  [by my_demux.my_demux.out1_t_buf_func[4].n1:=1]
+	    226415 my_demux.my_demux.vc.OR2_tf[1]._y : 0  [by my_demux.my_demux.out1_t_buf_func[1].n1:=1]
+	    226718 my_demux.my_demux.vc.OR2_tf[6]._y : 0  [by my_demux.my_demux.out1_t_buf_func[6].n1:=1]
+	    226720 my_demux.my_demux.vc.tmp[6] : 1  [by my_demux.my_demux.vc.OR2_tf[6]._y:=0]
+	    226876 my_demux.my_demux.vc.OR2_tf[3]._y : 0  [by my_demux.my_demux.out1_t_buf_func[3].n1:=1]
+	    226896 my_demux.my_demux.c_buf_t.buf2._y : 0  [by my_demux.my_demux.c_buf_t.in:=1]
+	    226899 my_demux.my_demux._c_t_buf[0] : 1  [by my_demux.my_demux.c_buf_t.buf2._y:=0]
+	    226928 my_demux.my_demux.out1_t_buf_func[0]._y : 0  [by my_demux.my_demux._c_t_buf[0]:=1]
+	    226929 my_demux.my_demux.out1_t_buf_func[0].y : 1  [by my_demux.my_demux.out1_t_buf_func[0]._y:=0]
+	    226943 my_demux.my_demux.out1_t_buf_func[4]._y : 0  [by my_demux.my_demux._c_t_buf[0]:=1]
+	    227052 my_demux.my_demux.out1_t_buf_func[3]._y : 0  [by my_demux.my_demux._c_t_buf[0]:=1]
+	    227074 my_demux.my_demux.out1_t_buf_func[3].y : 1  [by my_demux.my_demux.out1_t_buf_func[3]._y:=0]
+	    227160 my_demux.my_demux.out1_t_buf_func[4].y : 1  [by my_demux.my_demux.out1_t_buf_func[4]._y:=0]
+	    227216 my_demux.my_demux.out1_t_buf_func[1]._y : 0  [by my_demux.my_demux._c_t_buf[0]:=1]
+	    227217 my_demux.my_demux.out1_t_buf_func[1].y : 1  [by my_demux.my_demux.out1_t_buf_func[1]._y:=0]
+	    228500 my_demux.my_demux.out1_t_buf_func[2]._y : 0  [by my_demux.my_demux._c_t_buf[0]:=1]
+	    228783 my_demux.my_demux.vc.OR2_tf[2]._y : 0  [by my_demux.my_demux.out1_t_buf_func[2].n1:=1]
+	    228989 my_demux.my_demux.vc.OR2_tf[5]._y : 0  [by my_demux.my_demux.out1_t_buf_func[5].n1:=1]
+	    229148 my_demux.my_demux.vc.tmp[5] : 1  [by my_demux.my_demux.vc.OR2_tf[5]._y:=0]
+	    229660 my_demux.my_demux.out1_t_buf_func[5]._y : 0  [by my_demux.my_demux._c_t_buf[0]:=1]
+	    230081 my_demux.my_demux.out1_t_buf_func[2].y : 1  [by my_demux.my_demux.out1_t_buf_func[2]._y:=0]
+	    230910 my_demux.my_demux.vc.OR2_tf[0]._y : 0  [by my_demux.my_demux.out1_t_buf_func[0].n1:=1]
+	    232197 my_demux.my_demux.vc.tmp[0] : 1  [by my_demux.my_demux.vc.OR2_tf[0]._y:=0]
+	    238128 my_demux.my_demux.vc.tmp[2] : 1  [by my_demux.my_demux.vc.OR2_tf[2]._y:=0]
+	    239456 my_demux.my_demux.vc.tmp[1] : 1  [by my_demux.my_demux.vc.OR2_tf[1]._y:=0]
+	    240582 my_demux.my_demux.out1_t_buf_func[6]._y : 0  [by my_demux.my_demux._c_t_buf[0]:=1]
+	    240727 my_demux.my_demux.out1_t_buf_func[6].y : 1  [by my_demux.my_demux.out1_t_buf_func[6]._y:=0]
+	    241688 my_demux.my_demux.vc.C2Els[0]._y : 0  [by my_demux.my_demux.vc.tmp[1]:=1]
+	    244520 my_demux.my_demux.vc.tmp[7] : 1  [by my_demux.my_demux.vc.C2Els[0]._y:=0]
+	    249336 my_demux.my_demux.out1_t_buf_func[5].y : 1  [by my_demux.my_demux.out1_t_buf_func[5]._y:=0]
+	    250289 my_demux.my_demux.vc.tmp[4] : 1  [by my_demux.my_demux.vc.OR2_tf[4]._y:=0]
+	    253239 my_demux.my_demux._c_v : 1  [by my_demux.my_demux.c_f_c_t_or._y:=0]
+	    256643 my_demux.my_demux.vc.C3Els[0]._y : 0  [by my_demux.my_demux.vc.tmp[4]:=1]
+	    256644 my_demux.my_demux.vc.tmp[9] : 1  [by my_demux.my_demux.vc.C3Els[0]._y:=0]
+	    287834 my_demux.my_demux.vc.tmp[3] : 1  [by my_demux.my_demux.vc.OR2_tf[3]._y:=0]
+	    327118 my_demux.my_demux.vc.C2Els[1]._y : 0  [by my_demux.my_demux.vc.tmp[3]:=1]
+	    327280 my_demux.my_demux.vc.tmp[8] : 1  [by my_demux.my_demux.vc.C2Els[1]._y:=0]
+	    334649 my_demux.my_demux.vc.C3Els[1]._y : 0  [by my_demux.my_demux.vc.tmp[8]:=1]
+	    334663 my_demux.my_demux._in_v : 1  [by my_demux.my_demux.vc.C3Els[1]._y:=0]
+	    334670 my_demux.my_demux.in_v_buf._y : 0  [by my_demux.my_demux._in_v:=1]
+	    334823 my_demux.my_demux.c_el._y : 0  [by my_demux.my_demux._in_v:=1]
+	    334824 my_demux.my_demux._in_c_v_ : 1  [by my_demux.my_demux.c_el._y:=0]
+	    356227 my_demux.in.v : 1  [by my_demux.my_demux.in_v_buf._y:=0]
+	    356227 my_demux.out1.v : 1
+	    356228 my_demux.my_demux.out_or._y : 0  [by my_demux.out1.v:=1]
+	    356229 my_demux.my_demux._out_v : 1  [by my_demux.my_demux.out_or._y:=0]
+	    358472 my_demux.my_demux.inack_ctl._y : 0  [by my_demux.my_demux._out_v:=1]
+	    358659 my_demux.in.a : 1  [by my_demux.my_demux.inack_ctl._y:=0]
+	    358660 my_demux.my_demux._en : 0  [by my_demux.in.a:=1]
+	    358661 my_demux.my_demux.out2_en_buf_t.buf2._y : 1  [by my_demux.my_demux._en:=0]
+	    358666 my_demux.my_demux._en2_X_t[0] : 0  [by my_demux.my_demux.out2_en_buf_t.buf2._y:=1]
+	    359513 my_demux.my_demux.out1_en_buf_f.buf2._y : 1  [by my_demux.my_demux._en:=0]
+	    360404 my_demux.my_demux._en1_X_f[0] : 0  [by my_demux.my_demux.out1_en_buf_f.buf2._y:=1]
+	    362842 my_demux.my_demux.out2_en_buf_f.buf2._y : 1  [by my_demux.my_demux._en:=0]
+	    362843 my_demux.my_demux._en2_X_f[0] : 0  [by my_demux.my_demux.out2_en_buf_f.buf2._y:=1]
+	    393442 my_demux.my_demux.out1_en_buf_t.buf2._y : 1  [by my_demux.my_demux._en:=0]
+	    393459 my_demux.my_demux._en1_X_t[0] : 0  [by my_demux.my_demux.out1_en_buf_t.buf2._y:=1]
+	    393459 my_demux.my_demux.out1_t_buf_func[0].n1 : 0
+	    393459 my_demux.my_demux.out1_t_buf_func[6].n1 : 0
+	    393459 my_demux.my_demux.out1_t_buf_func[2].n1 : 0
+	    393459 my_demux.my_demux.out1_t_buf_func[5].n1 : 0
+	    393459 my_demux.my_demux.out1_t_buf_func[1].n1 : 0
+	    393459 my_demux.my_demux.out1_t_buf_func[4].n1 : 0
+	    393459 my_demux.my_demux.out1_t_buf_func[3].n1 : 0
+	    393460 my_demux.my_demux.vc.OR2_tf[4]._y : 1  [by my_demux.my_demux.out1_t_buf_func[4].n1:=0]
+	    393462 my_demux.my_demux.vc.OR2_tf[2]._y : 1  [by my_demux.my_demux.out1_t_buf_func[2].n1:=0]
+	    393501 my_demux.my_demux.vc.OR2_tf[3]._y : 1  [by my_demux.my_demux.out1_t_buf_func[3].n1:=0]
+	    393596 my_demux.my_demux.vc.tmp[3] : 0  [by my_demux.my_demux.vc.OR2_tf[3]._y:=1]
+	    394400 my_demux.my_demux.vc.OR2_tf[5]._y : 1  [by my_demux.my_demux.out1_t_buf_func[5].n1:=0]
+	    394735 my_demux.my_demux.vc.tmp[5] : 0  [by my_demux.my_demux.vc.OR2_tf[5]._y:=1]
+	    396032 my_demux.my_demux.vc.OR2_tf[0]._y : 1  [by my_demux.my_demux.out1_t_buf_func[0].n1:=0]
+	    396040 my_demux.my_demux.vc.tmp[0] : 0  [by my_demux.my_demux.vc.OR2_tf[0]._y:=1]
+	    396277 my_demux.my_demux.vc.tmp[4] : 0  [by my_demux.my_demux.vc.OR2_tf[4]._y:=1]
+	    401820 my_demux.my_demux.vc.OR2_tf[6]._y : 1  [by my_demux.my_demux.out1_t_buf_func[6].n1:=0]
+	    401854 my_demux.my_demux.vc.tmp[6] : 0  [by my_demux.my_demux.vc.OR2_tf[6]._y:=1]
+	    407195 my_demux.my_demux.vc.tmp[2] : 0  [by my_demux.my_demux.vc.OR2_tf[2]._y:=1]
+	    408113 my_demux.my_demux.vc.C2Els[1]._y : 1  [by my_demux.my_demux.vc.tmp[2]:=0]
+	    408117 my_demux.my_demux.vc.tmp[8] : 0  [by my_demux.my_demux.vc.C2Els[1]._y:=1]
+	    415741 my_demux.my_demux.vc.C3Els[0]._y : 1  [by my_demux.my_demux.vc.tmp[6]:=0]
+	    452421 my_demux.my_demux.vc.OR2_tf[1]._y : 1  [by my_demux.my_demux.out1_t_buf_func[1].n1:=0]
+	    454819 my_demux.my_demux.vc.tmp[1] : 0  [by my_demux.my_demux.vc.OR2_tf[1]._y:=1]
+	    458034 my_demux.my_demux.vc.C2Els[0]._y : 1  [by my_demux.my_demux.vc.tmp[1]:=0]
+	    462119 my_demux.my_demux.vc.tmp[9] : 0  [by my_demux.my_demux.vc.C3Els[0]._y:=1]
+	    505153 my_demux.my_demux.vc.tmp[7] : 0  [by my_demux.my_demux.vc.C2Els[0]._y:=1]
+	    505201 my_demux.my_demux.vc.C3Els[1]._y : 1  [by my_demux.my_demux.vc.tmp[7]:=0]
+	    505204 my_demux.my_demux._in_v : 0  [by my_demux.my_demux.vc.C3Els[1]._y:=1]
+	    505382 my_demux.my_demux.in_v_buf._y : 1  [by my_demux.my_demux._in_v:=0]
+	    526359 my_demux.in.v : 0  [by my_demux.my_demux.in_v_buf._y:=1]
+First Cond Checked
+	    526359 my_demux.out1.a : 1
+	    538258 my_demux.my_demux._out1_a_B : 0  [by my_demux.out1.a:=1]
+	    544209 my_demux.my_demux.out1_a_B_buf_f.buf2._y : 1  [by my_demux.my_demux._out1_a_B:=0]
+	    545036 my_demux.my_demux._out1_a_BX_t[0] : 0  [by my_demux.my_demux.out1_a_B_buf_f.buf2._y:=1]
+	    545037 my_demux.my_demux.out1_t_buf_func[2]._y : 1  [by my_demux.my_demux._out1_a_BX_t[0]:=0]
+	    545040 my_demux.my_demux.out1_t_buf_func[4]._y : 1  [by my_demux.my_demux._out1_a_BX_t[0]:=0]
+	    545041 my_demux.my_demux.out1_t_buf_func[4].y : 0  [by my_demux.my_demux.out1_t_buf_func[4]._y:=1]
+	    545109 my_demux.my_demux.out1_t_buf_func[3]._y : 1  [by my_demux.my_demux._out1_a_BX_t[0]:=0]
+	    545132 my_demux.my_demux.out1_t_buf_func[6]._y : 1  [by my_demux.my_demux._out1_a_BX_t[0]:=0]
+	    545173 my_demux.my_demux.out1_t_buf_func[2].y : 0  [by my_demux.my_demux.out1_t_buf_func[2]._y:=1]
+	    545209 my_demux.my_demux.out1_t_buf_func[0]._y : 1  [by my_demux.my_demux._out1_a_BX_t[0]:=0]
+	    545220 my_demux.my_demux.out1_t_buf_func[1]._y : 1  [by my_demux.my_demux._out1_a_BX_t[0]:=0]
+	    545232 my_demux.my_demux.out1_t_buf_func[1].y : 0  [by my_demux.my_demux.out1_t_buf_func[1]._y:=1]
+	    545373 my_demux.my_demux.out1_t_buf_func[6].y : 0  [by my_demux.my_demux.out1_t_buf_func[6]._y:=1]
+	    549168 my_demux.my_demux.out1_t_buf_func[0].y : 0  [by my_demux.my_demux.out1_t_buf_func[0]._y:=1]
+	    564155 my_demux.my_demux.out1_t_buf_func[3].y : 0  [by my_demux.my_demux.out1_t_buf_func[3]._y:=1]
+	    577743 my_demux.my_demux.out1_a_B_buf_t.buf2._y : 1  [by my_demux.my_demux._out1_a_B:=0]
+	    581643 my_demux.my_demux._out1_a_BX_f[0] : 0  [by my_demux.my_demux.out1_a_B_buf_t.buf2._y:=1]
+	    582324 my_demux.my_demux.out1_t_buf_func[5]._y : 1  [by my_demux.my_demux._out1_a_BX_t[0]:=0]
+	    583353 my_demux.my_demux.out1_t_buf_func[5].y : 0  [by my_demux.my_demux.out1_t_buf_func[5]._y:=1]
+System reset completed
+
+Output neutral checked
+	    583353 my_demux.my_demux.c_buf_t.in : 0
+	    583353 my_demux.out1.v : 0
+	    583353 my_demux.out1.a : 0
+	    583354 my_demux.my_demux.c_buf_t.buf2._y : 1  [by my_demux.my_demux.c_buf_t.in:=0]
+	    583354 my_demux.my_demux._out1_a_B : 1  [by my_demux.out1.a:=0]
+	    583355 my_demux.my_demux.out1_a_B_buf_t.buf2._y : 0  [by my_demux.my_demux._out1_a_B:=1]
+	    583391 my_demux.my_demux._c_t_buf[0] : 0  [by my_demux.my_demux.c_buf_t.buf2._y:=1]
+	    583409 my_demux.my_demux.c_f_c_t_or._y : 1  [by my_demux.my_demux.c_buf_t.in:=0]
+	    585101 my_demux.my_demux._c_v : 0  [by my_demux.my_demux.c_f_c_t_or._y:=1]
+	    585114 my_demux.my_demux.c_el._y : 1  [by my_demux.my_demux._c_v:=0]
+	    586919 my_demux.my_demux._out1_a_BX_f[0] : 1  [by my_demux.my_demux.out1_a_B_buf_t.buf2._y:=0]
+	    602098 my_demux.my_demux._in_c_v_ : 0  [by my_demux.my_demux.c_el._y:=1]
+	    606729 my_demux.my_demux.out1_a_B_buf_f.buf2._y : 0  [by my_demux.my_demux._out1_a_B:=1]
+	    607086 my_demux.my_demux._out1_a_BX_t[0] : 1  [by my_demux.my_demux.out1_a_B_buf_f.buf2._y:=0]
+	    628359 my_demux.my_demux.out_or._y : 1  [by my_demux.out1.v:=0]
+	    628384 my_demux.my_demux._out_v : 0  [by my_demux.my_demux.out_or._y:=1]
+	    628405 my_demux.my_demux.inack_ctl._y : 1  [by my_demux.my_demux._out_v:=0]
+	    628406 my_demux.in.a : 0  [by my_demux.my_demux.inack_ctl._y:=1]
+	    638054 my_demux.my_demux._en : 1  [by my_demux.in.a:=0]
+	    638055 my_demux.my_demux.out2_en_buf_f.buf2._y : 0  [by my_demux.my_demux._en:=1]
+	    638055 my_demux.my_demux.out1_en_buf_t.buf2._y : 0  [by my_demux.my_demux._en:=1]
+	    638060 my_demux.my_demux._en2_X_f[0] : 1  [by my_demux.my_demux.out2_en_buf_f.buf2._y:=0]
+	    638215 my_demux.my_demux.out2_en_buf_t.buf2._y : 0  [by my_demux.my_demux._en:=1]
+	    638623 my_demux.my_demux._en2_X_t[0] : 1  [by my_demux.my_demux.out2_en_buf_t.buf2._y:=0]
+	    638636 my_demux.my_demux._en1_X_t[0] : 1  [by my_demux.my_demux.out1_en_buf_t.buf2._y:=0]
+	    639091 my_demux.my_demux.out1_en_buf_f.buf2._y : 0  [by my_demux.my_demux._en:=1]
+	    639102 my_demux.my_demux._en1_X_f[0] : 1  [by my_demux.my_demux.out1_en_buf_f.buf2._y:=0]
+	    639102 my_demux.my_demux.c_buf_f.in : 1
+	    639102 my_demux.my_demux.out1_t_buf_func[6].n1 : 1
+	    639102 my_demux.my_demux.out1_f_buf_func[1].n1 : 1
+	    639102 my_demux.my_demux.out1_t_buf_func[5].n1 : 1
+	    639102 my_demux.my_demux.out1_f_buf_func[4].n1 : 1
+	    639102 my_demux.my_demux.out1_f_buf_func[0].n1 : 1
+	    639102 my_demux.my_demux.out1_f_buf_func[3].n1 : 1
+	    639102 my_demux.my_demux.out1_t_buf_func[2].n1 : 1
+	    639106 my_demux.my_demux.vc.OR2_tf[1]._y : 0  [by my_demux.my_demux.out1_f_buf_func[1].n1:=1]
+	    639116 my_demux.my_demux.c_buf_f.buf2._y : 0  [by my_demux.my_demux.c_buf_f.in:=1]
+	    639120 my_demux.my_demux.vc.OR2_tf[6]._y : 0  [by my_demux.my_demux.out1_t_buf_func[6].n1:=1]
+	    639190 my_demux.my_demux.vc.tmp[6] : 1  [by my_demux.my_demux.vc.OR2_tf[6]._y:=0]
+	    639206 my_demux.my_demux.vc.OR2_tf[5]._y : 0  [by my_demux.my_demux.out1_t_buf_func[5].n1:=1]
+	    639330 my_demux.my_demux.vc.OR2_tf[2]._y : 0  [by my_demux.my_demux.out1_t_buf_func[2].n1:=1]
+	    639341 my_demux.my_demux.vc.tmp[2] : 1  [by my_demux.my_demux.vc.OR2_tf[2]._y:=0]
+	    639949 my_demux.my_demux.vc.tmp[1] : 1  [by my_demux.my_demux.vc.OR2_tf[1]._y:=0]
+	    640149 my_demux.my_demux.c_f_c_t_or._y : 0  [by my_demux.my_demux.c_buf_f.in:=1]
+	    640152 my_demux.my_demux._c_v : 1  [by my_demux.my_demux.c_f_c_t_or._y:=0]
+	    640306 my_demux.my_demux.vc.OR2_tf[0]._y : 0  [by my_demux.my_demux.out1_f_buf_func[0].n1:=1]
+	    640360 my_demux.my_demux.vc.tmp[0] : 1  [by my_demux.my_demux.vc.OR2_tf[0]._y:=0]
+	    640575 my_demux.my_demux._c_f_buf[0] : 1  [by my_demux.my_demux.c_buf_f.buf2._y:=0]
+	    640656 my_demux.my_demux.out2_t_buf_func[6]._y : 0  [by my_demux.my_demux._c_f_buf[0]:=1]
+	    640667 my_demux.my_demux.out2_f_buf_func[3]._y : 0  [by my_demux.my_demux._c_f_buf[0]:=1]
+	    641280 my_demux.my_demux.out2_f_buf_func[3].y : 1  [by my_demux.my_demux.out2_f_buf_func[3]._y:=0]
+	    641508 my_demux.my_demux.vc.C2Els[0]._y : 0  [by my_demux.my_demux.vc.tmp[0]:=1]
+	    641736 my_demux.my_demux.out2_t_buf_func[2]._y : 0  [by my_demux.my_demux._c_f_buf[0]:=1]
+	    641781 my_demux.my_demux.out2_t_buf_func[2].y : 1  [by my_demux.my_demux.out2_t_buf_func[2]._y:=0]
+	    642400 my_demux.my_demux.out2_t_buf_func[6].y : 1  [by my_demux.my_demux.out2_t_buf_func[6]._y:=0]
+	    647557 my_demux.my_demux.vc.OR2_tf[3]._y : 0  [by my_demux.my_demux.out1_f_buf_func[3].n1:=1]
+	    648554 my_demux.my_demux.vc.tmp[3] : 1  [by my_demux.my_demux.vc.OR2_tf[3]._y:=0]
+	    648886 my_demux.my_demux.out2_f_buf_func[4]._y : 0  [by my_demux.my_demux._c_f_buf[0]:=1]
+	    649227 my_demux.my_demux.out2_t_buf_func[5]._y : 0  [by my_demux.my_demux._c_f_buf[0]:=1]
+	    649411 my_demux.my_demux.out2_f_buf_func[4].y : 1  [by my_demux.my_demux.out2_f_buf_func[4]._y:=0]
+	    650127 my_demux.my_demux.out2_t_buf_func[5].y : 1  [by my_demux.my_demux.out2_t_buf_func[5]._y:=0]
+	    650203 my_demux.my_demux.vc.C2Els[1]._y : 0  [by my_demux.my_demux.vc.tmp[3]:=1]
+	    650255 my_demux.my_demux.vc.tmp[8] : 1  [by my_demux.my_demux.vc.C2Els[1]._y:=0]
+	    651652 my_demux.my_demux.out2_f_buf_func[0]._y : 0  [by my_demux.my_demux._c_f_buf[0]:=1]
+	    651659 my_demux.my_demux.out2_f_buf_func[0].y : 1  [by my_demux.my_demux.out2_f_buf_func[0]._y:=0]
+	    655530 my_demux.my_demux.vc.tmp[7] : 1  [by my_demux.my_demux.vc.C2Els[0]._y:=0]
+	    658558 my_demux.my_demux.out2_f_buf_func[1]._y : 0  [by my_demux.my_demux._c_f_buf[0]:=1]
+	    670546 my_demux.my_demux.vc.OR2_tf[4]._y : 0  [by my_demux.my_demux.out1_f_buf_func[4].n1:=1]
+	    674170 my_demux.my_demux.out2_f_buf_func[1].y : 1  [by my_demux.my_demux.out2_f_buf_func[1]._y:=0]
+	    677013 my_demux.my_demux.vc.tmp[4] : 1  [by my_demux.my_demux.vc.OR2_tf[4]._y:=0]
+	    689628 my_demux.my_demux.vc.tmp[5] : 1  [by my_demux.my_demux.vc.OR2_tf[5]._y:=0]
+	    689630 my_demux.my_demux.vc.C3Els[0]._y : 0  [by my_demux.my_demux.vc.tmp[5]:=1]
+	    689984 my_demux.my_demux.vc.tmp[9] : 1  [by my_demux.my_demux.vc.C3Els[0]._y:=0]
+	    690117 my_demux.my_demux.vc.C3Els[1]._y : 0  [by my_demux.my_demux.vc.tmp[9]:=1]
+	    690118 my_demux.my_demux._in_v : 1  [by my_demux.my_demux.vc.C3Els[1]._y:=0]
+	    690122 my_demux.my_demux.in_v_buf._y : 0  [by my_demux.my_demux._in_v:=1]
+	    690664 my_demux.my_demux.c_el._y : 0  [by my_demux.my_demux._in_v:=1]
+	    690665 my_demux.my_demux._in_c_v_ : 1  [by my_demux.my_demux.c_el._y:=0]
+	    735685 my_demux.in.v : 1  [by my_demux.my_demux.in_v_buf._y:=0]
+	    735685 my_demux.out2.v : 1
+	    748063 my_demux.my_demux.out_or._y : 0  [by my_demux.out2.v:=1]
+	    748142 my_demux.my_demux._out_v : 1  [by my_demux.my_demux.out_or._y:=0]
+	    750575 my_demux.my_demux.inack_ctl._y : 0  [by my_demux.my_demux._out_v:=1]
+	    750663 my_demux.in.a : 1  [by my_demux.my_demux.inack_ctl._y:=0]
+	    758445 my_demux.my_demux._en : 0  [by my_demux.in.a:=1]
+	    758475 my_demux.my_demux.out2_en_buf_t.buf2._y : 1  [by my_demux.my_demux._en:=0]
+	    758504 my_demux.my_demux.out1_en_buf_t.buf2._y : 1  [by my_demux.my_demux._en:=0]
+	    759912 my_demux.my_demux.out1_en_buf_f.buf2._y : 1  [by my_demux.my_demux._en:=0]
+	    760597 my_demux.my_demux._en1_X_f[0] : 0  [by my_demux.my_demux.out1_en_buf_f.buf2._y:=1]
+	    777888 my_demux.my_demux._en1_X_t[0] : 0  [by my_demux.my_demux.out1_en_buf_t.buf2._y:=1]
+	    786772 my_demux.my_demux.out2_en_buf_f.buf2._y : 1  [by my_demux.my_demux._en:=0]
+	    803487 my_demux.my_demux._en2_X_f[0] : 0  [by my_demux.my_demux.out2_en_buf_f.buf2._y:=1]
+	    817979 my_demux.my_demux._en2_X_t[0] : 0  [by my_demux.my_demux.out2_en_buf_t.buf2._y:=1]
+	    817979 my_demux.my_demux.out1_f_buf_func[0].n1 : 0
+	    817979 my_demux.my_demux.out1_t_buf_func[6].n1 : 0
+	    817979 my_demux.my_demux.out1_t_buf_func[2].n1 : 0
+	    817979 my_demux.my_demux.out1_t_buf_func[5].n1 : 0
+	    817979 my_demux.my_demux.out1_f_buf_func[1].n1 : 0
+	    817979 my_demux.my_demux.out1_f_buf_func[4].n1 : 0
+	    817979 my_demux.my_demux.out1_f_buf_func[3].n1 : 0
+	    817982 my_demux.my_demux.vc.OR2_tf[3]._y : 1  [by my_demux.my_demux.out1_f_buf_func[3].n1:=0]
+	    817991 my_demux.my_demux.vc.OR2_tf[5]._y : 1  [by my_demux.my_demux.out1_t_buf_func[5].n1:=0]
+	    817992 my_demux.my_demux.vc.tmp[5] : 0  [by my_demux.my_demux.vc.OR2_tf[5]._y:=1]
+	    818020 my_demux.my_demux.vc.tmp[3] : 0  [by my_demux.my_demux.vc.OR2_tf[3]._y:=1]
+	    818022 my_demux.my_demux.vc.OR2_tf[2]._y : 1  [by my_demux.my_demux.out1_t_buf_func[2].n1:=0]
+	    818106 my_demux.my_demux.vc.OR2_tf[0]._y : 1  [by my_demux.my_demux.out1_f_buf_func[0].n1:=0]
+	    818148 my_demux.my_demux.vc.OR2_tf[6]._y : 1  [by my_demux.my_demux.out1_t_buf_func[6].n1:=0]
+	    818198 my_demux.my_demux.vc.tmp[0] : 0  [by my_demux.my_demux.vc.OR2_tf[0]._y:=1]
+	    818212 my_demux.my_demux.vc.OR2_tf[4]._y : 1  [by my_demux.my_demux.out1_f_buf_func[4].n1:=0]
+	    818214 my_demux.my_demux.vc.tmp[4] : 0  [by my_demux.my_demux.vc.OR2_tf[4]._y:=1]
+	    819258 my_demux.my_demux.vc.OR2_tf[1]._y : 1  [by my_demux.my_demux.out1_f_buf_func[1].n1:=0]
+	    819259 my_demux.my_demux.vc.tmp[1] : 0  [by my_demux.my_demux.vc.OR2_tf[1]._y:=1]
+	    820760 my_demux.my_demux.vc.C2Els[0]._y : 1  [by my_demux.my_demux.vc.tmp[1]:=0]
+	    820762 my_demux.my_demux.vc.tmp[7] : 0  [by my_demux.my_demux.vc.C2Els[0]._y:=1]
+	    820875 my_demux.my_demux.vc.tmp[6] : 0  [by my_demux.my_demux.vc.OR2_tf[6]._y:=1]
+	    820893 my_demux.my_demux.vc.C3Els[0]._y : 1  [by my_demux.my_demux.vc.tmp[6]:=0]
+	    821012 my_demux.my_demux.vc.tmp[9] : 0  [by my_demux.my_demux.vc.C3Els[0]._y:=1]
+	    830774 my_demux.my_demux.vc.tmp[2] : 0  [by my_demux.my_demux.vc.OR2_tf[2]._y:=1]
+	    836494 my_demux.my_demux.vc.C2Els[1]._y : 1  [by my_demux.my_demux.vc.tmp[2]:=0]
+	    836502 my_demux.my_demux.vc.tmp[8] : 0  [by my_demux.my_demux.vc.C2Els[1]._y:=1]
+	    836556 my_demux.my_demux.vc.C3Els[1]._y : 1  [by my_demux.my_demux.vc.tmp[8]:=0]
+	    887094 my_demux.my_demux._in_v : 0  [by my_demux.my_demux.vc.C3Els[1]._y:=1]
+	    887099 my_demux.my_demux.in_v_buf._y : 1  [by my_demux.my_demux._in_v:=0]
+	    888166 my_demux.in.v : 0  [by my_demux.my_demux.in_v_buf._y:=1]
+Second Cond Checked

test/unit_tests/demux_7/test.act

@@ -0,0 +1,49 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/primitives.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+
+defproc demux_7 (avMx1of2<7> in; avMx1of2<7> out1; avMx1of2<7> out2; avMx1of2<1> cond){
+
+    demux<7> my_demux(.in=in, .out1=out1,.out2 = out2, .cond = cond);
+    //Low active Reset 
+    bool _reset_B; 
+    prs {
+    	Reset => _reset_B-
+    }
+    my_demux.supply.vss = GND;
+    my_demux.supply.vdd = Vdd;
+    my_demux.reset_B = _reset_B;
+    
+}
+
+demux_7 my_demux;

test/unit_tests/demux_7/test.prsim

@@ -0,0 +1,82 @@
+watchall
+set-qdi-channel-neutral "my_demux.in" 7
+set my_demux.out1.a 0
+set my_demux.out1.v 0
+set my_demux.out2.a 0
+set my_demux.out2.v 0
+set my_demux.cond.d.d[0].t 0
+set my_demux.cond.d.d[0].f 0
+cycle
+system "echo 'System initialized'"
+
+set Reset 0
+cycle
+system "echo 'System reset completed'"
+status X
+mode run
+
+assert-qdi-channel-neutral "my_demux.out1" 7
+assert-qdi-channel-neutral "my_demux.out2" 7
+assert-qdi-channel-neutral "my_demux.in" 7
+cycle
+
+system "echo 'Output neutral checked'"
+
+set my_demux.cond.d.d[0].t 1
+set my_demux.cond.d.d[0].f 0
+set-qdi-channel-valid "my_demux.in" 7 127
+cycle
+assert my_demux.in.v 1
+assert my_demux.in.a 0
+
+assert-qdi-channel-valid "my_demux.out1" 7 127
+set my_demux.out1.v 1
+cycle
+assert my_demux.in.a 1
+set-qdi-channel-neutral "my_demux.in" 7
+cycle
+set my_demux.out1.a 1
+
+
+system "echo 'First Cond Checked'"
+
+
+set Reset 0
+cycle
+system "echo 'System reset completed'"
+status X
+mode run
+
+assert-qdi-channel-neutral "my_demux.out1" 7
+assert-qdi-channel-neutral "my_demux.out2" 7
+assert-qdi-channel-neutral "my_demux.in" 7
+cycle
+
+system "echo 'Output neutral checked'"
+
+set my_demux.cond.d.d[0].t 0
+set my_demux.cond.d.d[0].f 0
+set my_demux.out1.a 0
+set my_demux.out1.v 0
+set my_demux.out2.a 0
+set my_demux.out2.v 0
+cycle
+
+set my_demux.cond.d.d[0].t 0
+set my_demux.cond.d.d[0].f 1
+set-qdi-channel-valid "my_demux.in" 7 100
+cycle
+assert my_demux.in.v 1
+assert my_demux.in.a 0
+
+assert-qdi-channel-valid "my_demux.out2" 7 100
+set my_demux.out2.v 1
+cycle
+assert my_demux.in.a 1
+set-qdi-channel-neutral "my_demux.in" 7
+cycle
+
+
+system "echo 'Second Cond Checked'"
+
+

test/unit_tests/demux_td_2/run/prsim.out

@@ -0,0 +1,197 @@
+my_demux.my_demux.out1_f_buf_func[1].n1 my_demux.my_demux.out1_t_buf_func[1].n1 my_demux.my_demux._out1_a_BX_f[0] my_demux.my_demux.out1_en_buf_t.buf1._y my_demux.my_demux.token_a_out my_demux.my_demux._out_v my_demux.my_demux._in_v my_demux.my_demux._c_d_buf[0] my_demux.my_demux._en my_demux.my_demux.vc.OR2_tf[1].y my_demux.my_demux.cond_inv_f my_demux.my_demux._out1_a_B my_demux.my_demux.invout_f.a my_demux.my_demux._out1_a_BX_t[0] my_demux.in.v my_demux.my_demux._c_v my_demux.my_demux.invout_t.a my_demux.my_demux.out1_f_buf_func[0].n1 my_demux.out1.v my_demux.my_demux.out1_t_buf_func[0].n1 my_demux.my_demux.cond_inv_t my_demux.out1.a my_demux.my_demux._en1_X_f[0] my_demux.my_demux.out_or._y my_demux.my_demux._en1_X_t[0] my_demux.my_demux.vc.OR2_tf[0]._y my_demux.my_demux.in_v_buf._y my_demux.my_demux.vc.OR2_tf[0].y my_demux.token.a my_demux.my_demux.vc.OR2_tf[1]._y my_demux.my_demux._in_c_v_ my_demux.my_demux.c_buf_tk_inv._y my_demux.my_demux.c_f_c_t_or._y my_demux.my_demux.out1_en_buf_f.buf1._y my_demux.my_demux.c_buf_d_inv.buf1._y my_demux.my_demux._c_tk_buf my_demux.my_demux.vc.myctree.C2Els[0]._y my_demux.my_demux.out1_a_B_buf_f.buf1._y my_demux.my_demux.c_el._y my_demux.my_demux.out1_a_B_buf_t.buf1._y 
+	     83058 my_demux.my_demux.out1_f_buf_func[0].n1 : 0
+	     83058 my_demux.my_demux.invout_f.a : 0
+	     83058 my_demux.my_demux.invout_t.a : 0
+	     83058 my_demux.my_demux.out1_f_buf_func[1].n1 : 0
+	     83058 my_demux.token.a : 0
+	     83058 my_demux.out1.v : 0
+	     83058 my_demux.my_demux.out1_t_buf_func[0].n1 : 0
+	     83058 my_demux.out1.a : 0
+	     83058 my_demux.my_demux.out1_t_buf_func[1].n1 : 0
+	     83062 my_demux.my_demux.c_f_c_t_or._y : 1  [by my_demux.my_demux.invout_t.a:=0]
+	     83073 my_demux.my_demux.out_or._y : 1  [by my_demux.out1.v:=0]
+	     83113 my_demux.my_demux.vc.OR2_tf[1]._y : 1  [by my_demux.my_demux.out1_t_buf_func[1].n1:=0]
+	     92187 my_demux.my_demux.token_a_out : 1  [by my_demux.token.a:=0]
+	     96782 my_demux.my_demux.cond_inv_t : 1  [by my_demux.my_demux.invout_t.a:=0]
+	     96962 my_demux.my_demux.vc.OR2_tf[1].y : 0  [by my_demux.my_demux.vc.OR2_tf[1]._y:=1]
+	    112853 my_demux.my_demux._out_v : 0  [by my_demux.my_demux.out_or._y:=1]
+	    119989 my_demux.my_demux._out1_a_B : 1  [by my_demux.out1.a:=0]
+	    120411 my_demux.my_demux.out1_a_B_buf_f.buf1._y : 0  [by my_demux.my_demux._out1_a_B:=1]
+	    120412 my_demux.my_demux._out1_a_BX_t[0] : 1  [by my_demux.my_demux.out1_a_B_buf_f.buf1._y:=0]
+	    121594 my_demux.my_demux.c_buf_tk_inv._y : 0  [by my_demux.my_demux.cond_inv_t:=1]
+	    121595 my_demux.my_demux._c_tk_buf : 1  [by my_demux.my_demux.c_buf_tk_inv._y:=0]
+	    126306 my_demux.my_demux.vc.OR2_tf[0]._y : 1  [by my_demux.my_demux.out1_t_buf_func[0].n1:=0]
+	    127156 my_demux.my_demux.cond_inv_f : 1  [by my_demux.my_demux.invout_f.a:=0]
+	    127196 my_demux.my_demux._en : 1  [by my_demux.my_demux._out_v:=0]
+	    127199 my_demux.my_demux.out1_en_buf_f.buf1._y : 0  [by my_demux.my_demux._en:=1]
+	    127438 my_demux.my_demux.c_buf_d_inv.buf1._y : 0  [by my_demux.my_demux.cond_inv_f:=1]
+	    127964 my_demux.my_demux.out1_en_buf_t.buf1._y : 0  [by my_demux.my_demux._en:=1]
+	    127989 my_demux.my_demux._c_d_buf[0] : 1  [by my_demux.my_demux.c_buf_d_inv.buf1._y:=0]
+	    129035 my_demux.my_demux._en1_X_t[0] : 1  [by my_demux.my_demux.out1_en_buf_t.buf1._y:=0]
+	    134715 my_demux.my_demux._c_v : 0  [by my_demux.my_demux.c_f_c_t_or._y:=1]
+	    146511 my_demux.my_demux.vc.OR2_tf[0].y : 0  [by my_demux.my_demux.vc.OR2_tf[0]._y:=1]
+	    147465 my_demux.my_demux.vc.myctree.C2Els[0]._y : 1  [by my_demux.my_demux.vc.OR2_tf[0].y:=0]
+	    148546 my_demux.my_demux._in_v : 0  [by my_demux.my_demux.vc.myctree.C2Els[0]._y:=1]
+	    149528 my_demux.my_demux.c_el._y : 1  [by my_demux.my_demux._in_v:=0]
+	    149546 my_demux.my_demux._in_c_v_ : 0  [by my_demux.my_demux.c_el._y:=1]
+	    149640 my_demux.my_demux._en1_X_f[0] : 1  [by my_demux.my_demux.out1_en_buf_f.buf1._y:=0]
+	    168703 my_demux.my_demux.out1_a_B_buf_t.buf1._y : 0  [by my_demux.my_demux._out1_a_B:=1]
+	    172716 my_demux.my_demux._out1_a_BX_f[0] : 1  [by my_demux.my_demux.out1_a_B_buf_t.buf1._y:=0]
+	    203016 my_demux.my_demux.in_v_buf._y : 1  [by my_demux.my_demux._in_v:=0]
+	    207019 my_demux.in.v : 0  [by my_demux.my_demux.in_v_buf._y:=1]
+System initialized
+	    207019 Reset : 0
+	    251920 my_demux._reset_B : 1  [by Reset:=0]
+	    273504 my_demux.my_demux.reset_buf._y : 0  [by my_demux._reset_B:=1]
+	    278264 my_demux.my_demux._reset_BX : 1  [by my_demux.my_demux.reset_buf._y:=0]
+	    278467 my_demux.my_demux.reset_buf_token._y : 0  [by my_demux.my_demux._reset_BX:=1]
+	    278766 my_demux.my_demux.reset_bufarray.buf1._y : 0  [by my_demux.my_demux._reset_BX:=1]
+	    278905 my_demux.my_demux._reset_BXX[0] : 1  [by my_demux.my_demux.reset_bufarray.buf1._y:=0]
+	    280321 my_demux.my_demux._reset_BXt : 1  [by my_demux.my_demux.reset_buf_token._y:=0]
+System reset completed
+
+Output neutral checked
+	    280321 my_demux.my_demux.invout_t.a : 1
+	    280321 my_demux.my_demux.out1_t_buf_func[1].n1 : 1
+	    280321 my_demux.my_demux.out1_t_buf_func[0].n1 : 1
+	    280332 my_demux.my_demux.vc.OR2_tf[1]._y : 0  [by my_demux.my_demux.out1_t_buf_func[1].n1:=1]
+	    280333 my_demux.my_demux.vc.OR2_tf[1].y : 1  [by my_demux.my_demux.vc.OR2_tf[1]._y:=0]
+	    280336 my_demux.my_demux.out1_t_buf_func[0]._y : 0  [by my_demux.my_demux.out1_t_buf_func[0].n1:=1]
+	    280373 my_demux.my_demux.out1_t_buf_func[0].y : 1  [by my_demux.my_demux.out1_t_buf_func[0]._y:=0]
+	    280390 my_demux.my_demux.c_f_c_t_or._y : 0  [by my_demux.my_demux.invout_t.a:=1]
+	    280525 my_demux.my_demux.vc.OR2_tf[0]._y : 0  [by my_demux.my_demux.out1_t_buf_func[0].n1:=1]
+	    280637 my_demux.my_demux.vc.OR2_tf[0].y : 1  [by my_demux.my_demux.vc.OR2_tf[0]._y:=0]
+	    281129 my_demux.my_demux._c_v : 1  [by my_demux.my_demux.c_f_c_t_or._y:=0]
+	    316667 my_demux.my_demux.cond_inv_t : 0  [by my_demux.my_demux.invout_t.a:=1]
+	    316707 my_demux.my_demux.c_buf_tk_inv._y : 1  [by my_demux.my_demux.cond_inv_t:=0]
+	    316964 my_demux.my_demux._c_tk_buf : 0  [by my_demux.my_demux.c_buf_tk_inv._y:=1]
+	    328149 my_demux.my_demux.vc.myctree.C2Els[0]._y : 0  [by my_demux.my_demux.vc.OR2_tf[0].y:=1]
+	    328236 my_demux.my_demux._in_v : 1  [by my_demux.my_demux.vc.myctree.C2Els[0]._y:=0]
+	    328237 my_demux.my_demux.c_el._y : 0  [by my_demux.my_demux._in_v:=1]
+	    328530 my_demux.my_demux.in_v_buf._y : 0  [by my_demux.my_demux._in_v:=1]
+	    330043 my_demux.my_demux._in_c_v_ : 1  [by my_demux.my_demux.c_el._y:=0]
+	    330537 my_demux.in.v : 1  [by my_demux.my_demux.in_v_buf._y:=0]
+	    332107 my_demux.my_demux.out1_t_buf_func[1]._y : 0  [by my_demux.my_demux.out1_t_buf_func[1].n1:=1]
+	    333316 my_demux.my_demux.out1_t_buf_func[1].y : 1  [by my_demux.my_demux.out1_t_buf_func[1]._y:=0]
+	    333316 my_demux.out1.v : 1
+	    333906 my_demux.my_demux.out_or._y : 0  [by my_demux.out1.v:=1]
+	    334084 my_demux.my_demux._out_v : 1  [by my_demux.my_demux.out_or._y:=0]
+	    334887 my_demux.my_demux.inack_ctl._y : 0  [by my_demux.my_demux._out_v:=1]
+	    335051 my_demux.in.a : 1  [by my_demux.my_demux.inack_ctl._y:=0]
+	    337246 my_demux.my_demux._en : 0  [by my_demux.in.a:=1]
+	    337268 my_demux.my_demux.out1_en_buf_t.buf1._y : 1  [by my_demux.my_demux._en:=0]
+	    338093 my_demux.my_demux.out1_en_buf_f.buf1._y : 1  [by my_demux.my_demux._en:=0]
+	    338226 my_demux.my_demux._en1_X_f[0] : 0  [by my_demux.my_demux.out1_en_buf_f.buf1._y:=1]
+	    367396 my_demux.my_demux._en1_X_t[0] : 0  [by my_demux.my_demux.out1_en_buf_t.buf1._y:=1]
+	    367396 my_demux.my_demux.out1_t_buf_func[0].n1 : 0
+	    367396 my_demux.my_demux.out1_t_buf_func[1].n1 : 0
+	    367755 my_demux.my_demux.vc.OR2_tf[1]._y : 1  [by my_demux.my_demux.out1_t_buf_func[1].n1:=0]
+	    381871 my_demux.my_demux.vc.OR2_tf[1].y : 0  [by my_demux.my_demux.vc.OR2_tf[1]._y:=1]
+	    383058 my_demux.my_demux.vc.OR2_tf[0]._y : 1  [by my_demux.my_demux.out1_t_buf_func[0].n1:=0]
+	    383279 my_demux.my_demux.vc.OR2_tf[0].y : 0  [by my_demux.my_demux.vc.OR2_tf[0]._y:=1]
+	    383286 my_demux.my_demux.vc.myctree.C2Els[0]._y : 1  [by my_demux.my_demux.vc.OR2_tf[0].y:=0]
+	    383316 my_demux.my_demux._in_v : 0  [by my_demux.my_demux.vc.myctree.C2Els[0]._y:=1]
+	    390029 my_demux.my_demux.in_v_buf._y : 1  [by my_demux.my_demux._in_v:=0]
+	    447490 my_demux.in.v : 0  [by my_demux.my_demux.in_v_buf._y:=1]
+	    447490 my_demux.out1.a : 1
+	    447581 my_demux.my_demux._out1_a_B : 0  [by my_demux.out1.a:=1]
+	    447588 my_demux.my_demux.out1_a_B_buf_t.buf1._y : 1  [by my_demux.my_demux._out1_a_B:=0]
+	    449770 my_demux.my_demux.out1_a_B_buf_f.buf1._y : 1  [by my_demux.my_demux._out1_a_B:=0]
+	    449876 my_demux.my_demux._out1_a_BX_t[0] : 0  [by my_demux.my_demux.out1_a_B_buf_f.buf1._y:=1]
+	    449954 my_demux.my_demux.out1_t_buf_func[0]._y : 1  [by my_demux.my_demux._out1_a_BX_t[0]:=0]
+	    450151 my_demux.my_demux.out1_t_buf_func[1]._y : 1  [by my_demux.my_demux._out1_a_BX_t[0]:=0]
+	    450375 my_demux.my_demux._out1_a_BX_f[0] : 0  [by my_demux.my_demux.out1_a_B_buf_t.buf1._y:=1]
+	    450606 my_demux.my_demux.out1_t_buf_func[1].y : 0  [by my_demux.my_demux.out1_t_buf_func[1]._y:=1]
+	    468950 my_demux.my_demux.out1_t_buf_func[0].y : 0  [by my_demux.my_demux.out1_t_buf_func[0]._y:=1]
+First Cond Checked
+	    468950 my_demux.my_demux.invout_t.a : 0
+	    468950 my_demux.out1.v : 0
+	    468950 my_demux.out1.a : 0
+	    468962 my_demux.my_demux.cond_inv_t : 1  [by my_demux.my_demux.invout_t.a:=0]
+	    468962 my_demux.my_demux.out_or._y : 1  [by my_demux.out1.v:=0]
+	    469354 my_demux.my_demux.c_f_c_t_or._y : 1  [by my_demux.my_demux.invout_t.a:=0]
+	    471861 my_demux.my_demux._out_v : 0  [by my_demux.my_demux.out_or._y:=1]
+	    473238 my_demux.my_demux.c_buf_tk_inv._y : 0  [by my_demux.my_demux.cond_inv_t:=1]
+	    473240 my_demux.my_demux._c_tk_buf : 1  [by my_demux.my_demux.c_buf_tk_inv._y:=0]
+	    473649 my_demux.my_demux._c_v : 0  [by my_demux.my_demux.c_f_c_t_or._y:=1]
+	    474866 my_demux.my_demux._out1_a_B : 1  [by my_demux.out1.a:=0]
+	    476115 my_demux.my_demux.out1_a_B_buf_f.buf1._y : 0  [by my_demux.my_demux._out1_a_B:=1]
+	    476281 my_demux.my_demux._out1_a_BX_t[0] : 1  [by my_demux.my_demux.out1_a_B_buf_f.buf1._y:=0]
+	    478184 my_demux.my_demux.c_el._y : 1  [by my_demux.my_demux._c_v:=0]
+	    478259 my_demux.my_demux._in_c_v_ : 0  [by my_demux.my_demux.c_el._y:=1]
+	    478365 my_demux.my_demux.out1_a_B_buf_t.buf1._y : 0  [by my_demux.my_demux._out1_a_B:=1]
+	    478503 my_demux.my_demux._out1_a_BX_f[0] : 1  [by my_demux.my_demux.out1_a_B_buf_t.buf1._y:=0]
+	    478604 my_demux.my_demux.inack_ctl._y : 1  [by my_demux.my_demux._in_c_v_:=0]
+	    483867 my_demux.in.a : 0  [by my_demux.my_demux.inack_ctl._y:=1]
+	    483869 my_demux.my_demux._en : 1  [by my_demux.in.a:=0]
+	    483870 my_demux.my_demux.out1_en_buf_f.buf1._y : 0  [by my_demux.my_demux._en:=1]
+	    484418 my_demux.my_demux._en1_X_f[0] : 1  [by my_demux.my_demux.out1_en_buf_f.buf1._y:=0]
+	    527786 my_demux.my_demux.out1_en_buf_t.buf1._y : 0  [by my_demux.my_demux._en:=1]
+	    527797 my_demux.my_demux._en1_X_t[0] : 1  [by my_demux.my_demux.out1_en_buf_t.buf1._y:=0]
+System initialized
+	    527797 my_demux.my_demux.invout_f.a : 1
+	    527797 my_demux.my_demux.out1_t_buf_func[1].n1 : 1
+	    527797 my_demux.my_demux.out1_t_buf_func[0].n1 : 1
+	    527813 my_demux.my_demux.out1_t_buf_func[1]._y : 0  [by my_demux.my_demux.out1_t_buf_func[1].n1:=1]
+	    527864 my_demux.my_demux.c_f_c_t_or._y : 0  [by my_demux.my_demux.invout_f.a:=1]
+	    528167 my_demux.my_demux.cond_inv_f : 0  [by my_demux.my_demux.invout_f.a:=1]
+	    528325 my_demux.my_demux.out1_t_buf_func[0]._y : 0  [by my_demux.my_demux.out1_t_buf_func[0].n1:=1]
+	    530248 my_demux.my_demux.out1_t_buf_func[1].y : 1  [by my_demux.my_demux.out1_t_buf_func[1]._y:=0]
+	    530438 my_demux.my_demux.vc.OR2_tf[1]._y : 0  [by my_demux.my_demux.out1_t_buf_func[1].n1:=1]
+	    530440 my_demux.my_demux.vc.OR2_tf[1].y : 1  [by my_demux.my_demux.vc.OR2_tf[1]._y:=0]
+	    532359 my_demux.my_demux.vc.OR2_tf[0]._y : 0  [by my_demux.my_demux.out1_t_buf_func[0].n1:=1]
+	    541366 my_demux.my_demux.out1_t_buf_func[0].y : 1  [by my_demux.my_demux.out1_t_buf_func[0]._y:=0]
+	    552092 my_demux.my_demux.c_buf_d_inv.buf1._y : 1  [by my_demux.my_demux.cond_inv_f:=0]
+	    552095 my_demux.my_demux._c_d_buf[0] : 0  [by my_demux.my_demux.c_buf_d_inv.buf1._y:=1]
+	    554744 my_demux.my_demux._c_v : 1  [by my_demux.my_demux.c_f_c_t_or._y:=0]
+	    593317 my_demux.my_demux.vc.OR2_tf[0].y : 1  [by my_demux.my_demux.vc.OR2_tf[0]._y:=0]
+	    593346 my_demux.my_demux.vc.myctree.C2Els[0]._y : 0  [by my_demux.my_demux.vc.OR2_tf[0].y:=1]
+	    593663 my_demux.my_demux._in_v : 1  [by my_demux.my_demux.vc.myctree.C2Els[0]._y:=0]
+	    593707 my_demux.my_demux.c_el._y : 0  [by my_demux.my_demux._in_v:=1]
+	    593816 my_demux.my_demux.in_v_buf._y : 0  [by my_demux.my_demux._in_v:=1]
+	    595264 my_demux.my_demux.token_buf._y : 0  [by my_demux.my_demux._in_v:=1]
+	    595265 my_demux.token.r : 1  [by my_demux.my_demux.token_buf._y:=0]
+	    595482 my_demux.my_demux.out_or._y : 0  [by my_demux.token.r:=1]
+	    595504 my_demux.my_demux._out_v : 1  [by my_demux.my_demux.out_or._y:=0]
+	    596468 my_demux.my_demux._in_c_v_ : 1  [by my_demux.my_demux.c_el._y:=0]
+	    596469 my_demux.my_demux.inack_ctl._y : 0  [by my_demux.my_demux._in_c_v_:=1]
+	    598050 my_demux.in.a : 1  [by my_demux.my_demux.inack_ctl._y:=0]
+	    607395 my_demux.my_demux._en : 0  [by my_demux.in.a:=1]
+	    607499 my_demux.in.v : 1  [by my_demux.my_demux.in_v_buf._y:=0]
+	    607554 my_demux.my_demux.out1_en_buf_t.buf1._y : 1  [by my_demux.my_demux._en:=0]
+	    608841 my_demux.my_demux._en1_X_t[0] : 0  [by my_demux.my_demux.out1_en_buf_t.buf1._y:=1]
+	    627071 my_demux.my_demux.out1_en_buf_f.buf1._y : 1  [by my_demux.my_demux._en:=0]
+	    629303 my_demux.my_demux._en1_X_f[0] : 0  [by my_demux.my_demux.out1_en_buf_f.buf1._y:=1]
+	    629303 my_demux.token.a : 1
+	    629448 my_demux.my_demux.token_a_out : 0  [by my_demux.token.a:=1]
+	    632280 my_demux.my_demux.token_buf._y : 1  [by my_demux.my_demux.token_a_out:=0]
+	    638634 my_demux.token.r : 0  [by my_demux.my_demux.token_buf._y:=1]
+	    638635 my_demux.my_demux.out_or._y : 1  [by my_demux.token.r:=0]
+	    677919 my_demux.my_demux._out_v : 0  [by my_demux.my_demux.out_or._y:=1]
+	    677919 my_demux.token.a : 0
+	    677919 my_demux.my_demux.out1_t_buf_func[1].n1 : 0
+	    677919 my_demux.my_demux.out1_t_buf_func[0].n1 : 0
+	    677933 my_demux.my_demux.vc.OR2_tf[0]._y : 1  [by my_demux.my_demux.out1_t_buf_func[0].n1:=0]
+	    677940 my_demux.my_demux.vc.OR2_tf[0].y : 0  [by my_demux.my_demux.vc.OR2_tf[0]._y:=1]
+	    678081 my_demux.my_demux.token_a_out : 1  [by my_demux.token.a:=0]
+	    685288 my_demux.my_demux.vc.OR2_tf[1]._y : 1  [by my_demux.my_demux.out1_t_buf_func[1].n1:=0]
+	    685448 my_demux.my_demux.vc.OR2_tf[1].y : 0  [by my_demux.my_demux.vc.OR2_tf[1]._y:=1]
+	    707005 my_demux.my_demux.vc.myctree.C2Els[0]._y : 1  [by my_demux.my_demux.vc.OR2_tf[1].y:=0]
+	    707006 my_demux.my_demux._in_v : 0  [by my_demux.my_demux.vc.myctree.C2Els[0]._y:=1]
+	    707007 my_demux.my_demux.in_v_buf._y : 1  [by my_demux.my_demux._in_v:=0]
+	    707008 my_demux.in.v : 0  [by my_demux.my_demux.in_v_buf._y:=1]
+	    707008 my_demux.my_demux.invout_f.a : 0
+	    707195 my_demux.my_demux.c_f_c_t_or._y : 1  [by my_demux.my_demux.invout_f.a:=0]
+	    707196 my_demux.my_demux._c_v : 0  [by my_demux.my_demux.c_f_c_t_or._y:=1]
+	    709251 my_demux.my_demux.cond_inv_f : 1  [by my_demux.my_demux.invout_f.a:=0]
+	    711378 my_demux.my_demux.c_el._y : 1  [by my_demux.my_demux._c_v:=0]
+	    711379 my_demux.my_demux._in_c_v_ : 0  [by my_demux.my_demux.c_el._y:=1]
+	    712232 my_demux.my_demux.inack_ctl._y : 1  [by my_demux.my_demux._in_c_v_:=0]
+	    712237 my_demux.in.a : 0  [by my_demux.my_demux.inack_ctl._y:=1]
+	    713128 my_demux.my_demux._en : 1  [by my_demux.in.a:=0]
+	    713129 my_demux.my_demux.out1_en_buf_t.buf1._y : 0  [by my_demux.my_demux._en:=1]
+	    713145 my_demux.my_demux.out1_en_buf_f.buf1._y : 0  [by my_demux.my_demux._en:=1]
+	    715702 my_demux.my_demux._en1_X_t[0] : 1  [by my_demux.my_demux.out1_en_buf_t.buf1._y:=0]
+	    721506 my_demux.my_demux._en1_X_f[0] : 1  [by my_demux.my_demux.out1_en_buf_f.buf1._y:=0]
+	    744033 my_demux.my_demux.c_buf_d_inv.buf1._y : 0  [by my_demux.my_demux.cond_inv_f:=1]
+	    744036 my_demux.my_demux._c_d_buf[0] : 1  [by my_demux.my_demux.c_buf_d_inv.buf1._y:=0]

test/unit_tests/demux_td_2/run/test.prs

@@ -0,0 +1,420 @@
+= "GND" "GND"
+= "Vdd" "Vdd"
+= "Reset" "Reset"
+"Reset"->"my_demux._reset_B"-
+~("Reset")->"my_demux._reset_B"+
+= "my_demux._reset_B" "my_demux.my_demux.reset_B"
+= "my_demux.cond.d.d[0].d[0]" "my_demux.cond.d.d[0].f"
+= "my_demux.cond.d.d[0].d[1]" "my_demux.cond.d.d[0].t"
+= "my_demux.cond.d.d[0].d[0]" "my_demux.cond.d.d[0].f"
+= "my_demux.cond.d.d[0].d[1]" "my_demux.cond.d.d[0].t"
+= "my_demux.cond.d.d[0].d[0]" "my_demux.cond.d.d[0].f"
+= "my_demux.cond.d.d[0].d[1]" "my_demux.cond.d.d[0].t"
+= "my_demux.cond.v" "my_demux.my_demux.cond.v"
+= "my_demux.cond.a" "my_demux.my_demux.cond.a"
+= "my_demux.cond.d.d[0].f" "my_demux.my_demux.cond.d.d[0].f"
+= "my_demux.cond.d.d[0].t" "my_demux.my_demux.cond.d.d[0].t"
+= "my_demux.cond.d.d[0].d[0]" "my_demux.my_demux.cond.d.d[0].d[0]"
+= "my_demux.cond.d.d[0].d[1]" "my_demux.my_demux.cond.d.d[0].d[1]"
+= "my_demux.cond.d.d[0].d[0]" "my_demux.cond.d.d[0].f"
+= "my_demux.cond.d.d[0].d[1]" "my_demux.cond.d.d[0].t"
+= "my_demux.out1.d.d[0].d[0]" "my_demux.out1.d.d[0].f"
+= "my_demux.out1.d.d[0].d[1]" "my_demux.out1.d.d[0].t"
+= "my_demux.out1.d.d[1].d[0]" "my_demux.out1.d.d[1].f"
+= "my_demux.out1.d.d[1].d[1]" "my_demux.out1.d.d[1].t"
+= "my_demux.out1.d.d[1].d[0]" "my_demux.out1.d.d[1].f"
+= "my_demux.out1.d.d[1].d[1]" "my_demux.out1.d.d[1].t"
+= "my_demux.out1.d.d[0].d[0]" "my_demux.out1.d.d[0].f"
+= "my_demux.out1.d.d[0].d[1]" "my_demux.out1.d.d[0].t"
+= "my_demux.out1.d.d[1].d[0]" "my_demux.out1.d.d[1].f"
+= "my_demux.out1.d.d[1].d[1]" "my_demux.out1.d.d[1].t"
+= "my_demux.out1.d.d[0].d[0]" "my_demux.out1.d.d[0].f"
+= "my_demux.out1.d.d[0].d[1]" "my_demux.out1.d.d[0].t"
+= "my_demux.out1.v" "my_demux.my_demux.out1.v"
+= "my_demux.out1.a" "my_demux.my_demux.out1.a"
+= "my_demux.out1.d.d[0].f" "my_demux.my_demux.out1.d.d[0].f"
+= "my_demux.out1.d.d[0].t" "my_demux.my_demux.out1.d.d[0].t"
+= "my_demux.out1.d.d[0].d[0]" "my_demux.my_demux.out1.d.d[0].d[0]"
+= "my_demux.out1.d.d[0].d[1]" "my_demux.my_demux.out1.d.d[0].d[1]"
+= "my_demux.out1.d.d[1].f" "my_demux.my_demux.out1.d.d[1].f"
+= "my_demux.out1.d.d[1].t" "my_demux.my_demux.out1.d.d[1].t"
+= "my_demux.out1.d.d[1].d[0]" "my_demux.my_demux.out1.d.d[1].d[0]"
+= "my_demux.out1.d.d[1].d[1]" "my_demux.my_demux.out1.d.d[1].d[1]"
+= "my_demux.out1.d.d[1].d[0]" "my_demux.out1.d.d[1].f"
+= "my_demux.out1.d.d[1].d[1]" "my_demux.out1.d.d[1].t"
+= "my_demux.out1.d.d[0].d[0]" "my_demux.out1.d.d[0].f"
+= "my_demux.out1.d.d[0].d[1]" "my_demux.out1.d.d[0].t"
+~"my_demux.my_demux.token_buf.c1"&~"my_demux.my_demux.token_buf.c2"|~"my_demux.my_demux.token_buf.pr_B"->"my_demux.my_demux.token_buf._y"+
+"my_demux.my_demux.token_buf.c1"&"my_demux.my_demux.token_buf.c2"&"my_demux.my_demux.token_buf.n1"&"my_demux.my_demux.token_buf.n2"&"my_demux.my_demux.token_buf.sr_B"->"my_demux.my_demux.token_buf._y"-
+"my_demux.my_demux.token_buf._y"->"my_demux.my_demux.token_buf.y"-
+~("my_demux.my_demux.token_buf._y")->"my_demux.my_demux.token_buf.y"+
+"my_demux.my_demux.out1_a_B_buf_f.buf1.a"->"my_demux.my_demux.out1_a_B_buf_f.buf1._y"-
+~("my_demux.my_demux.out1_a_B_buf_f.buf1.a")->"my_demux.my_demux.out1_a_B_buf_f.buf1._y"+
+"my_demux.my_demux.out1_a_B_buf_f.buf1._y"->"my_demux.my_demux.out1_a_B_buf_f.buf1.y"-
+~("my_demux.my_demux.out1_a_B_buf_f.buf1._y")->"my_demux.my_demux.out1_a_B_buf_f.buf1.y"+
+= "my_demux.my_demux.out1_a_B_buf_f.supply.vdd" "my_demux.my_demux.out1_a_B_buf_f.buf1.vdd"
+= "my_demux.my_demux.out1_a_B_buf_f.supply.vss" "my_demux.my_demux.out1_a_B_buf_f.buf1.vss"
+= "my_demux.my_demux.out1_a_B_buf_f.out[0]" "my_demux.my_demux.out1_a_B_buf_f.out[1]"
+= "my_demux.my_demux.out1_a_B_buf_f.out[0]" "my_demux.my_demux.out1_a_B_buf_f.buf1.y"
+= "my_demux.my_demux.out1_a_B_buf_f.in" "my_demux.my_demux.out1_a_B_buf_f.buf1.a"
+~"my_demux.my_demux.inack_ctl.c1"&~"my_demux.my_demux.inack_ctl.c2"&~"my_demux.my_demux.inack_ctl.c3"|~"my_demux.my_demux.inack_ctl.pr_B"->"my_demux.my_demux.inack_ctl._y"+
+"my_demux.my_demux.inack_ctl.c1"&"my_demux.my_demux.inack_ctl.c2"&"my_demux.my_demux.inack_ctl.c3"&"my_demux.my_demux.inack_ctl.sr_B"->"my_demux.my_demux.inack_ctl._y"-
+"my_demux.my_demux.inack_ctl._y"->"my_demux.my_demux.inack_ctl.y"-
+~("my_demux.my_demux.inack_ctl._y")->"my_demux.my_demux.inack_ctl.y"+
+"my_demux.my_demux.reset_bufarray.buf1.a"->"my_demux.my_demux.reset_bufarray.buf1._y"-
+~("my_demux.my_demux.reset_bufarray.buf1.a")->"my_demux.my_demux.reset_bufarray.buf1._y"+
+"my_demux.my_demux.reset_bufarray.buf1._y"->"my_demux.my_demux.reset_bufarray.buf1.y"-
+~("my_demux.my_demux.reset_bufarray.buf1._y")->"my_demux.my_demux.reset_bufarray.buf1.y"+
+= "my_demux.my_demux.reset_bufarray.supply.vdd" "my_demux.my_demux.reset_bufarray.buf1.vdd"
+= "my_demux.my_demux.reset_bufarray.supply.vss" "my_demux.my_demux.reset_bufarray.buf1.vss"
+= "my_demux.my_demux.reset_bufarray.out[0]" "my_demux.my_demux.reset_bufarray.out[1]"
+= "my_demux.my_demux.reset_bufarray.out[0]" "my_demux.my_demux.reset_bufarray.buf1.y"
+= "my_demux.my_demux.reset_bufarray.in" "my_demux.my_demux.reset_bufarray.buf1.a"
+= "my_demux.my_demux._c_v" "my_demux.my_demux.c_el.c1"
+= "my_demux.my_demux._c_v" "my_demux.my_demux.c_f_c_t_or.y"
+"my_demux.my_demux.reset_buf_token.a"->"my_demux.my_demux.reset_buf_token._y"-
+~("my_demux.my_demux.reset_buf_token.a")->"my_demux.my_demux.reset_buf_token._y"+
+"my_demux.my_demux.reset_buf_token._y"->"my_demux.my_demux.reset_buf_token.y"-
+~("my_demux.my_demux.reset_buf_token._y")->"my_demux.my_demux.reset_buf_token.y"+
+= "my_demux.my_demux._c_d_buf[0]" "my_demux.my_demux.c_buf_d_inv.out[0]"
+= "my_demux.my_demux._c_d_buf[1]" "my_demux.my_demux.c_buf_d_inv.out[1]"
+= "my_demux.my_demux._c_d_buf[0]" "my_demux.my_demux.out1_t_buf_func[1].n2"
+= "my_demux.my_demux._c_d_buf[0]" "my_demux.my_demux.out1_f_buf_func[1].n2"
+= "my_demux.my_demux._c_d_buf[0]" "my_demux.my_demux.out1_t_buf_func[0].n2"
+= "my_demux.my_demux._c_d_buf[0]" "my_demux.my_demux.out1_f_buf_func[0].n2"
+= "my_demux.my_demux._c_d_buf[0]" "my_demux.my_demux._c_d_buf[1]"
+"my_demux.my_demux.invout_t.a"->"my_demux.my_demux.invout_t.y"-
+~("my_demux.my_demux.invout_t.a")->"my_demux.my_demux.invout_t.y"+
+= "my_demux.my_demux._en" "my_demux.my_demux.token_buf.c1"
+= "my_demux.my_demux._en" "my_demux.my_demux.out1_en_buf_f.in"
+= "my_demux.my_demux._en" "my_demux.my_demux.out1_en_buf_t.in"
+= "my_demux.my_demux._en" "my_demux.my_demux.en_ctl.y"
+= "my_demux.my_demux._en" "my_demux.my_demux.inack_ctl.c1"
+"my_demux.my_demux.c_buf_tk_inv.a"->"my_demux.my_demux.c_buf_tk_inv._y"-
+~("my_demux.my_demux.c_buf_tk_inv.a")->"my_demux.my_demux.c_buf_tk_inv._y"+
+"my_demux.my_demux.c_buf_tk_inv._y"->"my_demux.my_demux.c_buf_tk_inv.y"-
+~("my_demux.my_demux.c_buf_tk_inv._y")->"my_demux.my_demux.c_buf_tk_inv.y"+
+= "my_demux.my_demux.token_a_out" "my_demux.my_demux.token_buf.c2"
+= "my_demux.my_demux.token_a_out" "my_demux.my_demux.outt_a_inv.y"
+= "my_demux.my_demux._out1_a_B" "my_demux.my_demux.out1_a_B_buf_t.in"
+= "my_demux.my_demux._out1_a_B" "my_demux.my_demux.out1_a_B_buf_f.in"
+= "my_demux.my_demux._out1_a_B" "my_demux.my_demux.out1_a_inv.y"
+= "my_demux.my_demux.in.d.d[0].d[0]" "my_demux.my_demux.in.d.d[0].f"
+= "my_demux.my_demux.in.d.d[0].d[1]" "my_demux.my_demux.in.d.d[0].t"
+= "my_demux.my_demux.in.d.d[1].d[0]" "my_demux.my_demux.in.d.d[1].f"
+= "my_demux.my_demux.in.d.d[1].d[1]" "my_demux.my_demux.in.d.d[1].t"
+= "my_demux.my_demux.in.d.d[1].d[0]" "my_demux.my_demux.in.d.d[1].f"
+= "my_demux.my_demux.in.d.d[1].d[1]" "my_demux.my_demux.in.d.d[1].t"
+= "my_demux.my_demux.in.d.d[0].d[0]" "my_demux.my_demux.in.d.d[0].f"
+= "my_demux.my_demux.in.d.d[0].d[1]" "my_demux.my_demux.in.d.d[0].t"
+= "my_demux.my_demux.in.d.d[1].d[0]" "my_demux.my_demux.in.d.d[1].f"
+= "my_demux.my_demux.in.d.d[1].d[1]" "my_demux.my_demux.in.d.d[1].t"
+= "my_demux.my_demux.in.d.d[0].d[0]" "my_demux.my_demux.in.d.d[0].f"
+= "my_demux.my_demux.in.d.d[0].d[1]" "my_demux.my_demux.in.d.d[0].t"
+= "my_demux.my_demux.in.d.d[0].f" "my_demux.my_demux.vc.in.d[0].f"
+= "my_demux.my_demux.in.d.d[0].t" "my_demux.my_demux.vc.in.d[0].t"
+= "my_demux.my_demux.in.d.d[0].d[0]" "my_demux.my_demux.vc.in.d[0].d[0]"
+= "my_demux.my_demux.in.d.d[0].d[1]" "my_demux.my_demux.vc.in.d[0].d[1]"
+= "my_demux.my_demux.in.d.d[1].f" "my_demux.my_demux.vc.in.d[1].f"
+= "my_demux.my_demux.in.d.d[1].t" "my_demux.my_demux.vc.in.d[1].t"
+= "my_demux.my_demux.in.d.d[1].d[0]" "my_demux.my_demux.vc.in.d[1].d[0]"
+= "my_demux.my_demux.in.d.d[1].d[1]" "my_demux.my_demux.vc.in.d[1].d[1]"
+= "my_demux.my_demux.in.a" "my_demux.my_demux.en_ctl.c1"
+= "my_demux.my_demux.in.a" "my_demux.my_demux.inack_ctl.y"
+= "my_demux.my_demux.in.v" "my_demux.my_demux.in_v_buf.y"
+= "my_demux.my_demux.in.d.d[1].d[0]" "my_demux.my_demux.out1_f_buf_func[1].n1"
+= "my_demux.my_demux.in.d.d[1].d[0]" "my_demux.my_demux.in.d.d[1].f"
+= "my_demux.my_demux.in.d.d[1].d[1]" "my_demux.my_demux.out1_t_buf_func[1].n1"
+= "my_demux.my_demux.in.d.d[1].d[1]" "my_demux.my_demux.in.d.d[1].t"
+= "my_demux.my_demux.in.d.d[0].d[0]" "my_demux.my_demux.out1_f_buf_func[0].n1"
+= "my_demux.my_demux.in.d.d[0].d[0]" "my_demux.my_demux.in.d.d[0].f"
+= "my_demux.my_demux.in.d.d[0].d[1]" "my_demux.my_demux.out1_t_buf_func[0].n1"
+= "my_demux.my_demux.in.d.d[0].d[1]" "my_demux.my_demux.in.d.d[0].t"
+"my_demux.my_demux.out1_en_buf_t.buf1.a"->"my_demux.my_demux.out1_en_buf_t.buf1._y"-
+~("my_demux.my_demux.out1_en_buf_t.buf1.a")->"my_demux.my_demux.out1_en_buf_t.buf1._y"+
+"my_demux.my_demux.out1_en_buf_t.buf1._y"->"my_demux.my_demux.out1_en_buf_t.buf1.y"-
+~("my_demux.my_demux.out1_en_buf_t.buf1._y")->"my_demux.my_demux.out1_en_buf_t.buf1.y"+
+= "my_demux.my_demux.out1_en_buf_t.supply.vdd" "my_demux.my_demux.out1_en_buf_t.buf1.vdd"
+= "my_demux.my_demux.out1_en_buf_t.supply.vss" "my_demux.my_demux.out1_en_buf_t.buf1.vss"
+= "my_demux.my_demux.out1_en_buf_t.out[0]" "my_demux.my_demux.out1_en_buf_t.out[1]"
+= "my_demux.my_demux.out1_en_buf_t.out[0]" "my_demux.my_demux.out1_en_buf_t.buf1.y"
+= "my_demux.my_demux.out1_en_buf_t.in" "my_demux.my_demux.out1_en_buf_t.buf1.a"
+= "my_demux.my_demux._out1_a_BX_t[0]" "my_demux.my_demux.out1_a_B_buf_f.out[0]"
+= "my_demux.my_demux._out1_a_BX_t[1]" "my_demux.my_demux.out1_a_B_buf_f.out[1]"
+= "my_demux.my_demux._out1_a_BX_t[0]" "my_demux.my_demux.out1_t_buf_func[1].c2"
+= "my_demux.my_demux._out1_a_BX_t[0]" "my_demux.my_demux.out1_t_buf_func[0].c2"
+= "my_demux.my_demux._out1_a_BX_t[0]" "my_demux.my_demux._out1_a_BX_t[1]"
+"my_demux.my_demux.out_or.a"|"my_demux.my_demux.out_or.b"->"my_demux.my_demux.out_or._y"-
+~("my_demux.my_demux.out_or.a"|"my_demux.my_demux.out_or.b")->"my_demux.my_demux.out_or._y"+
+"my_demux.my_demux.out_or._y"->"my_demux.my_demux.out_or.y"-
+~("my_demux.my_demux.out_or._y")->"my_demux.my_demux.out_or.y"+
+= "my_demux.my_demux._in_c_v_" "my_demux.my_demux.c_el.y"
+= "my_demux.my_demux._in_c_v_" "my_demux.my_demux.inack_ctl.c2"
+"my_demux.my_demux.reset_buf.a"->"my_demux.my_demux.reset_buf._y"-
+~("my_demux.my_demux.reset_buf.a")->"my_demux.my_demux.reset_buf._y"+
+"my_demux.my_demux.reset_buf._y"->"my_demux.my_demux.reset_buf.y"-
+~("my_demux.my_demux.reset_buf._y")->"my_demux.my_demux.reset_buf.y"+
+= "my_demux.my_demux._reset_BX" "my_demux.my_demux.reset_bufarray.in"
+= "my_demux.my_demux._reset_BX" "my_demux.my_demux.reset_buf_token.a"
+= "my_demux.my_demux._reset_BX" "my_demux.my_demux.reset_buf.y"
+= "my_demux.my_demux._reset_BX" "my_demux.my_demux.inack_ctl.sr_B"
+= "my_demux.my_demux._reset_BX" "my_demux.my_demux.inack_ctl.pr_B"
+= "my_demux.my_demux.reset_B" "my_demux.my_demux.reset_buf.a"
+= "my_demux.my_demux._en1_X_f[0]" "my_demux.my_demux.out1_en_buf_f.out[0]"
+= "my_demux.my_demux._en1_X_f[1]" "my_demux.my_demux.out1_en_buf_f.out[1]"
+= "my_demux.my_demux._en1_X_f[0]" "my_demux.my_demux.out1_f_buf_func[1].c1"
+= "my_demux.my_demux._en1_X_f[0]" "my_demux.my_demux.out1_f_buf_func[0].c1"
+= "my_demux.my_demux._en1_X_f[0]" "my_demux.my_demux._en1_X_f[1]"
+= "my_demux.my_demux._out_v" "my_demux.my_demux.en_ctl.p1"
+= "my_demux.my_demux._out_v" "my_demux.my_demux.inack_ctl.c3"
+= "my_demux.my_demux._out_v" "my_demux.my_demux.out_or.y"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.reset_bufarray.out[0]"
+= "my_demux.my_demux._reset_BXX[1]" "my_demux.my_demux.reset_bufarray.out[1]"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_f_buf_func[1].sr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_f_buf_func[1].pr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_t_buf_func[1].sr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_t_buf_func[1].pr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_f_buf_func[0].sr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_f_buf_func[0].pr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_t_buf_func[0].sr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_t_buf_func[0].pr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux._reset_BXX[1]"
+"my_demux.my_demux.out1_en_buf_f.buf1.a"->"my_demux.my_demux.out1_en_buf_f.buf1._y"-
+~("my_demux.my_demux.out1_en_buf_f.buf1.a")->"my_demux.my_demux.out1_en_buf_f.buf1._y"+
+"my_demux.my_demux.out1_en_buf_f.buf1._y"->"my_demux.my_demux.out1_en_buf_f.buf1.y"-
+~("my_demux.my_demux.out1_en_buf_f.buf1._y")->"my_demux.my_demux.out1_en_buf_f.buf1.y"+
+= "my_demux.my_demux.out1_en_buf_f.supply.vdd" "my_demux.my_demux.out1_en_buf_f.buf1.vdd"
+= "my_demux.my_demux.out1_en_buf_f.supply.vss" "my_demux.my_demux.out1_en_buf_f.buf1.vss"
+= "my_demux.my_demux.out1_en_buf_f.out[0]" "my_demux.my_demux.out1_en_buf_f.out[1]"
+= "my_demux.my_demux.out1_en_buf_f.out[0]" "my_demux.my_demux.out1_en_buf_f.buf1.y"
+= "my_demux.my_demux.out1_en_buf_f.in" "my_demux.my_demux.out1_en_buf_f.buf1.a"
+= "my_demux.my_demux._out1_a_BX_f[0]" "my_demux.my_demux.out1_a_B_buf_t.out[0]"
+= "my_demux.my_demux._out1_a_BX_f[1]" "my_demux.my_demux.out1_a_B_buf_t.out[1]"
+= "my_demux.my_demux._out1_a_BX_f[0]" "my_demux.my_demux.out1_f_buf_func[1].c2"
+= "my_demux.my_demux._out1_a_BX_f[0]" "my_demux.my_demux.out1_f_buf_func[0].c2"
+= "my_demux.my_demux._out1_a_BX_f[0]" "my_demux.my_demux._out1_a_BX_f[1]"
+~"my_demux.my_demux.c_el.c1"&~"my_demux.my_demux.c_el.c2"->"my_demux.my_demux.c_el._y"+
+"my_demux.my_demux.c_el.c1"&"my_demux.my_demux.c_el.c2"->"my_demux.my_demux.c_el._y"-
+"my_demux.my_demux.c_el._y"->"my_demux.my_demux.c_el.y"-
+~("my_demux.my_demux.c_el._y")->"my_demux.my_demux.c_el.y"+
+= "my_demux.my_demux._en1_X_t[0]" "my_demux.my_demux.out1_en_buf_t.out[0]"
+= "my_demux.my_demux._en1_X_t[1]" "my_demux.my_demux.out1_en_buf_t.out[1]"
+= "my_demux.my_demux._en1_X_t[0]" "my_demux.my_demux.out1_t_buf_func[1].c1"
+= "my_demux.my_demux._en1_X_t[0]" "my_demux.my_demux.out1_t_buf_func[0].c1"
+= "my_demux.my_demux._en1_X_t[0]" "my_demux.my_demux._en1_X_t[1]"
+"my_demux.my_demux.in_v_buf.a"->"my_demux.my_demux.in_v_buf._y"-
+~("my_demux.my_demux.in_v_buf.a")->"my_demux.my_demux.in_v_buf._y"+
+"my_demux.my_demux.in_v_buf._y"->"my_demux.my_demux.in_v_buf.y"-
+~("my_demux.my_demux.in_v_buf._y")->"my_demux.my_demux.in_v_buf.y"+
+= "my_demux.my_demux.out1.d.d[0].d[0]" "my_demux.my_demux.out1.d.d[0].f"
+= "my_demux.my_demux.out1.d.d[0].d[1]" "my_demux.my_demux.out1.d.d[0].t"
+= "my_demux.my_demux.out1.d.d[1].d[0]" "my_demux.my_demux.out1.d.d[1].f"
+= "my_demux.my_demux.out1.d.d[1].d[1]" "my_demux.my_demux.out1.d.d[1].t"
+= "my_demux.my_demux.out1.d.d[1].d[0]" "my_demux.my_demux.out1.d.d[1].f"
+= "my_demux.my_demux.out1.d.d[1].d[1]" "my_demux.my_demux.out1.d.d[1].t"
+= "my_demux.my_demux.out1.d.d[0].d[0]" "my_demux.my_demux.out1.d.d[0].f"
+= "my_demux.my_demux.out1.d.d[0].d[1]" "my_demux.my_demux.out1.d.d[0].t"
+= "my_demux.my_demux.out1.d.d[1].d[0]" "my_demux.my_demux.out1.d.d[1].f"
+= "my_demux.my_demux.out1.d.d[1].d[1]" "my_demux.my_demux.out1.d.d[1].t"
+= "my_demux.my_demux.out1.d.d[0].d[0]" "my_demux.my_demux.out1.d.d[0].f"
+= "my_demux.my_demux.out1.d.d[0].d[1]" "my_demux.my_demux.out1.d.d[0].t"
+= "my_demux.my_demux.out1.a" "my_demux.my_demux.out1_a_inv.a"
+= "my_demux.my_demux.out1.v" "my_demux.my_demux.out_or.a"
+= "my_demux.my_demux.out1.d.d[1].d[0]" "my_demux.my_demux.out1_f_buf_func[1].y"
+= "my_demux.my_demux.out1.d.d[1].d[0]" "my_demux.my_demux.out1.d.d[1].f"
+= "my_demux.my_demux.out1.d.d[1].d[1]" "my_demux.my_demux.out1_t_buf_func[1].y"
+= "my_demux.my_demux.out1.d.d[1].d[1]" "my_demux.my_demux.out1.d.d[1].t"
+= "my_demux.my_demux.out1.d.d[0].d[0]" "my_demux.my_demux.out1_f_buf_func[0].y"
+= "my_demux.my_demux.out1.d.d[0].d[0]" "my_demux.my_demux.out1.d.d[0].f"
+= "my_demux.my_demux.out1.d.d[0].d[1]" "my_demux.my_demux.out1_t_buf_func[0].y"
+= "my_demux.my_demux.out1.d.d[0].d[1]" "my_demux.my_demux.out1.d.d[0].t"
+"my_demux.my_demux.c_f_c_t_or.a"|"my_demux.my_demux.c_f_c_t_or.b"->"my_demux.my_demux.c_f_c_t_or._y"-
+~("my_demux.my_demux.c_f_c_t_or.a"|"my_demux.my_demux.c_f_c_t_or.b")->"my_demux.my_demux.c_f_c_t_or._y"+
+"my_demux.my_demux.c_f_c_t_or._y"->"my_demux.my_demux.c_f_c_t_or.y"-
+~("my_demux.my_demux.c_f_c_t_or._y")->"my_demux.my_demux.c_f_c_t_or.y"+
+"my_demux.my_demux.out1_a_inv.a"->"my_demux.my_demux.out1_a_inv.y"-
+~("my_demux.my_demux.out1_a_inv.a")->"my_demux.my_demux.out1_a_inv.y"+
+= "my_demux.my_demux.token.d.d[0]" "my_demux.my_demux.token.r"
+= "my_demux.my_demux.token.a" "my_demux.my_demux.outt_a_inv.a"
+= "my_demux.my_demux.token.d.d[0]" "my_demux.my_demux.token_buf.y"
+= "my_demux.my_demux.token.d.d[0]" "my_demux.my_demux.out_or.b"
+= "my_demux.my_demux.token.d.d[0]" "my_demux.my_demux.token.r"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.out1_en_buf_f.supply.vss"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.out1_en_buf_f.supply.vdd"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.out1_en_buf_t.supply.vss"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.out1_en_buf_t.supply.vdd"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.vc.supply.vss"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.vc.supply.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.token_buf.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.out1_t_buf_func[1].vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.out1_f_buf_func[1].vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.out1_t_buf_func[0].vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.out1_f_buf_func[0].vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.in_v_buf.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.c_el.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.invout_f.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.invout_t.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.c_f_c_t_or.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.reset_buf_token.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.reset_buf.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.en_ctl.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.inack_ctl.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.out_or.vdd"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.token_buf.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.out1_t_buf_func[1].vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.out1_f_buf_func[1].vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.out1_t_buf_func[0].vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.out1_f_buf_func[0].vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.in_v_buf.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.c_el.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.invout_f.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.invout_t.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.c_f_c_t_or.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.reset_buf_token.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.reset_buf.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.en_ctl.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.inack_ctl.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.out_or.vss"
+"my_demux.my_demux.invout_f.a"->"my_demux.my_demux.invout_f.y"-
+~("my_demux.my_demux.invout_f.a")->"my_demux.my_demux.invout_f.y"+
+~"my_demux.my_demux.vc.myctree.C2Els[0].c1"&~"my_demux.my_demux.vc.myctree.C2Els[0].c2"->"my_demux.my_demux.vc.myctree.C2Els[0]._y"+
+"my_demux.my_demux.vc.myctree.C2Els[0].c1"&"my_demux.my_demux.vc.myctree.C2Els[0].c2"->"my_demux.my_demux.vc.myctree.C2Els[0]._y"-
+"my_demux.my_demux.vc.myctree.C2Els[0]._y"->"my_demux.my_demux.vc.myctree.C2Els[0].y"-
+~("my_demux.my_demux.vc.myctree.C2Els[0]._y")->"my_demux.my_demux.vc.myctree.C2Els[0].y"+
+= "my_demux.my_demux.vc.myctree.supply.vdd" "my_demux.my_demux.vc.myctree.C2Els[0].vdd"
+= "my_demux.my_demux.vc.myctree.supply.vss" "my_demux.my_demux.vc.myctree.C2Els[0].vss"
+= "my_demux.my_demux.vc.myctree.in[0]" "my_demux.my_demux.vc.myctree.C2Els[0].c1"
+= "my_demux.my_demux.vc.myctree.in[0]" "my_demux.my_demux.vc.myctree.tmp[0]"
+= "my_demux.my_demux.vc.myctree.in[1]" "my_demux.my_demux.vc.myctree.C2Els[0].c2"
+= "my_demux.my_demux.vc.myctree.in[1]" "my_demux.my_demux.vc.myctree.tmp[1]"
+= "my_demux.my_demux.vc.myctree.out" "my_demux.my_demux.vc.myctree.C2Els[0].y"
+= "my_demux.my_demux.vc.myctree.out" "my_demux.my_demux.vc.myctree.tmp[2]"
+"my_demux.my_demux.vc.OR2_tf[0].a"|"my_demux.my_demux.vc.OR2_tf[0].b"->"my_demux.my_demux.vc.OR2_tf[0]._y"-
+~("my_demux.my_demux.vc.OR2_tf[0].a"|"my_demux.my_demux.vc.OR2_tf[0].b")->"my_demux.my_demux.vc.OR2_tf[0]._y"+
+"my_demux.my_demux.vc.OR2_tf[0]._y"->"my_demux.my_demux.vc.OR2_tf[0].y"-
+~("my_demux.my_demux.vc.OR2_tf[0]._y")->"my_demux.my_demux.vc.OR2_tf[0].y"+
+"my_demux.my_demux.vc.OR2_tf[1].a"|"my_demux.my_demux.vc.OR2_tf[1].b"->"my_demux.my_demux.vc.OR2_tf[1]._y"-
+~("my_demux.my_demux.vc.OR2_tf[1].a"|"my_demux.my_demux.vc.OR2_tf[1].b")->"my_demux.my_demux.vc.OR2_tf[1]._y"+
+"my_demux.my_demux.vc.OR2_tf[1]._y"->"my_demux.my_demux.vc.OR2_tf[1].y"-
+~("my_demux.my_demux.vc.OR2_tf[1]._y")->"my_demux.my_demux.vc.OR2_tf[1].y"+
+= "my_demux.my_demux.vc.OR2_tf[1].y" "my_demux.my_demux.vc.myctree.in[1]"
+= "my_demux.my_demux.vc.OR2_tf[0].y" "my_demux.my_demux.vc.myctree.in[0]"
+= "my_demux.my_demux.vc.supply.vss" "my_demux.my_demux.vc.myctree.supply.vss"
+= "my_demux.my_demux.vc.supply.vdd" "my_demux.my_demux.vc.myctree.supply.vdd"
+= "my_demux.my_demux.vc.supply.vdd" "my_demux.my_demux.vc.OR2_tf[1].vdd"
+= "my_demux.my_demux.vc.supply.vdd" "my_demux.my_demux.vc.OR2_tf[0].vdd"
+= "my_demux.my_demux.vc.supply.vss" "my_demux.my_demux.vc.OR2_tf[1].vss"
+= "my_demux.my_demux.vc.supply.vss" "my_demux.my_demux.vc.OR2_tf[0].vss"
+= "my_demux.my_demux.vc.out" "my_demux.my_demux.vc.myctree.out"
+= "my_demux.my_demux.vc.in.d[0].d[0]" "my_demux.my_demux.vc.in.d[0].f"
+= "my_demux.my_demux.vc.in.d[0].d[1]" "my_demux.my_demux.vc.in.d[0].t"
+= "my_demux.my_demux.vc.in.d[1].d[0]" "my_demux.my_demux.vc.in.d[1].f"
+= "my_demux.my_demux.vc.in.d[1].d[1]" "my_demux.my_demux.vc.in.d[1].t"
+= "my_demux.my_demux.vc.in.d[1].d[0]" "my_demux.my_demux.vc.in.d[1].f"
+= "my_demux.my_demux.vc.in.d[1].d[1]" "my_demux.my_demux.vc.in.d[1].t"
+= "my_demux.my_demux.vc.in.d[0].d[0]" "my_demux.my_demux.vc.in.d[0].f"
+= "my_demux.my_demux.vc.in.d[0].d[1]" "my_demux.my_demux.vc.in.d[0].t"
+= "my_demux.my_demux.vc.in.d[1].d[0]" "my_demux.my_demux.vc.OR2_tf[1].b"
+= "my_demux.my_demux.vc.in.d[1].d[0]" "my_demux.my_demux.vc.in.d[1].f"
+= "my_demux.my_demux.vc.in.d[1].d[1]" "my_demux.my_demux.vc.OR2_tf[1].a"
+= "my_demux.my_demux.vc.in.d[1].d[1]" "my_demux.my_demux.vc.in.d[1].t"
+= "my_demux.my_demux.vc.in.d[0].d[0]" "my_demux.my_demux.vc.OR2_tf[0].b"
+= "my_demux.my_demux.vc.in.d[0].d[0]" "my_demux.my_demux.vc.in.d[0].f"
+= "my_demux.my_demux.vc.in.d[0].d[1]" "my_demux.my_demux.vc.OR2_tf[0].a"
+= "my_demux.my_demux.vc.in.d[0].d[1]" "my_demux.my_demux.vc.in.d[0].t"
+"my_demux.my_demux.out1_a_B_buf_t.buf1.a"->"my_demux.my_demux.out1_a_B_buf_t.buf1._y"-
+~("my_demux.my_demux.out1_a_B_buf_t.buf1.a")->"my_demux.my_demux.out1_a_B_buf_t.buf1._y"+
+"my_demux.my_demux.out1_a_B_buf_t.buf1._y"->"my_demux.my_demux.out1_a_B_buf_t.buf1.y"-
+~("my_demux.my_demux.out1_a_B_buf_t.buf1._y")->"my_demux.my_demux.out1_a_B_buf_t.buf1.y"+
+= "my_demux.my_demux.out1_a_B_buf_t.supply.vdd" "my_demux.my_demux.out1_a_B_buf_t.buf1.vdd"
+= "my_demux.my_demux.out1_a_B_buf_t.supply.vss" "my_demux.my_demux.out1_a_B_buf_t.buf1.vss"
+= "my_demux.my_demux.out1_a_B_buf_t.out[0]" "my_demux.my_demux.out1_a_B_buf_t.out[1]"
+= "my_demux.my_demux.out1_a_B_buf_t.out[0]" "my_demux.my_demux.out1_a_B_buf_t.buf1.y"
+= "my_demux.my_demux.out1_a_B_buf_t.in" "my_demux.my_demux.out1_a_B_buf_t.buf1.a"
+~"my_demux.my_demux.en_ctl.p1"&~"my_demux.my_demux.en_ctl.c1"->"my_demux.my_demux.en_ctl.y"+
+"my_demux.my_demux.en_ctl.c1"->"my_demux.my_demux.en_ctl.y"-
+= "my_demux.my_demux._reset_BXt" "my_demux.my_demux.token_buf.sr_B"
+= "my_demux.my_demux._reset_BXt" "my_demux.my_demux.token_buf.pr_B"
+= "my_demux.my_demux._reset_BXt" "my_demux.my_demux.reset_buf_token.y"
+= "my_demux.my_demux.cond.d.d[0].d[0]" "my_demux.my_demux.cond.d.d[0].f"
+= "my_demux.my_demux.cond.d.d[0].d[1]" "my_demux.my_demux.cond.d.d[0].t"
+= "my_demux.my_demux.cond.d.d[0].d[0]" "my_demux.my_demux.cond.d.d[0].f"
+= "my_demux.my_demux.cond.d.d[0].d[1]" "my_demux.my_demux.cond.d.d[0].t"
+= "my_demux.my_demux.cond.d.d[0].d[0]" "my_demux.my_demux.cond.d.d[0].f"
+= "my_demux.my_demux.cond.d.d[0].d[1]" "my_demux.my_demux.cond.d.d[0].t"
+= "my_demux.my_demux.cond.d.d[0].d[0]" "my_demux.my_demux.invout_f.a"
+= "my_demux.my_demux.cond.d.d[0].d[0]" "my_demux.my_demux.c_f_c_t_or.b"
+= "my_demux.my_demux.cond.d.d[0].d[0]" "my_demux.my_demux.cond.d.d[0].f"
+= "my_demux.my_demux.cond.d.d[0].d[1]" "my_demux.my_demux.invout_t.a"
+= "my_demux.my_demux.cond.d.d[0].d[1]" "my_demux.my_demux.c_f_c_t_or.a"
+= "my_demux.my_demux.cond.d.d[0].d[1]" "my_demux.my_demux.cond.d.d[0].t"
+~"my_demux.my_demux.out1_f_buf_func[0].c1"&~"my_demux.my_demux.out1_f_buf_func[0].c2"|~"my_demux.my_demux.out1_f_buf_func[0].pr_B"->"my_demux.my_demux.out1_f_buf_func[0]._y"+
+"my_demux.my_demux.out1_f_buf_func[0].c1"&"my_demux.my_demux.out1_f_buf_func[0].c2"&"my_demux.my_demux.out1_f_buf_func[0].n1"&"my_demux.my_demux.out1_f_buf_func[0].n2"&"my_demux.my_demux.out1_f_buf_func[0].sr_B"->"my_demux.my_demux.out1_f_buf_func[0]._y"-
+"my_demux.my_demux.out1_f_buf_func[0]._y"->"my_demux.my_demux.out1_f_buf_func[0].y"-
+~("my_demux.my_demux.out1_f_buf_func[0]._y")->"my_demux.my_demux.out1_f_buf_func[0].y"+
+~"my_demux.my_demux.out1_f_buf_func[1].c1"&~"my_demux.my_demux.out1_f_buf_func[1].c2"|~"my_demux.my_demux.out1_f_buf_func[1].pr_B"->"my_demux.my_demux.out1_f_buf_func[1]._y"+
+"my_demux.my_demux.out1_f_buf_func[1].c1"&"my_demux.my_demux.out1_f_buf_func[1].c2"&"my_demux.my_demux.out1_f_buf_func[1].n1"&"my_demux.my_demux.out1_f_buf_func[1].n2"&"my_demux.my_demux.out1_f_buf_func[1].sr_B"->"my_demux.my_demux.out1_f_buf_func[1]._y"-
+"my_demux.my_demux.out1_f_buf_func[1]._y"->"my_demux.my_demux.out1_f_buf_func[1].y"-
+~("my_demux.my_demux.out1_f_buf_func[1]._y")->"my_demux.my_demux.out1_f_buf_func[1].y"+
+= "my_demux.my_demux._in_v" "my_demux.my_demux.token_buf.n2"
+= "my_demux.my_demux._in_v" "my_demux.my_demux.in_v_buf.a"
+= "my_demux.my_demux._in_v" "my_demux.my_demux.c_el.c2"
+= "my_demux.my_demux._in_v" "my_demux.my_demux.vc.out"
+~"my_demux.my_demux.out1_t_buf_func[0].c1"&~"my_demux.my_demux.out1_t_buf_func[0].c2"|~"my_demux.my_demux.out1_t_buf_func[0].pr_B"->"my_demux.my_demux.out1_t_buf_func[0]._y"+
+"my_demux.my_demux.out1_t_buf_func[0].c1"&"my_demux.my_demux.out1_t_buf_func[0].c2"&"my_demux.my_demux.out1_t_buf_func[0].n1"&"my_demux.my_demux.out1_t_buf_func[0].n2"&"my_demux.my_demux.out1_t_buf_func[0].sr_B"->"my_demux.my_demux.out1_t_buf_func[0]._y"-
+"my_demux.my_demux.out1_t_buf_func[0]._y"->"my_demux.my_demux.out1_t_buf_func[0].y"-
+~("my_demux.my_demux.out1_t_buf_func[0]._y")->"my_demux.my_demux.out1_t_buf_func[0].y"+
+~"my_demux.my_demux.out1_t_buf_func[1].c1"&~"my_demux.my_demux.out1_t_buf_func[1].c2"|~"my_demux.my_demux.out1_t_buf_func[1].pr_B"->"my_demux.my_demux.out1_t_buf_func[1]._y"+
+"my_demux.my_demux.out1_t_buf_func[1].c1"&"my_demux.my_demux.out1_t_buf_func[1].c2"&"my_demux.my_demux.out1_t_buf_func[1].n1"&"my_demux.my_demux.out1_t_buf_func[1].n2"&"my_demux.my_demux.out1_t_buf_func[1].sr_B"->"my_demux.my_demux.out1_t_buf_func[1]._y"-
+"my_demux.my_demux.out1_t_buf_func[1]._y"->"my_demux.my_demux.out1_t_buf_func[1].y"-
+~("my_demux.my_demux.out1_t_buf_func[1]._y")->"my_demux.my_demux.out1_t_buf_func[1].y"+
+= "my_demux.my_demux.cond_inv_f" "my_demux.my_demux.c_buf_d_inv.in"
+= "my_demux.my_demux.cond_inv_f" "my_demux.my_demux.invout_f.y"
+"my_demux.my_demux.outt_a_inv.a"->"my_demux.my_demux.outt_a_inv.y"-
+~("my_demux.my_demux.outt_a_inv.a")->"my_demux.my_demux.outt_a_inv.y"+
+= "my_demux.my_demux.cond_inv_t" "my_demux.my_demux.c_buf_tk_inv.a"
+= "my_demux.my_demux.cond_inv_t" "my_demux.my_demux.invout_t.y"
+"my_demux.my_demux.c_buf_d_inv.buf1.a"->"my_demux.my_demux.c_buf_d_inv.buf1._y"-
+~("my_demux.my_demux.c_buf_d_inv.buf1.a")->"my_demux.my_demux.c_buf_d_inv.buf1._y"+
+"my_demux.my_demux.c_buf_d_inv.buf1._y"->"my_demux.my_demux.c_buf_d_inv.buf1.y"-
+~("my_demux.my_demux.c_buf_d_inv.buf1._y")->"my_demux.my_demux.c_buf_d_inv.buf1.y"+
+= "my_demux.my_demux.c_buf_d_inv.supply.vdd" "my_demux.my_demux.c_buf_d_inv.buf1.vdd"
+= "my_demux.my_demux.c_buf_d_inv.supply.vss" "my_demux.my_demux.c_buf_d_inv.buf1.vss"
+= "my_demux.my_demux.c_buf_d_inv.out[0]" "my_demux.my_demux.c_buf_d_inv.out[1]"
+= "my_demux.my_demux.c_buf_d_inv.out[0]" "my_demux.my_demux.c_buf_d_inv.buf1.y"
+= "my_demux.my_demux.c_buf_d_inv.in" "my_demux.my_demux.c_buf_d_inv.buf1.a"
+= "my_demux.my_demux._c_tk_buf" "my_demux.my_demux.token_buf.n1"
+= "my_demux.my_demux._c_tk_buf" "my_demux.my_demux.c_buf_tk_inv.y"
+= "Vdd" "my_demux.my_demux.supply.vdd"
+= "GND" "my_demux.my_demux.supply.vss"
+= "my_demux.token.d.d[0]" "my_demux.token.r"
+= "my_demux.token.r" "my_demux.my_demux.token.r"
+= "my_demux.token.a" "my_demux.my_demux.token.a"
+= "my_demux.token.d.d[0]" "my_demux.my_demux.token.d.d[0]"
+= "my_demux.token.d.d[0]" "my_demux.token.r"
+= "my_demux.in.d.d[0].d[0]" "my_demux.in.d.d[0].f"
+= "my_demux.in.d.d[0].d[1]" "my_demux.in.d.d[0].t"
+= "my_demux.in.d.d[1].d[0]" "my_demux.in.d.d[1].f"
+= "my_demux.in.d.d[1].d[1]" "my_demux.in.d.d[1].t"
+= "my_demux.in.d.d[1].d[0]" "my_demux.in.d.d[1].f"
+= "my_demux.in.d.d[1].d[1]" "my_demux.in.d.d[1].t"
+= "my_demux.in.d.d[0].d[0]" "my_demux.in.d.d[0].f"
+= "my_demux.in.d.d[0].d[1]" "my_demux.in.d.d[0].t"
+= "my_demux.in.d.d[1].d[0]" "my_demux.in.d.d[1].f"
+= "my_demux.in.d.d[1].d[1]" "my_demux.in.d.d[1].t"
+= "my_demux.in.d.d[0].d[0]" "my_demux.in.d.d[0].f"
+= "my_demux.in.d.d[0].d[1]" "my_demux.in.d.d[0].t"
+= "my_demux.in.v" "my_demux.my_demux.in.v"
+= "my_demux.in.a" "my_demux.my_demux.in.a"
+= "my_demux.in.d.d[0].f" "my_demux.my_demux.in.d.d[0].f"
+= "my_demux.in.d.d[0].t" "my_demux.my_demux.in.d.d[0].t"
+= "my_demux.in.d.d[0].d[0]" "my_demux.my_demux.in.d.d[0].d[0]"
+= "my_demux.in.d.d[0].d[1]" "my_demux.my_demux.in.d.d[0].d[1]"
+= "my_demux.in.d.d[1].f" "my_demux.my_demux.in.d.d[1].f"
+= "my_demux.in.d.d[1].t" "my_demux.my_demux.in.d.d[1].t"
+= "my_demux.in.d.d[1].d[0]" "my_demux.my_demux.in.d.d[1].d[0]"
+= "my_demux.in.d.d[1].d[1]" "my_demux.my_demux.in.d.d[1].d[1]"
+= "my_demux.in.d.d[1].d[0]" "my_demux.in.d.d[1].f"
+= "my_demux.in.d.d[1].d[1]" "my_demux.in.d.d[1].t"
+= "my_demux.in.d.d[0].d[0]" "my_demux.in.d.d[0].f"
+= "my_demux.in.d.d[0].d[1]" "my_demux.in.d.d[0].t"

test/unit_tests/demux_td_2/test.act

@@ -0,0 +1,50 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/primitives.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+
+defproc demux_2 (avMx1of2<2> in; avMx1of2<2> out1; a1of1 token; avMx1of2<1> cond){
+
+    demux_td<2, false> my_demux(.in=in, .out1=out1,.token = token, .cond = cond);
+    //Low active Reset 
+    bool _reset_B; 
+    prs {
+    	Reset => _reset_B-
+    }
+    my_demux.supply.vss = GND;
+    my_demux.supply.vdd = Vdd;
+    my_demux.reset_B = _reset_B;
+    
+    
+}
+
+demux_2 my_demux;

test/unit_tests/demux_td_2/test.prsim

@@ -0,0 +1,90 @@
+watchall
+set-qdi-channel-neutral "my_demux.in" 2
+set my_demux.out1.a 0
+set my_demux.out1.v 0
+set my_demux.token.a 0
+set my_demux.token.r 0
+set my_demux.cond.d.d[0].t 0
+set my_demux.cond.d.d[0].f 0
+cycle
+system "echo 'System initialized'"
+
+set Reset 0
+cycle
+system "echo 'System reset completed'"
+status X
+mode run
+
+assert-qdi-channel-neutral "my_demux.out1" 2
+assert-qdi-channel-neutral "my_demux.in" 2
+cycle
+
+system "echo 'Output neutral checked'"
+
+set my_demux.cond.d.d[0].t 1
+set my_demux.cond.d.d[0].f 0
+set-qdi-channel-valid "my_demux.in" 2 3
+cycle
+assert my_demux.in.v 1
+assert my_demux.in.a 0
+
+assert-qdi-channel-valid "my_demux.out1" 2 3
+assert my_demux.token.a 0
+set my_demux.out1.v 1
+cycle
+
+assert my_demux.in.a 1
+set-qdi-channel-neutral "my_demux.in" 2
+cycle
+
+set my_demux.out1.a 1
+cycle
+
+set my_demux.out1.v 0
+
+assert my_demux.in.a 1
+set-qdi-channel-neutral "my_demux.in" 2
+
+
+system "echo 'First Cond Checked'"
+
+set my_demux.out1.a 0
+set my_demux.out1.v 0
+set my_demux.token.a 0
+set my_demux.token.r 0
+set my_demux.cond.d.d[0].t 0
+set my_demux.cond.d.d[0].f 0
+cycle
+
+system "echo 'System initialized'"
+
+set my_demux.cond.d.d[0].t 0
+set my_demux.cond.d.d[0].f 1
+set-qdi-channel-valid "my_demux.in" 2 3
+cycle
+assert my_demux.in.v 1
+assert my_demux.in.a 1
+assert my_demux.token.r 1
+
+set my_demux.token.a 1
+cycle
+
+assert my_demux.token.r 0
+
+set my_demux.token.a 0
+set-qdi-channel-neutral "my_demux.in" 2
+cycle
+
+assert my_demux.in.v 0
+
+set my_demux.cond.d.d[0].t 0
+set my_demux.cond.d.d[0].f 0
+cycle
+
+assert my_demux.in.a 0
+
+
+
+
+
+

test/unit_tests/demux_td_2_SIGN/run/prsim.out

@@ -0,0 +1,181 @@
+my_demux.my_demux.out1_f_buf_func[1].n1 my_demux.my_demux._c_tk_buf my_demux.my_demux.out1_t_buf_func[1].n1 my_demux.my_demux._c_d_buf[0] my_demux.my_demux._out1_a_BX_f[0] my_demux.my_demux.out1_en_buf_t.buf1._y my_demux.my_demux.token_a_out my_demux.my_demux._out_v my_demux.my_demux._in_v my_demux.my_demux._en my_demux.my_demux.vc.OR2_tf[1].y my_demux.my_demux._out1_a_B my_demux.my_demux.c_buf_d.in my_demux.my_demux._out1_a_BX_t[0] my_demux.in.v my_demux.my_demux._c_v my_demux.my_demux.c_buf_tk.a my_demux.my_demux.out1_f_buf_func[0].n1 my_demux.out1.v my_demux.my_demux.out1_t_buf_func[0].n1 my_demux.out1.a my_demux.my_demux._en1_X_f[0] my_demux.my_demux.out_or._y my_demux.my_demux._en1_X_t[0] my_demux.my_demux.vc.OR2_tf[0]._y my_demux.my_demux.c_buf_d.buf1._y my_demux.my_demux.in_v_buf._y my_demux.my_demux.vc.OR2_tf[0].y my_demux.token.a my_demux.my_demux.vc.OR2_tf[1]._y my_demux.my_demux._in_c_v_ my_demux.my_demux.c_buf_tk._y my_demux.my_demux.c_f_c_t_or._y my_demux.my_demux.out1_en_buf_f.buf1._y my_demux.my_demux.vc.myctree.C2Els[0]._y my_demux.my_demux.out1_a_B_buf_f.buf1._y my_demux.my_demux.c_el._y my_demux.my_demux.out1_a_B_buf_t.buf1._y 
+	     83058 my_demux.my_demux.out1_f_buf_func[0].n1 : 0
+	     83058 my_demux.my_demux.c_buf_d.in : 0
+	     83058 my_demux.my_demux.c_buf_tk.a : 0
+	     83058 my_demux.my_demux.out1_f_buf_func[1].n1 : 0
+	     83058 my_demux.token.a : 0
+	     83058 my_demux.out1.v : 0
+	     83058 my_demux.my_demux.out1_t_buf_func[0].n1 : 0
+	     83058 my_demux.out1.a : 0
+	     83058 my_demux.my_demux.out1_t_buf_func[1].n1 : 0
+	     83062 my_demux.my_demux.c_f_c_t_or._y : 1  [by my_demux.my_demux.c_buf_tk.a:=0]
+	     83073 my_demux.my_demux.out_or._y : 1  [by my_demux.out1.v:=0]
+	     83113 my_demux.my_demux.vc.OR2_tf[1]._y : 1  [by my_demux.my_demux.out1_t_buf_func[1].n1:=0]
+	     92187 my_demux.my_demux.token_a_out : 1  [by my_demux.token.a:=0]
+	     96782 my_demux.my_demux.c_buf_tk._y : 1  [by my_demux.my_demux.c_buf_tk.a:=0]
+	     96962 my_demux.my_demux.vc.OR2_tf[1].y : 0  [by my_demux.my_demux.vc.OR2_tf[1]._y:=1]
+	    112853 my_demux.my_demux._out_v : 0  [by my_demux.my_demux.out_or._y:=1]
+	    119989 my_demux.my_demux._out1_a_B : 1  [by my_demux.out1.a:=0]
+	    120411 my_demux.my_demux.out1_a_B_buf_f.buf1._y : 0  [by my_demux.my_demux._out1_a_B:=1]
+	    120412 my_demux.my_demux._out1_a_BX_t[0] : 1  [by my_demux.my_demux.out1_a_B_buf_f.buf1._y:=0]
+	    121594 my_demux.my_demux._c_tk_buf : 0  [by my_demux.my_demux.c_buf_tk._y:=1]
+	    126306 my_demux.my_demux.vc.OR2_tf[0]._y : 1  [by my_demux.my_demux.out1_t_buf_func[0].n1:=0]
+	    126307 my_demux.my_demux.vc.OR2_tf[0].y : 0  [by my_demux.my_demux.vc.OR2_tf[0]._y:=1]
+	    127156 my_demux.my_demux.c_buf_d.buf1._y : 1  [by my_demux.my_demux.c_buf_d.in:=0]
+	    127196 my_demux.my_demux._en : 1  [by my_demux.my_demux._out_v:=0]
+	    127199 my_demux.my_demux.out1_en_buf_f.buf1._y : 0  [by my_demux.my_demux._en:=1]
+	    127438 my_demux.my_demux._c_d_buf[0] : 0  [by my_demux.my_demux.c_buf_d.buf1._y:=1]
+	    127964 my_demux.my_demux.out1_en_buf_t.buf1._y : 0  [by my_demux.my_demux._en:=1]
+	    128515 my_demux.my_demux._en1_X_t[0] : 1  [by my_demux.my_demux.out1_en_buf_t.buf1._y:=0]
+	    134715 my_demux.my_demux._c_v : 0  [by my_demux.my_demux.c_f_c_t_or._y:=1]
+	    146512 my_demux.my_demux.vc.myctree.C2Els[0]._y : 1  [by my_demux.my_demux.vc.OR2_tf[0].y:=0]
+	    147583 my_demux.my_demux._in_v : 0  [by my_demux.my_demux.vc.myctree.C2Els[0]._y:=1]
+	    148537 my_demux.my_demux.in_v_buf._y : 1  [by my_demux.my_demux._in_v:=0]
+	    148664 my_demux.my_demux.c_el._y : 1  [by my_demux.my_demux._in_v:=0]
+	    149640 my_demux.my_demux._en1_X_f[0] : 1  [by my_demux.my_demux.out1_en_buf_f.buf1._y:=0]
+	    149646 my_demux.my_demux._in_c_v_ : 0  [by my_demux.my_demux.c_el._y:=1]
+	    168703 my_demux.my_demux.out1_a_B_buf_t.buf1._y : 0  [by my_demux.my_demux._out1_a_B:=1]
+	    168721 my_demux.my_demux._out1_a_BX_f[0] : 1  [by my_demux.my_demux.out1_a_B_buf_t.buf1._y:=0]
+	    203007 my_demux.in.v : 0  [by my_demux.my_demux.in_v_buf._y:=1]
+System initialized
+	    203007 Reset : 0
+	    207020 my_demux._reset_B : 1  [by Reset:=0]
+	    211023 my_demux.my_demux.reset_buf._y : 0  [by my_demux._reset_B:=1]
+	    255924 my_demux.my_demux._reset_BX : 1  [by my_demux.my_demux.reset_buf._y:=0]
+	    260684 my_demux.my_demux.reset_buf_token._y : 0  [by my_demux.my_demux._reset_BX:=1]
+	    261186 my_demux.my_demux._reset_BXt : 1  [by my_demux.my_demux.reset_buf_token._y:=0]
+	    277508 my_demux.my_demux.reset_bufarray.buf1._y : 0  [by my_demux.my_demux._reset_BX:=1]
+	    277711 my_demux.my_demux._reset_BXX[0] : 1  [by my_demux.my_demux.reset_bufarray.buf1._y:=0]
+System reset completed
+
+Output neutral checked
+	    277711 my_demux.my_demux.c_buf_d.in : 1
+	    277711 my_demux.my_demux.out1_t_buf_func[1].n1 : 1
+	    277711 my_demux.my_demux.out1_t_buf_func[0].n1 : 1
+	    277780 my_demux.my_demux.vc.OR2_tf[0]._y : 0  [by my_demux.my_demux.out1_t_buf_func[0].n1:=1]
+	    277791 my_demux.my_demux.vc.OR2_tf[0].y : 1  [by my_demux.my_demux.vc.OR2_tf[0]._y:=0]
+	    277850 my_demux.my_demux.c_buf_d.buf1._y : 0  [by my_demux.my_demux.c_buf_d.in:=1]
+	    279565 my_demux.my_demux.c_f_c_t_or._y : 0  [by my_demux.my_demux.c_buf_d.in:=1]
+	    279769 my_demux.my_demux._c_v : 1  [by my_demux.my_demux.c_f_c_t_or._y:=0]
+	    314057 my_demux.my_demux.vc.OR2_tf[1]._y : 0  [by my_demux.my_demux.out1_t_buf_func[1].n1:=1]
+	    314072 my_demux.my_demux.vc.OR2_tf[1].y : 1  [by my_demux.my_demux.vc.OR2_tf[1]._y:=0]
+	    314073 my_demux.my_demux.vc.myctree.C2Els[0]._y : 0  [by my_demux.my_demux.vc.OR2_tf[1].y:=1]
+	    314110 my_demux.my_demux._in_v : 1  [by my_demux.my_demux.vc.myctree.C2Els[0]._y:=0]
+	    314222 my_demux.my_demux.c_el._y : 0  [by my_demux.my_demux._in_v:=1]
+	    314849 my_demux.my_demux.in_v_buf._y : 0  [by my_demux.my_demux._in_v:=1]
+	    314889 my_demux.in.v : 1  [by my_demux.my_demux.in_v_buf._y:=0]
+	    329636 my_demux.my_demux._c_d_buf[0] : 1  [by my_demux.my_demux.c_buf_d.buf1._y:=0]
+	    329723 my_demux.my_demux.out1_t_buf_func[1]._y : 0  [by my_demux.my_demux._c_d_buf[0]:=1]
+	    329893 my_demux.my_demux.out1_t_buf_func[0]._y : 0  [by my_demux.my_demux._c_d_buf[0]:=1]
+	    329894 my_demux.my_demux.out1_t_buf_func[0].y : 1  [by my_demux.my_demux.out1_t_buf_func[0]._y:=0]
+	    330017 my_demux.my_demux.out1_t_buf_func[1].y : 1  [by my_demux.my_demux.out1_t_buf_func[1]._y:=0]
+	    361734 my_demux.my_demux._in_c_v_ : 1  [by my_demux.my_demux.c_el._y:=0]
+	    361734 my_demux.out1.v : 1
+	    363540 my_demux.my_demux.out_or._y : 0  [by my_demux.out1.v:=1]
+	    365547 my_demux.my_demux._out_v : 1  [by my_demux.my_demux.out_or._y:=0]
+	    366756 my_demux.my_demux.inack_ctl._y : 0  [by my_demux.my_demux._out_v:=1]
+	    367346 my_demux.in.a : 1  [by my_demux.my_demux.inack_ctl._y:=0]
+	    367524 my_demux.my_demux._en : 0  [by my_demux.in.a:=1]
+	    367688 my_demux.my_demux.out1_en_buf_f.buf1._y : 1  [by my_demux.my_demux._en:=0]
+	    368327 my_demux.my_demux.out1_en_buf_t.buf1._y : 1  [by my_demux.my_demux._en:=0]
+	    368349 my_demux.my_demux._en1_X_t[0] : 0  [by my_demux.my_demux.out1_en_buf_t.buf1._y:=1]
+	    369883 my_demux.my_demux._en1_X_f[0] : 0  [by my_demux.my_demux.out1_en_buf_f.buf1._y:=1]
+	    369883 my_demux.my_demux.out1_t_buf_func[0].n1 : 0
+	    369883 my_demux.my_demux.out1_t_buf_func[1].n1 : 0
+	    370730 my_demux.my_demux.vc.OR2_tf[0]._y : 1  [by my_demux.my_demux.out1_t_buf_func[0].n1:=0]
+	    370863 my_demux.my_demux.vc.OR2_tf[0].y : 0  [by my_demux.my_demux.vc.OR2_tf[0]._y:=1]
+	    400011 my_demux.my_demux.vc.OR2_tf[1]._y : 1  [by my_demux.my_demux.out1_t_buf_func[1].n1:=0]
+	    415673 my_demux.my_demux.vc.OR2_tf[1].y : 0  [by my_demux.my_demux.vc.OR2_tf[1]._y:=1]
+	    416032 my_demux.my_demux.vc.myctree.C2Els[0]._y : 1  [by my_demux.my_demux.vc.OR2_tf[1].y:=0]
+	    430148 my_demux.my_demux._in_v : 0  [by my_demux.my_demux.vc.myctree.C2Els[0]._y:=1]
+	    430369 my_demux.my_demux.in_v_buf._y : 1  [by my_demux.my_demux._in_v:=0]
+	    430376 my_demux.in.v : 0  [by my_demux.my_demux.in_v_buf._y:=1]
+First Cond Checked
+	    430376 my_demux.out1.a : 1
+	    430376 my_demux.my_demux.c_buf_d.in : 0
+	    430376 my_demux.out1.v : 0
+	    430406 my_demux.my_demux._out1_a_B : 0  [by my_demux.out1.a:=1]
+	    430413 my_demux.my_demux.out1_a_B_buf_t.buf1._y : 1  [by my_demux.my_demux._out1_a_B:=0]
+	    430467 my_demux.my_demux.out_or._y : 1  [by my_demux.out1.v:=0]
+	    430573 my_demux.my_demux._out_v : 0  [by my_demux.my_demux.out_or._y:=1]
+	    432595 my_demux.my_demux.out1_a_B_buf_f.buf1._y : 1  [by my_demux.my_demux._out1_a_B:=0]
+	    432673 my_demux.my_demux._out1_a_BX_t[0] : 0  [by my_demux.my_demux.out1_a_B_buf_f.buf1._y:=1]
+	    432948 my_demux.my_demux.out1_t_buf_func[0]._y : 1  [by my_demux.my_demux._out1_a_BX_t[0]:=0]
+	    433200 my_demux.my_demux._out1_a_BX_f[0] : 0  [by my_demux.my_demux.out1_a_B_buf_t.buf1._y:=1]
+	    433403 my_demux.my_demux.out1_t_buf_func[0].y : 0  [by my_demux.my_demux.out1_t_buf_func[0]._y:=1]
+	    437089 my_demux.my_demux.c_f_c_t_or._y : 1  [by my_demux.my_demux.c_buf_d.in:=0]
+	    437101 my_demux.my_demux._c_v : 0  [by my_demux.my_demux.c_f_c_t_or._y:=1]
+	    437505 my_demux.my_demux.c_el._y : 1  [by my_demux.my_demux._c_v:=0]
+	    437517 my_demux.my_demux._in_c_v_ : 0  [by my_demux.my_demux.c_el._y:=1]
+	    443433 my_demux.my_demux.inack_ctl._y : 1  [by my_demux.my_demux._in_c_v_:=0]
+	    447709 my_demux.in.a : 0  [by my_demux.my_demux.inack_ctl._y:=1]
+	    450608 my_demux.my_demux._en : 1  [by my_demux.in.a:=0]
+	    450610 my_demux.my_demux.out1_en_buf_f.buf1._y : 0  [by my_demux.my_demux._en:=1]
+	    451669 my_demux.my_demux.out1_t_buf_func[1]._y : 1  [by my_demux.my_demux._out1_a_BX_t[0]:=0]
+	    452918 my_demux.my_demux.out1_t_buf_func[1].y : 0  [by my_demux.my_demux.out1_t_buf_func[1]._y:=1]
+	    454903 my_demux.my_demux.out1_en_buf_t.buf1._y : 0  [by my_demux.my_demux._en:=1]
+	    455145 my_demux.my_demux._en1_X_f[0] : 1  [by my_demux.my_demux.out1_en_buf_f.buf1._y:=0]
+	    458402 my_demux.my_demux._en1_X_t[0] : 1  [by my_demux.my_demux.out1_en_buf_t.buf1._y:=0]
+	    487837 my_demux.my_demux.c_buf_d.buf1._y : 1  [by my_demux.my_demux.c_buf_d.in:=0]
+	    488003 my_demux.my_demux._c_d_buf[0] : 0  [by my_demux.my_demux.c_buf_d.buf1._y:=1]
+System initialized
+	    488003 my_demux.my_demux.c_buf_tk.a : 1
+	    488003 my_demux.my_demux.out1_t_buf_func[1].n1 : 1
+	    488003 my_demux.my_demux.out1_t_buf_func[0].n1 : 1
+	    488078 my_demux.my_demux.c_buf_tk._y : 0  [by my_demux.my_demux.c_buf_tk.a:=1]
+	    488080 my_demux.my_demux._c_tk_buf : 1  [by my_demux.my_demux.c_buf_tk._y:=0]
+	    488141 my_demux.my_demux.vc.OR2_tf[1]._y : 0  [by my_demux.my_demux.out1_t_buf_func[1].n1:=1]
+	    488348 my_demux.my_demux.c_f_c_t_or._y : 0  [by my_demux.my_demux.c_buf_tk.a:=1]
+	    488349 my_demux.my_demux._c_v : 1  [by my_demux.my_demux.c_f_c_t_or._y:=0]
+	    493266 my_demux.my_demux.vc.OR2_tf[0]._y : 0  [by my_demux.my_demux.out1_t_buf_func[0].n1:=1]
+	    493814 my_demux.my_demux.vc.OR2_tf[0].y : 1  [by my_demux.my_demux.vc.OR2_tf[0]._y:=0]
+	    532058 my_demux.my_demux.vc.OR2_tf[1].y : 1  [by my_demux.my_demux.vc.OR2_tf[1]._y:=0]
+	    532069 my_demux.my_demux.vc.myctree.C2Els[0]._y : 0  [by my_demux.my_demux.vc.OR2_tf[1].y:=1]
+	    532439 my_demux.my_demux._in_v : 1  [by my_demux.my_demux.vc.myctree.C2Els[0]._y:=0]
+	    532455 my_demux.my_demux.c_el._y : 0  [by my_demux.my_demux._in_v:=1]
+	    532506 my_demux.my_demux.token_buf._y : 0  [by my_demux.my_demux._in_v:=1]
+	    533034 my_demux.token.r : 1  [by my_demux.my_demux.token_buf._y:=0]
+	    535080 my_demux.my_demux.in_v_buf._y : 0  [by my_demux.my_demux._in_v:=1]
+	    535469 my_demux.my_demux.out_or._y : 0  [by my_demux.token.r:=1]
+	    537017 my_demux.my_demux._in_c_v_ : 1  [by my_demux.my_demux.c_el._y:=0]
+	    559394 my_demux.my_demux._out_v : 1  [by my_demux.my_demux.out_or._y:=0]
+	    561960 my_demux.in.v : 1  [by my_demux.my_demux.in_v_buf._y:=0]
+	    572435 my_demux.my_demux.inack_ctl._y : 0  [by my_demux.my_demux._out_v:=1]
+	    572437 my_demux.in.a : 1  [by my_demux.my_demux.inack_ctl._y:=0]
+	    633395 my_demux.my_demux._en : 0  [by my_demux.in.a:=1]
+	    633398 my_demux.my_demux.out1_en_buf_t.buf1._y : 1  [by my_demux.my_demux._en:=0]
+	    633424 my_demux.my_demux.out1_en_buf_f.buf1._y : 1  [by my_demux.my_demux._en:=0]
+	    633715 my_demux.my_demux._en1_X_t[0] : 0  [by my_demux.my_demux.out1_en_buf_t.buf1._y:=1]
+	    635025 my_demux.my_demux._en1_X_f[0] : 0  [by my_demux.my_demux.out1_en_buf_f.buf1._y:=1]
+	    635025 my_demux.token.a : 1
+	    635178 my_demux.my_demux.token_a_out : 0  [by my_demux.token.a:=1]
+	    635222 my_demux.my_demux.token_buf._y : 1  [by my_demux.my_demux.token_a_out:=0]
+	    637983 my_demux.token.r : 0  [by my_demux.my_demux.token_buf._y:=1]
+	    651666 my_demux.my_demux.out_or._y : 1  [by my_demux.token.r:=0]
+	    651667 my_demux.my_demux._out_v : 0  [by my_demux.my_demux.out_or._y:=1]
+	    651667 my_demux.token.a : 0
+	    651667 my_demux.my_demux.out1_t_buf_func[1].n1 : 0
+	    651667 my_demux.my_demux.out1_t_buf_func[0].n1 : 0
+	    651668 my_demux.my_demux.vc.OR2_tf[0]._y : 1  [by my_demux.my_demux.out1_t_buf_func[0].n1:=0]
+	    651689 my_demux.my_demux.vc.OR2_tf[1]._y : 1  [by my_demux.my_demux.out1_t_buf_func[1].n1:=0]
+	    651884 my_demux.my_demux.token_a_out : 1  [by my_demux.token.a:=0]
+	    653249 my_demux.my_demux.vc.OR2_tf[0].y : 0  [by my_demux.my_demux.vc.OR2_tf[0]._y:=1]
+	    661034 my_demux.my_demux.vc.OR2_tf[1].y : 0  [by my_demux.my_demux.vc.OR2_tf[1]._y:=1]
+	    661193 my_demux.my_demux.vc.myctree.C2Els[0]._y : 1  [by my_demux.my_demux.vc.OR2_tf[1].y:=0]
+	    680869 my_demux.my_demux._in_v : 0  [by my_demux.my_demux.vc.myctree.C2Els[0]._y:=1]
+	    682156 my_demux.my_demux.in_v_buf._y : 1  [by my_demux.my_demux._in_v:=0]
+	    684388 my_demux.in.v : 0  [by my_demux.my_demux.in_v_buf._y:=1]
+	    684388 my_demux.my_demux.c_buf_tk.a : 0
+	    684533 my_demux.my_demux.c_buf_tk._y : 1  [by my_demux.my_demux.c_buf_tk.a:=0]
+	    687220 my_demux.my_demux.c_f_c_t_or._y : 1  [by my_demux.my_demux.c_buf_tk.a:=0]
+	    687221 my_demux.my_demux._c_v : 0  [by my_demux.my_demux.c_f_c_t_or._y:=1]
+	    690887 my_demux.my_demux._c_tk_buf : 0  [by my_demux.my_demux.c_buf_tk._y:=1]
+	    726505 my_demux.my_demux.c_el._y : 1  [by my_demux.my_demux._c_v:=0]
+	    726667 my_demux.my_demux._in_c_v_ : 0  [by my_demux.my_demux.c_el._y:=1]
+	    734036 my_demux.my_demux.inack_ctl._y : 1  [by my_demux.my_demux._in_c_v_:=0]
+	    734050 my_demux.in.a : 0  [by my_demux.my_demux.inack_ctl._y:=1]
+	    734057 my_demux.my_demux._en : 1  [by my_demux.in.a:=0]
+	    734217 my_demux.my_demux.out1_en_buf_t.buf1._y : 0  [by my_demux.my_demux._en:=1]
+	    734218 my_demux.my_demux._en1_X_t[0] : 1  [by my_demux.my_demux.out1_en_buf_t.buf1._y:=0]
+	    755614 my_demux.my_demux.out1_en_buf_f.buf1._y : 0  [by my_demux.my_demux._en:=1]
+	    755615 my_demux.my_demux._en1_X_f[0] : 1  [by my_demux.my_demux.out1_en_buf_f.buf1._y:=0]

test/unit_tests/demux_td_2_SIGN/run/test.prs

@@ -0,0 +1,408 @@
+= "GND" "GND"
+= "Vdd" "Vdd"
+= "Reset" "Reset"
+"Reset"->"my_demux._reset_B"-
+~("Reset")->"my_demux._reset_B"+
+= "my_demux._reset_B" "my_demux.my_demux.reset_B"
+= "my_demux.cond.d.d[0].d[0]" "my_demux.cond.d.d[0].f"
+= "my_demux.cond.d.d[0].d[1]" "my_demux.cond.d.d[0].t"
+= "my_demux.cond.d.d[0].d[0]" "my_demux.cond.d.d[0].f"
+= "my_demux.cond.d.d[0].d[1]" "my_demux.cond.d.d[0].t"
+= "my_demux.cond.d.d[0].d[0]" "my_demux.cond.d.d[0].f"
+= "my_demux.cond.d.d[0].d[1]" "my_demux.cond.d.d[0].t"
+= "my_demux.cond.v" "my_demux.my_demux.cond.v"
+= "my_demux.cond.a" "my_demux.my_demux.cond.a"
+= "my_demux.cond.d.d[0].f" "my_demux.my_demux.cond.d.d[0].f"
+= "my_demux.cond.d.d[0].t" "my_demux.my_demux.cond.d.d[0].t"
+= "my_demux.cond.d.d[0].d[0]" "my_demux.my_demux.cond.d.d[0].d[0]"
+= "my_demux.cond.d.d[0].d[1]" "my_demux.my_demux.cond.d.d[0].d[1]"
+= "my_demux.cond.d.d[0].d[0]" "my_demux.cond.d.d[0].f"
+= "my_demux.cond.d.d[0].d[1]" "my_demux.cond.d.d[0].t"
+= "my_demux.out1.d.d[0].d[0]" "my_demux.out1.d.d[0].f"
+= "my_demux.out1.d.d[0].d[1]" "my_demux.out1.d.d[0].t"
+= "my_demux.out1.d.d[1].d[0]" "my_demux.out1.d.d[1].f"
+= "my_demux.out1.d.d[1].d[1]" "my_demux.out1.d.d[1].t"
+= "my_demux.out1.d.d[1].d[0]" "my_demux.out1.d.d[1].f"
+= "my_demux.out1.d.d[1].d[1]" "my_demux.out1.d.d[1].t"
+= "my_demux.out1.d.d[0].d[0]" "my_demux.out1.d.d[0].f"
+= "my_demux.out1.d.d[0].d[1]" "my_demux.out1.d.d[0].t"
+= "my_demux.out1.d.d[1].d[0]" "my_demux.out1.d.d[1].f"
+= "my_demux.out1.d.d[1].d[1]" "my_demux.out1.d.d[1].t"
+= "my_demux.out1.d.d[0].d[0]" "my_demux.out1.d.d[0].f"
+= "my_demux.out1.d.d[0].d[1]" "my_demux.out1.d.d[0].t"
+= "my_demux.out1.v" "my_demux.my_demux.out1.v"
+= "my_demux.out1.a" "my_demux.my_demux.out1.a"
+= "my_demux.out1.d.d[0].f" "my_demux.my_demux.out1.d.d[0].f"
+= "my_demux.out1.d.d[0].t" "my_demux.my_demux.out1.d.d[0].t"
+= "my_demux.out1.d.d[0].d[0]" "my_demux.my_demux.out1.d.d[0].d[0]"
+= "my_demux.out1.d.d[0].d[1]" "my_demux.my_demux.out1.d.d[0].d[1]"
+= "my_demux.out1.d.d[1].f" "my_demux.my_demux.out1.d.d[1].f"
+= "my_demux.out1.d.d[1].t" "my_demux.my_demux.out1.d.d[1].t"
+= "my_demux.out1.d.d[1].d[0]" "my_demux.my_demux.out1.d.d[1].d[0]"
+= "my_demux.out1.d.d[1].d[1]" "my_demux.my_demux.out1.d.d[1].d[1]"
+= "my_demux.out1.d.d[1].d[0]" "my_demux.out1.d.d[1].f"
+= "my_demux.out1.d.d[1].d[1]" "my_demux.out1.d.d[1].t"
+= "my_demux.out1.d.d[0].d[0]" "my_demux.out1.d.d[0].f"
+= "my_demux.out1.d.d[0].d[1]" "my_demux.out1.d.d[0].t"
+~"my_demux.my_demux.token_buf.c1"&~"my_demux.my_demux.token_buf.c2"|~"my_demux.my_demux.token_buf.pr_B"->"my_demux.my_demux.token_buf._y"+
+"my_demux.my_demux.token_buf.c1"&"my_demux.my_demux.token_buf.c2"&"my_demux.my_demux.token_buf.n1"&"my_demux.my_demux.token_buf.n2"&"my_demux.my_demux.token_buf.sr_B"->"my_demux.my_demux.token_buf._y"-
+"my_demux.my_demux.token_buf._y"->"my_demux.my_demux.token_buf.y"-
+~("my_demux.my_demux.token_buf._y")->"my_demux.my_demux.token_buf.y"+
+"my_demux.my_demux.out1_a_B_buf_f.buf1.a"->"my_demux.my_demux.out1_a_B_buf_f.buf1._y"-
+~("my_demux.my_demux.out1_a_B_buf_f.buf1.a")->"my_demux.my_demux.out1_a_B_buf_f.buf1._y"+
+"my_demux.my_demux.out1_a_B_buf_f.buf1._y"->"my_demux.my_demux.out1_a_B_buf_f.buf1.y"-
+~("my_demux.my_demux.out1_a_B_buf_f.buf1._y")->"my_demux.my_demux.out1_a_B_buf_f.buf1.y"+
+= "my_demux.my_demux.out1_a_B_buf_f.supply.vdd" "my_demux.my_demux.out1_a_B_buf_f.buf1.vdd"
+= "my_demux.my_demux.out1_a_B_buf_f.supply.vss" "my_demux.my_demux.out1_a_B_buf_f.buf1.vss"
+= "my_demux.my_demux.out1_a_B_buf_f.out[0]" "my_demux.my_demux.out1_a_B_buf_f.out[1]"
+= "my_demux.my_demux.out1_a_B_buf_f.out[0]" "my_demux.my_demux.out1_a_B_buf_f.buf1.y"
+= "my_demux.my_demux.out1_a_B_buf_f.in" "my_demux.my_demux.out1_a_B_buf_f.buf1.a"
+~"my_demux.my_demux.inack_ctl.c1"&~"my_demux.my_demux.inack_ctl.c2"&~"my_demux.my_demux.inack_ctl.c3"|~"my_demux.my_demux.inack_ctl.pr_B"->"my_demux.my_demux.inack_ctl._y"+
+"my_demux.my_demux.inack_ctl.c1"&"my_demux.my_demux.inack_ctl.c2"&"my_demux.my_demux.inack_ctl.c3"&"my_demux.my_demux.inack_ctl.sr_B"->"my_demux.my_demux.inack_ctl._y"-
+"my_demux.my_demux.inack_ctl._y"->"my_demux.my_demux.inack_ctl.y"-
+~("my_demux.my_demux.inack_ctl._y")->"my_demux.my_demux.inack_ctl.y"+
+"my_demux.my_demux.reset_bufarray.buf1.a"->"my_demux.my_demux.reset_bufarray.buf1._y"-
+~("my_demux.my_demux.reset_bufarray.buf1.a")->"my_demux.my_demux.reset_bufarray.buf1._y"+
+"my_demux.my_demux.reset_bufarray.buf1._y"->"my_demux.my_demux.reset_bufarray.buf1.y"-
+~("my_demux.my_demux.reset_bufarray.buf1._y")->"my_demux.my_demux.reset_bufarray.buf1.y"+
+= "my_demux.my_demux.reset_bufarray.supply.vdd" "my_demux.my_demux.reset_bufarray.buf1.vdd"
+= "my_demux.my_demux.reset_bufarray.supply.vss" "my_demux.my_demux.reset_bufarray.buf1.vss"
+= "my_demux.my_demux.reset_bufarray.out[0]" "my_demux.my_demux.reset_bufarray.out[1]"
+= "my_demux.my_demux.reset_bufarray.out[0]" "my_demux.my_demux.reset_bufarray.buf1.y"
+= "my_demux.my_demux.reset_bufarray.in" "my_demux.my_demux.reset_bufarray.buf1.a"
+= "my_demux.my_demux._c_v" "my_demux.my_demux.c_el.c1"
+= "my_demux.my_demux._c_v" "my_demux.my_demux.c_f_c_t_or.y"
+"my_demux.my_demux.reset_buf_token.a"->"my_demux.my_demux.reset_buf_token._y"-
+~("my_demux.my_demux.reset_buf_token.a")->"my_demux.my_demux.reset_buf_token._y"+
+"my_demux.my_demux.reset_buf_token._y"->"my_demux.my_demux.reset_buf_token.y"-
+~("my_demux.my_demux.reset_buf_token._y")->"my_demux.my_demux.reset_buf_token.y"+
+= "my_demux.my_demux._c_d_buf[0]" "my_demux.my_demux.c_buf_d.out[0]"
+= "my_demux.my_demux._c_d_buf[1]" "my_demux.my_demux.c_buf_d.out[1]"
+= "my_demux.my_demux._c_d_buf[0]" "my_demux.my_demux.out1_t_buf_func[1].n2"
+= "my_demux.my_demux._c_d_buf[0]" "my_demux.my_demux.out1_f_buf_func[1].n2"
+= "my_demux.my_demux._c_d_buf[0]" "my_demux.my_demux.out1_t_buf_func[0].n2"
+= "my_demux.my_demux._c_d_buf[0]" "my_demux.my_demux.out1_f_buf_func[0].n2"
+= "my_demux.my_demux._c_d_buf[0]" "my_demux.my_demux._c_d_buf[1]"
+= "my_demux.my_demux._en" "my_demux.my_demux.token_buf.c1"
+= "my_demux.my_demux._en" "my_demux.my_demux.out1_en_buf_f.in"
+= "my_demux.my_demux._en" "my_demux.my_demux.out1_en_buf_t.in"
+= "my_demux.my_demux._en" "my_demux.my_demux.en_ctl.y"
+= "my_demux.my_demux._en" "my_demux.my_demux.inack_ctl.c1"
+= "my_demux.my_demux.token_a_out" "my_demux.my_demux.token_buf.c2"
+= "my_demux.my_demux.token_a_out" "my_demux.my_demux.outt_a_inv.y"
+= "my_demux.my_demux._out1_a_B" "my_demux.my_demux.out1_a_B_buf_t.in"
+= "my_demux.my_demux._out1_a_B" "my_demux.my_demux.out1_a_B_buf_f.in"
+= "my_demux.my_demux._out1_a_B" "my_demux.my_demux.out1_a_inv.y"
+= "my_demux.my_demux.in.d.d[0].d[0]" "my_demux.my_demux.in.d.d[0].f"
+= "my_demux.my_demux.in.d.d[0].d[1]" "my_demux.my_demux.in.d.d[0].t"
+= "my_demux.my_demux.in.d.d[1].d[0]" "my_demux.my_demux.in.d.d[1].f"
+= "my_demux.my_demux.in.d.d[1].d[1]" "my_demux.my_demux.in.d.d[1].t"
+= "my_demux.my_demux.in.d.d[1].d[0]" "my_demux.my_demux.in.d.d[1].f"
+= "my_demux.my_demux.in.d.d[1].d[1]" "my_demux.my_demux.in.d.d[1].t"
+= "my_demux.my_demux.in.d.d[0].d[0]" "my_demux.my_demux.in.d.d[0].f"
+= "my_demux.my_demux.in.d.d[0].d[1]" "my_demux.my_demux.in.d.d[0].t"
+= "my_demux.my_demux.in.d.d[1].d[0]" "my_demux.my_demux.in.d.d[1].f"
+= "my_demux.my_demux.in.d.d[1].d[1]" "my_demux.my_demux.in.d.d[1].t"
+= "my_demux.my_demux.in.d.d[0].d[0]" "my_demux.my_demux.in.d.d[0].f"
+= "my_demux.my_demux.in.d.d[0].d[1]" "my_demux.my_demux.in.d.d[0].t"
+= "my_demux.my_demux.in.d.d[0].f" "my_demux.my_demux.vc.in.d[0].f"
+= "my_demux.my_demux.in.d.d[0].t" "my_demux.my_demux.vc.in.d[0].t"
+= "my_demux.my_demux.in.d.d[0].d[0]" "my_demux.my_demux.vc.in.d[0].d[0]"
+= "my_demux.my_demux.in.d.d[0].d[1]" "my_demux.my_demux.vc.in.d[0].d[1]"
+= "my_demux.my_demux.in.d.d[1].f" "my_demux.my_demux.vc.in.d[1].f"
+= "my_demux.my_demux.in.d.d[1].t" "my_demux.my_demux.vc.in.d[1].t"
+= "my_demux.my_demux.in.d.d[1].d[0]" "my_demux.my_demux.vc.in.d[1].d[0]"
+= "my_demux.my_demux.in.d.d[1].d[1]" "my_demux.my_demux.vc.in.d[1].d[1]"
+= "my_demux.my_demux.in.a" "my_demux.my_demux.en_ctl.c1"
+= "my_demux.my_demux.in.a" "my_demux.my_demux.inack_ctl.y"
+= "my_demux.my_demux.in.v" "my_demux.my_demux.in_v_buf.y"
+= "my_demux.my_demux.in.d.d[1].d[0]" "my_demux.my_demux.out1_f_buf_func[1].n1"
+= "my_demux.my_demux.in.d.d[1].d[0]" "my_demux.my_demux.in.d.d[1].f"
+= "my_demux.my_demux.in.d.d[1].d[1]" "my_demux.my_demux.out1_t_buf_func[1].n1"
+= "my_demux.my_demux.in.d.d[1].d[1]" "my_demux.my_demux.in.d.d[1].t"
+= "my_demux.my_demux.in.d.d[0].d[0]" "my_demux.my_demux.out1_f_buf_func[0].n1"
+= "my_demux.my_demux.in.d.d[0].d[0]" "my_demux.my_demux.in.d.d[0].f"
+= "my_demux.my_demux.in.d.d[0].d[1]" "my_demux.my_demux.out1_t_buf_func[0].n1"
+= "my_demux.my_demux.in.d.d[0].d[1]" "my_demux.my_demux.in.d.d[0].t"
+"my_demux.my_demux.out1_en_buf_t.buf1.a"->"my_demux.my_demux.out1_en_buf_t.buf1._y"-
+~("my_demux.my_demux.out1_en_buf_t.buf1.a")->"my_demux.my_demux.out1_en_buf_t.buf1._y"+
+"my_demux.my_demux.out1_en_buf_t.buf1._y"->"my_demux.my_demux.out1_en_buf_t.buf1.y"-
+~("my_demux.my_demux.out1_en_buf_t.buf1._y")->"my_demux.my_demux.out1_en_buf_t.buf1.y"+
+= "my_demux.my_demux.out1_en_buf_t.supply.vdd" "my_demux.my_demux.out1_en_buf_t.buf1.vdd"
+= "my_demux.my_demux.out1_en_buf_t.supply.vss" "my_demux.my_demux.out1_en_buf_t.buf1.vss"
+= "my_demux.my_demux.out1_en_buf_t.out[0]" "my_demux.my_demux.out1_en_buf_t.out[1]"
+= "my_demux.my_demux.out1_en_buf_t.out[0]" "my_demux.my_demux.out1_en_buf_t.buf1.y"
+= "my_demux.my_demux.out1_en_buf_t.in" "my_demux.my_demux.out1_en_buf_t.buf1.a"
+"my_demux.my_demux.out_or.a"|"my_demux.my_demux.out_or.b"->"my_demux.my_demux.out_or._y"-
+~("my_demux.my_demux.out_or.a"|"my_demux.my_demux.out_or.b")->"my_demux.my_demux.out_or._y"+
+"my_demux.my_demux.out_or._y"->"my_demux.my_demux.out_or.y"-
+~("my_demux.my_demux.out_or._y")->"my_demux.my_demux.out_or.y"+
+= "my_demux.my_demux._in_c_v_" "my_demux.my_demux.c_el.y"
+= "my_demux.my_demux._in_c_v_" "my_demux.my_demux.inack_ctl.c2"
+"my_demux.my_demux.reset_buf.a"->"my_demux.my_demux.reset_buf._y"-
+~("my_demux.my_demux.reset_buf.a")->"my_demux.my_demux.reset_buf._y"+
+"my_demux.my_demux.reset_buf._y"->"my_demux.my_demux.reset_buf.y"-
+~("my_demux.my_demux.reset_buf._y")->"my_demux.my_demux.reset_buf.y"+
+= "my_demux.my_demux._out1_a_BX_t[0]" "my_demux.my_demux.out1_a_B_buf_f.out[0]"
+= "my_demux.my_demux._out1_a_BX_t[1]" "my_demux.my_demux.out1_a_B_buf_f.out[1]"
+= "my_demux.my_demux._out1_a_BX_t[0]" "my_demux.my_demux.out1_t_buf_func[1].c2"
+= "my_demux.my_demux._out1_a_BX_t[0]" "my_demux.my_demux.out1_t_buf_func[0].c2"
+= "my_demux.my_demux._out1_a_BX_t[0]" "my_demux.my_demux._out1_a_BX_t[1]"
+= "my_demux.my_demux._reset_BX" "my_demux.my_demux.reset_bufarray.in"
+= "my_demux.my_demux._reset_BX" "my_demux.my_demux.reset_buf_token.a"
+= "my_demux.my_demux._reset_BX" "my_demux.my_demux.reset_buf.y"
+= "my_demux.my_demux._reset_BX" "my_demux.my_demux.inack_ctl.sr_B"
+= "my_demux.my_demux._reset_BX" "my_demux.my_demux.inack_ctl.pr_B"
+= "my_demux.my_demux.reset_B" "my_demux.my_demux.reset_buf.a"
+"my_demux.my_demux.c_buf_tk.a"->"my_demux.my_demux.c_buf_tk._y"-
+~("my_demux.my_demux.c_buf_tk.a")->"my_demux.my_demux.c_buf_tk._y"+
+"my_demux.my_demux.c_buf_tk._y"->"my_demux.my_demux.c_buf_tk.y"-
+~("my_demux.my_demux.c_buf_tk._y")->"my_demux.my_demux.c_buf_tk.y"+
+= "my_demux.my_demux._en1_X_f[0]" "my_demux.my_demux.out1_en_buf_f.out[0]"
+= "my_demux.my_demux._en1_X_f[1]" "my_demux.my_demux.out1_en_buf_f.out[1]"
+= "my_demux.my_demux._en1_X_f[0]" "my_demux.my_demux.out1_f_buf_func[1].c1"
+= "my_demux.my_demux._en1_X_f[0]" "my_demux.my_demux.out1_f_buf_func[0].c1"
+= "my_demux.my_demux._en1_X_f[0]" "my_demux.my_demux._en1_X_f[1]"
+= "my_demux.my_demux._out_v" "my_demux.my_demux.en_ctl.p1"
+= "my_demux.my_demux._out_v" "my_demux.my_demux.inack_ctl.c3"
+= "my_demux.my_demux._out_v" "my_demux.my_demux.out_or.y"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.reset_bufarray.out[0]"
+= "my_demux.my_demux._reset_BXX[1]" "my_demux.my_demux.reset_bufarray.out[1]"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_f_buf_func[1].sr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_f_buf_func[1].pr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_t_buf_func[1].sr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_t_buf_func[1].pr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_f_buf_func[0].sr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_f_buf_func[0].pr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_t_buf_func[0].sr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux.out1_t_buf_func[0].pr_B"
+= "my_demux.my_demux._reset_BXX[0]" "my_demux.my_demux._reset_BXX[1]"
+"my_demux.my_demux.out1_en_buf_f.buf1.a"->"my_demux.my_demux.out1_en_buf_f.buf1._y"-
+~("my_demux.my_demux.out1_en_buf_f.buf1.a")->"my_demux.my_demux.out1_en_buf_f.buf1._y"+
+"my_demux.my_demux.out1_en_buf_f.buf1._y"->"my_demux.my_demux.out1_en_buf_f.buf1.y"-
+~("my_demux.my_demux.out1_en_buf_f.buf1._y")->"my_demux.my_demux.out1_en_buf_f.buf1.y"+
+= "my_demux.my_demux.out1_en_buf_f.supply.vdd" "my_demux.my_demux.out1_en_buf_f.buf1.vdd"
+= "my_demux.my_demux.out1_en_buf_f.supply.vss" "my_demux.my_demux.out1_en_buf_f.buf1.vss"
+= "my_demux.my_demux.out1_en_buf_f.out[0]" "my_demux.my_demux.out1_en_buf_f.out[1]"
+= "my_demux.my_demux.out1_en_buf_f.out[0]" "my_demux.my_demux.out1_en_buf_f.buf1.y"
+= "my_demux.my_demux.out1_en_buf_f.in" "my_demux.my_demux.out1_en_buf_f.buf1.a"
+= "my_demux.my_demux._out1_a_BX_f[0]" "my_demux.my_demux.out1_a_B_buf_t.out[0]"
+= "my_demux.my_demux._out1_a_BX_f[1]" "my_demux.my_demux.out1_a_B_buf_t.out[1]"
+= "my_demux.my_demux._out1_a_BX_f[0]" "my_demux.my_demux.out1_f_buf_func[1].c2"
+= "my_demux.my_demux._out1_a_BX_f[0]" "my_demux.my_demux.out1_f_buf_func[0].c2"
+= "my_demux.my_demux._out1_a_BX_f[0]" "my_demux.my_demux._out1_a_BX_f[1]"
+~"my_demux.my_demux.c_el.c1"&~"my_demux.my_demux.c_el.c2"->"my_demux.my_demux.c_el._y"+
+"my_demux.my_demux.c_el.c1"&"my_demux.my_demux.c_el.c2"->"my_demux.my_demux.c_el._y"-
+"my_demux.my_demux.c_el._y"->"my_demux.my_demux.c_el.y"-
+~("my_demux.my_demux.c_el._y")->"my_demux.my_demux.c_el.y"+
+= "my_demux.my_demux._en1_X_t[0]" "my_demux.my_demux.out1_en_buf_t.out[0]"
+= "my_demux.my_demux._en1_X_t[1]" "my_demux.my_demux.out1_en_buf_t.out[1]"
+= "my_demux.my_demux._en1_X_t[0]" "my_demux.my_demux.out1_t_buf_func[1].c1"
+= "my_demux.my_demux._en1_X_t[0]" "my_demux.my_demux.out1_t_buf_func[0].c1"
+= "my_demux.my_demux._en1_X_t[0]" "my_demux.my_demux._en1_X_t[1]"
+= "my_demux.my_demux.out1.d.d[0].d[0]" "my_demux.my_demux.out1.d.d[0].f"
+= "my_demux.my_demux.out1.d.d[0].d[1]" "my_demux.my_demux.out1.d.d[0].t"
+= "my_demux.my_demux.out1.d.d[1].d[0]" "my_demux.my_demux.out1.d.d[1].f"
+= "my_demux.my_demux.out1.d.d[1].d[1]" "my_demux.my_demux.out1.d.d[1].t"
+= "my_demux.my_demux.out1.d.d[1].d[0]" "my_demux.my_demux.out1.d.d[1].f"
+= "my_demux.my_demux.out1.d.d[1].d[1]" "my_demux.my_demux.out1.d.d[1].t"
+= "my_demux.my_demux.out1.d.d[0].d[0]" "my_demux.my_demux.out1.d.d[0].f"
+= "my_demux.my_demux.out1.d.d[0].d[1]" "my_demux.my_demux.out1.d.d[0].t"
+= "my_demux.my_demux.out1.d.d[1].d[0]" "my_demux.my_demux.out1.d.d[1].f"
+= "my_demux.my_demux.out1.d.d[1].d[1]" "my_demux.my_demux.out1.d.d[1].t"
+= "my_demux.my_demux.out1.d.d[0].d[0]" "my_demux.my_demux.out1.d.d[0].f"
+= "my_demux.my_demux.out1.d.d[0].d[1]" "my_demux.my_demux.out1.d.d[0].t"
+= "my_demux.my_demux.out1.a" "my_demux.my_demux.out1_a_inv.a"
+= "my_demux.my_demux.out1.v" "my_demux.my_demux.out_or.a"
+= "my_demux.my_demux.out1.d.d[1].d[0]" "my_demux.my_demux.out1_f_buf_func[1].y"
+= "my_demux.my_demux.out1.d.d[1].d[0]" "my_demux.my_demux.out1.d.d[1].f"
+= "my_demux.my_demux.out1.d.d[1].d[1]" "my_demux.my_demux.out1_t_buf_func[1].y"
+= "my_demux.my_demux.out1.d.d[1].d[1]" "my_demux.my_demux.out1.d.d[1].t"
+= "my_demux.my_demux.out1.d.d[0].d[0]" "my_demux.my_demux.out1_f_buf_func[0].y"
+= "my_demux.my_demux.out1.d.d[0].d[0]" "my_demux.my_demux.out1.d.d[0].f"
+= "my_demux.my_demux.out1.d.d[0].d[1]" "my_demux.my_demux.out1_t_buf_func[0].y"
+= "my_demux.my_demux.out1.d.d[0].d[1]" "my_demux.my_demux.out1.d.d[0].t"
+"my_demux.my_demux.c_f_c_t_or.a"|"my_demux.my_demux.c_f_c_t_or.b"->"my_demux.my_demux.c_f_c_t_or._y"-
+~("my_demux.my_demux.c_f_c_t_or.a"|"my_demux.my_demux.c_f_c_t_or.b")->"my_demux.my_demux.c_f_c_t_or._y"+
+"my_demux.my_demux.c_f_c_t_or._y"->"my_demux.my_demux.c_f_c_t_or.y"-
+~("my_demux.my_demux.c_f_c_t_or._y")->"my_demux.my_demux.c_f_c_t_or.y"+
+"my_demux.my_demux.in_v_buf.a"->"my_demux.my_demux.in_v_buf._y"-
+~("my_demux.my_demux.in_v_buf.a")->"my_demux.my_demux.in_v_buf._y"+
+"my_demux.my_demux.in_v_buf._y"->"my_demux.my_demux.in_v_buf.y"-
+~("my_demux.my_demux.in_v_buf._y")->"my_demux.my_demux.in_v_buf.y"+
+"my_demux.my_demux.out1_a_inv.a"->"my_demux.my_demux.out1_a_inv.y"-
+~("my_demux.my_demux.out1_a_inv.a")->"my_demux.my_demux.out1_a_inv.y"+
+= "my_demux.my_demux.token.d.d[0]" "my_demux.my_demux.token.r"
+= "my_demux.my_demux.token.a" "my_demux.my_demux.outt_a_inv.a"
+= "my_demux.my_demux.token.d.d[0]" "my_demux.my_demux.token_buf.y"
+= "my_demux.my_demux.token.d.d[0]" "my_demux.my_demux.out_or.b"
+= "my_demux.my_demux.token.d.d[0]" "my_demux.my_demux.token.r"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.out1_en_buf_f.supply.vss"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.out1_en_buf_f.supply.vdd"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.out1_en_buf_t.supply.vss"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.out1_en_buf_t.supply.vdd"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.vc.supply.vss"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.vc.supply.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.token_buf.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.out1_t_buf_func[1].vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.out1_f_buf_func[1].vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.out1_t_buf_func[0].vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.out1_f_buf_func[0].vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.in_v_buf.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.c_el.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.c_f_c_t_or.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.reset_buf_token.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.reset_buf.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.en_ctl.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.inack_ctl.vdd"
+= "my_demux.my_demux.supply.vdd" "my_demux.my_demux.out_or.vdd"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.token_buf.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.out1_t_buf_func[1].vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.out1_f_buf_func[1].vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.out1_t_buf_func[0].vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.out1_f_buf_func[0].vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.in_v_buf.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.c_el.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.c_f_c_t_or.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.reset_buf_token.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.reset_buf.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.en_ctl.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.inack_ctl.vss"
+= "my_demux.my_demux.supply.vss" "my_demux.my_demux.out_or.vss"
+~"my_demux.my_demux.vc.myctree.C2Els[0].c1"&~"my_demux.my_demux.vc.myctree.C2Els[0].c2"->"my_demux.my_demux.vc.myctree.C2Els[0]._y"+
+"my_demux.my_demux.vc.myctree.C2Els[0].c1"&"my_demux.my_demux.vc.myctree.C2Els[0].c2"->"my_demux.my_demux.vc.myctree.C2Els[0]._y"-
+"my_demux.my_demux.vc.myctree.C2Els[0]._y"->"my_demux.my_demux.vc.myctree.C2Els[0].y"-
+~("my_demux.my_demux.vc.myctree.C2Els[0]._y")->"my_demux.my_demux.vc.myctree.C2Els[0].y"+
+= "my_demux.my_demux.vc.myctree.supply.vdd" "my_demux.my_demux.vc.myctree.C2Els[0].vdd"
+= "my_demux.my_demux.vc.myctree.supply.vss" "my_demux.my_demux.vc.myctree.C2Els[0].vss"
+= "my_demux.my_demux.vc.myctree.in[0]" "my_demux.my_demux.vc.myctree.C2Els[0].c1"
+= "my_demux.my_demux.vc.myctree.in[0]" "my_demux.my_demux.vc.myctree.tmp[0]"
+= "my_demux.my_demux.vc.myctree.in[1]" "my_demux.my_demux.vc.myctree.C2Els[0].c2"
+= "my_demux.my_demux.vc.myctree.in[1]" "my_demux.my_demux.vc.myctree.tmp[1]"
+= "my_demux.my_demux.vc.myctree.out" "my_demux.my_demux.vc.myctree.C2Els[0].y"
+= "my_demux.my_demux.vc.myctree.out" "my_demux.my_demux.vc.myctree.tmp[2]"
+"my_demux.my_demux.vc.OR2_tf[0].a"|"my_demux.my_demux.vc.OR2_tf[0].b"->"my_demux.my_demux.vc.OR2_tf[0]._y"-
+~("my_demux.my_demux.vc.OR2_tf[0].a"|"my_demux.my_demux.vc.OR2_tf[0].b")->"my_demux.my_demux.vc.OR2_tf[0]._y"+
+"my_demux.my_demux.vc.OR2_tf[0]._y"->"my_demux.my_demux.vc.OR2_tf[0].y"-
+~("my_demux.my_demux.vc.OR2_tf[0]._y")->"my_demux.my_demux.vc.OR2_tf[0].y"+
+"my_demux.my_demux.vc.OR2_tf[1].a"|"my_demux.my_demux.vc.OR2_tf[1].b"->"my_demux.my_demux.vc.OR2_tf[1]._y"-
+~("my_demux.my_demux.vc.OR2_tf[1].a"|"my_demux.my_demux.vc.OR2_tf[1].b")->"my_demux.my_demux.vc.OR2_tf[1]._y"+
+"my_demux.my_demux.vc.OR2_tf[1]._y"->"my_demux.my_demux.vc.OR2_tf[1].y"-
+~("my_demux.my_demux.vc.OR2_tf[1]._y")->"my_demux.my_demux.vc.OR2_tf[1].y"+
+= "my_demux.my_demux.vc.OR2_tf[1].y" "my_demux.my_demux.vc.myctree.in[1]"
+= "my_demux.my_demux.vc.OR2_tf[0].y" "my_demux.my_demux.vc.myctree.in[0]"
+= "my_demux.my_demux.vc.supply.vss" "my_demux.my_demux.vc.myctree.supply.vss"
+= "my_demux.my_demux.vc.supply.vdd" "my_demux.my_demux.vc.myctree.supply.vdd"
+= "my_demux.my_demux.vc.supply.vdd" "my_demux.my_demux.vc.OR2_tf[1].vdd"
+= "my_demux.my_demux.vc.supply.vdd" "my_demux.my_demux.vc.OR2_tf[0].vdd"
+= "my_demux.my_demux.vc.supply.vss" "my_demux.my_demux.vc.OR2_tf[1].vss"
+= "my_demux.my_demux.vc.supply.vss" "my_demux.my_demux.vc.OR2_tf[0].vss"
+= "my_demux.my_demux.vc.out" "my_demux.my_demux.vc.myctree.out"
+= "my_demux.my_demux.vc.in.d[0].d[0]" "my_demux.my_demux.vc.in.d[0].f"
+= "my_demux.my_demux.vc.in.d[0].d[1]" "my_demux.my_demux.vc.in.d[0].t"
+= "my_demux.my_demux.vc.in.d[1].d[0]" "my_demux.my_demux.vc.in.d[1].f"
+= "my_demux.my_demux.vc.in.d[1].d[1]" "my_demux.my_demux.vc.in.d[1].t"
+= "my_demux.my_demux.vc.in.d[1].d[0]" "my_demux.my_demux.vc.in.d[1].f"
+= "my_demux.my_demux.vc.in.d[1].d[1]" "my_demux.my_demux.vc.in.d[1].t"
+= "my_demux.my_demux.vc.in.d[0].d[0]" "my_demux.my_demux.vc.in.d[0].f"
+= "my_demux.my_demux.vc.in.d[0].d[1]" "my_demux.my_demux.vc.in.d[0].t"
+= "my_demux.my_demux.vc.in.d[1].d[0]" "my_demux.my_demux.vc.OR2_tf[1].b"
+= "my_demux.my_demux.vc.in.d[1].d[0]" "my_demux.my_demux.vc.in.d[1].f"
+= "my_demux.my_demux.vc.in.d[1].d[1]" "my_demux.my_demux.vc.OR2_tf[1].a"
+= "my_demux.my_demux.vc.in.d[1].d[1]" "my_demux.my_demux.vc.in.d[1].t"
+= "my_demux.my_demux.vc.in.d[0].d[0]" "my_demux.my_demux.vc.OR2_tf[0].b"
+= "my_demux.my_demux.vc.in.d[0].d[0]" "my_demux.my_demux.vc.in.d[0].f"
+= "my_demux.my_demux.vc.in.d[0].d[1]" "my_demux.my_demux.vc.OR2_tf[0].a"
+= "my_demux.my_demux.vc.in.d[0].d[1]" "my_demux.my_demux.vc.in.d[0].t"
+"my_demux.my_demux.out1_a_B_buf_t.buf1.a"->"my_demux.my_demux.out1_a_B_buf_t.buf1._y"-
+~("my_demux.my_demux.out1_a_B_buf_t.buf1.a")->"my_demux.my_demux.out1_a_B_buf_t.buf1._y"+
+"my_demux.my_demux.out1_a_B_buf_t.buf1._y"->"my_demux.my_demux.out1_a_B_buf_t.buf1.y"-
+~("my_demux.my_demux.out1_a_B_buf_t.buf1._y")->"my_demux.my_demux.out1_a_B_buf_t.buf1.y"+
+= "my_demux.my_demux.out1_a_B_buf_t.supply.vdd" "my_demux.my_demux.out1_a_B_buf_t.buf1.vdd"
+= "my_demux.my_demux.out1_a_B_buf_t.supply.vss" "my_demux.my_demux.out1_a_B_buf_t.buf1.vss"
+= "my_demux.my_demux.out1_a_B_buf_t.out[0]" "my_demux.my_demux.out1_a_B_buf_t.out[1]"
+= "my_demux.my_demux.out1_a_B_buf_t.out[0]" "my_demux.my_demux.out1_a_B_buf_t.buf1.y"
+= "my_demux.my_demux.out1_a_B_buf_t.in" "my_demux.my_demux.out1_a_B_buf_t.buf1.a"
+~"my_demux.my_demux.en_ctl.p1"&~"my_demux.my_demux.en_ctl.c1"->"my_demux.my_demux.en_ctl.y"+
+"my_demux.my_demux.en_ctl.c1"->"my_demux.my_demux.en_ctl.y"-
+= "my_demux.my_demux._reset_BXt" "my_demux.my_demux.token_buf.sr_B"
+= "my_demux.my_demux._reset_BXt" "my_demux.my_demux.token_buf.pr_B"
+= "my_demux.my_demux._reset_BXt" "my_demux.my_demux.reset_buf_token.y"
+= "my_demux.my_demux.cond.d.d[0].d[0]" "my_demux.my_demux.cond.d.d[0].f"
+= "my_demux.my_demux.cond.d.d[0].d[1]" "my_demux.my_demux.cond.d.d[0].t"
+= "my_demux.my_demux.cond.d.d[0].d[0]" "my_demux.my_demux.cond.d.d[0].f"
+= "my_demux.my_demux.cond.d.d[0].d[1]" "my_demux.my_demux.cond.d.d[0].t"
+= "my_demux.my_demux.cond.d.d[0].d[0]" "my_demux.my_demux.cond.d.d[0].f"
+= "my_demux.my_demux.cond.d.d[0].d[1]" "my_demux.my_demux.cond.d.d[0].t"
+= "my_demux.my_demux.cond.d.d[0].d[0]" "my_demux.my_demux.c_buf_d.in"
+= "my_demux.my_demux.cond.d.d[0].d[0]" "my_demux.my_demux.c_f_c_t_or.b"
+= "my_demux.my_demux.cond.d.d[0].d[0]" "my_demux.my_demux.cond.d.d[0].f"
+= "my_demux.my_demux.cond.d.d[0].d[1]" "my_demux.my_demux.c_buf_tk.a"
+= "my_demux.my_demux.cond.d.d[0].d[1]" "my_demux.my_demux.c_f_c_t_or.a"
+= "my_demux.my_demux.cond.d.d[0].d[1]" "my_demux.my_demux.cond.d.d[0].t"
+~"my_demux.my_demux.out1_f_buf_func[0].c1"&~"my_demux.my_demux.out1_f_buf_func[0].c2"|~"my_demux.my_demux.out1_f_buf_func[0].pr_B"->"my_demux.my_demux.out1_f_buf_func[0]._y"+
+"my_demux.my_demux.out1_f_buf_func[0].c1"&"my_demux.my_demux.out1_f_buf_func[0].c2"&"my_demux.my_demux.out1_f_buf_func[0].n1"&"my_demux.my_demux.out1_f_buf_func[0].n2"&"my_demux.my_demux.out1_f_buf_func[0].sr_B"->"my_demux.my_demux.out1_f_buf_func[0]._y"-
+"my_demux.my_demux.out1_f_buf_func[0]._y"->"my_demux.my_demux.out1_f_buf_func[0].y"-
+~("my_demux.my_demux.out1_f_buf_func[0]._y")->"my_demux.my_demux.out1_f_buf_func[0].y"+
+~"my_demux.my_demux.out1_f_buf_func[1].c1"&~"my_demux.my_demux.out1_f_buf_func[1].c2"|~"my_demux.my_demux.out1_f_buf_func[1].pr_B"->"my_demux.my_demux.out1_f_buf_func[1]._y"+
+"my_demux.my_demux.out1_f_buf_func[1].c1"&"my_demux.my_demux.out1_f_buf_func[1].c2"&"my_demux.my_demux.out1_f_buf_func[1].n1"&"my_demux.my_demux.out1_f_buf_func[1].n2"&"my_demux.my_demux.out1_f_buf_func[1].sr_B"->"my_demux.my_demux.out1_f_buf_func[1]._y"-
+"my_demux.my_demux.out1_f_buf_func[1]._y"->"my_demux.my_demux.out1_f_buf_func[1].y"-
+~("my_demux.my_demux.out1_f_buf_func[1]._y")->"my_demux.my_demux.out1_f_buf_func[1].y"+
+= "my_demux.my_demux._in_v" "my_demux.my_demux.token_buf.n2"
+= "my_demux.my_demux._in_v" "my_demux.my_demux.in_v_buf.a"
+= "my_demux.my_demux._in_v" "my_demux.my_demux.c_el.c2"
+= "my_demux.my_demux._in_v" "my_demux.my_demux.vc.out"
+~"my_demux.my_demux.out1_t_buf_func[0].c1"&~"my_demux.my_demux.out1_t_buf_func[0].c2"|~"my_demux.my_demux.out1_t_buf_func[0].pr_B"->"my_demux.my_demux.out1_t_buf_func[0]._y"+
+"my_demux.my_demux.out1_t_buf_func[0].c1"&"my_demux.my_demux.out1_t_buf_func[0].c2"&"my_demux.my_demux.out1_t_buf_func[0].n1"&"my_demux.my_demux.out1_t_buf_func[0].n2"&"my_demux.my_demux.out1_t_buf_func[0].sr_B"->"my_demux.my_demux.out1_t_buf_func[0]._y"-
+"my_demux.my_demux.out1_t_buf_func[0]._y"->"my_demux.my_demux.out1_t_buf_func[0].y"-
+~("my_demux.my_demux.out1_t_buf_func[0]._y")->"my_demux.my_demux.out1_t_buf_func[0].y"+
+~"my_demux.my_demux.out1_t_buf_func[1].c1"&~"my_demux.my_demux.out1_t_buf_func[1].c2"|~"my_demux.my_demux.out1_t_buf_func[1].pr_B"->"my_demux.my_demux.out1_t_buf_func[1]._y"+
+"my_demux.my_demux.out1_t_buf_func[1].c1"&"my_demux.my_demux.out1_t_buf_func[1].c2"&"my_demux.my_demux.out1_t_buf_func[1].n1"&"my_demux.my_demux.out1_t_buf_func[1].n2"&"my_demux.my_demux.out1_t_buf_func[1].sr_B"->"my_demux.my_demux.out1_t_buf_func[1]._y"-
+"my_demux.my_demux.out1_t_buf_func[1]._y"->"my_demux.my_demux.out1_t_buf_func[1].y"-
+~("my_demux.my_demux.out1_t_buf_func[1]._y")->"my_demux.my_demux.out1_t_buf_func[1].y"+
+"my_demux.my_demux.c_buf_d.buf1.a"->"my_demux.my_demux.c_buf_d.buf1._y"-
+~("my_demux.my_demux.c_buf_d.buf1.a")->"my_demux.my_demux.c_buf_d.buf1._y"+
+"my_demux.my_demux.c_buf_d.buf1._y"->"my_demux.my_demux.c_buf_d.buf1.y"-
+~("my_demux.my_demux.c_buf_d.buf1._y")->"my_demux.my_demux.c_buf_d.buf1.y"+
+= "my_demux.my_demux.c_buf_d.supply.vdd" "my_demux.my_demux.c_buf_d.buf1.vdd"
+= "my_demux.my_demux.c_buf_d.supply.vss" "my_demux.my_demux.c_buf_d.buf1.vss"
+= "my_demux.my_demux.c_buf_d.out[0]" "my_demux.my_demux.c_buf_d.out[1]"
+= "my_demux.my_demux.c_buf_d.out[0]" "my_demux.my_demux.c_buf_d.buf1.y"
+= "my_demux.my_demux.c_buf_d.in" "my_demux.my_demux.c_buf_d.buf1.a"
+"my_demux.my_demux.outt_a_inv.a"->"my_demux.my_demux.outt_a_inv.y"-
+~("my_demux.my_demux.outt_a_inv.a")->"my_demux.my_demux.outt_a_inv.y"+
+= "my_demux.my_demux._c_tk_buf" "my_demux.my_demux.token_buf.n1"
+= "my_demux.my_demux._c_tk_buf" "my_demux.my_demux.c_buf_tk.y"
+= "Vdd" "my_demux.my_demux.supply.vdd"
+= "GND" "my_demux.my_demux.supply.vss"
+= "my_demux.token.d.d[0]" "my_demux.token.r"
+= "my_demux.token.r" "my_demux.my_demux.token.r"
+= "my_demux.token.a" "my_demux.my_demux.token.a"
+= "my_demux.token.d.d[0]" "my_demux.my_demux.token.d.d[0]"
+= "my_demux.token.d.d[0]" "my_demux.token.r"
+= "my_demux.in.d.d[0].d[0]" "my_demux.in.d.d[0].f"
+= "my_demux.in.d.d[0].d[1]" "my_demux.in.d.d[0].t"
+= "my_demux.in.d.d[1].d[0]" "my_demux.in.d.d[1].f"
+= "my_demux.in.d.d[1].d[1]" "my_demux.in.d.d[1].t"
+= "my_demux.in.d.d[1].d[0]" "my_demux.in.d.d[1].f"
+= "my_demux.in.d.d[1].d[1]" "my_demux.in.d.d[1].t"
+= "my_demux.in.d.d[0].d[0]" "my_demux.in.d.d[0].f"
+= "my_demux.in.d.d[0].d[1]" "my_demux.in.d.d[0].t"
+= "my_demux.in.d.d[1].d[0]" "my_demux.in.d.d[1].f"
+= "my_demux.in.d.d[1].d[1]" "my_demux.in.d.d[1].t"
+= "my_demux.in.d.d[0].d[0]" "my_demux.in.d.d[0].f"
+= "my_demux.in.d.d[0].d[1]" "my_demux.in.d.d[0].t"
+= "my_demux.in.v" "my_demux.my_demux.in.v"
+= "my_demux.in.a" "my_demux.my_demux.in.a"
+= "my_demux.in.d.d[0].f" "my_demux.my_demux.in.d.d[0].f"
+= "my_demux.in.d.d[0].t" "my_demux.my_demux.in.d.d[0].t"
+= "my_demux.in.d.d[0].d[0]" "my_demux.my_demux.in.d.d[0].d[0]"
+= "my_demux.in.d.d[0].d[1]" "my_demux.my_demux.in.d.d[0].d[1]"
+= "my_demux.in.d.d[1].f" "my_demux.my_demux.in.d.d[1].f"
+= "my_demux.in.d.d[1].t" "my_demux.my_demux.in.d.d[1].t"
+= "my_demux.in.d.d[1].d[0]" "my_demux.my_demux.in.d.d[1].d[0]"
+= "my_demux.in.d.d[1].d[1]" "my_demux.my_demux.in.d.d[1].d[1]"
+= "my_demux.in.d.d[1].d[0]" "my_demux.in.d.d[1].f"
+= "my_demux.in.d.d[1].d[1]" "my_demux.in.d.d[1].t"
+= "my_demux.in.d.d[0].d[0]" "my_demux.in.d.d[0].f"
+= "my_demux.in.d.d[0].d[1]" "my_demux.in.d.d[0].t"

test/unit_tests/demux_td_2_SIGN/test.act

@@ -0,0 +1,50 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/primitives.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+
+defproc demux_2 (avMx1of2<2> in; avMx1of2<2> out1; a1of1 token; avMx1of2<1> cond){
+
+    demux_td<2, true> my_demux(.in=in, .out1=out1,.token = token, .cond = cond);
+    //Low active Reset 
+    bool _reset_B; 
+    prs {
+    	Reset => _reset_B-
+    }
+    my_demux.supply.vss = GND;
+    my_demux.supply.vdd = Vdd;
+    my_demux.reset_B = _reset_B;
+    
+    
+}
+
+demux_2 my_demux;

test/unit_tests/demux_td_2_SIGN/test.prsim

@@ -0,0 +1,84 @@
+watchall
+set-qdi-channel-neutral "my_demux.in" 2
+set my_demux.out1.a 0
+set my_demux.out1.v 0
+set my_demux.token.a 0
+set my_demux.token.r 0
+set my_demux.cond.d.d[0].t 0
+set my_demux.cond.d.d[0].f 0
+cycle
+system "echo 'System initialized'"
+
+set Reset 0
+cycle
+system "echo 'System reset completed'"
+status X
+mode run
+
+assert-qdi-channel-neutral "my_demux.out1" 2
+assert-qdi-channel-neutral "my_demux.in" 2
+cycle
+
+system "echo 'Output neutral checked'"
+
+set my_demux.cond.d.d[0].t 0
+set my_demux.cond.d.d[0].f 1
+set-qdi-channel-valid "my_demux.in" 2 3
+cycle
+assert my_demux.in.v 1
+assert my_demux.in.a 0
+
+assert-qdi-channel-valid "my_demux.out1" 2 3
+assert my_demux.token.a 0
+set my_demux.out1.v 1
+cycle
+
+assert my_demux.in.a 1
+set-qdi-channel-neutral "my_demux.in" 2
+cycle
+set my_demux.out1.a 1
+
+
+system "echo 'First Cond Checked'"
+
+set my_demux.out1.a 0
+set my_demux.out1.v 0
+set my_demux.token.a 0
+set my_demux.token.r 0
+set my_demux.cond.d.d[0].t 0
+set my_demux.cond.d.d[0].f 0
+cycle
+
+system "echo 'System initialized'"
+
+set my_demux.cond.d.d[0].t 1
+set my_demux.cond.d.d[0].f 0
+set-qdi-channel-valid "my_demux.in" 2 3
+cycle
+assert my_demux.in.v 1
+assert my_demux.in.a 1
+assert my_demux.token.r 1
+
+set my_demux.token.a 1
+set my_demux.out1.a 1
+cycle
+
+assert my_demux.token.r 0
+
+set my_demux.token.a 0
+set-qdi-channel-neutral "my_demux.in" 2
+cycle
+
+assert my_demux.in.v 0
+
+set my_demux.cond.d.d[0].t 0
+set my_demux.cond.d.d[0].f 0
+cycle
+
+assert my_demux.in.a 0
+
+
+
+
+
+

test/unit_tests/fifo3_8bit/test.act

@@ -0,0 +1,9 @@
+import tmpl::dataflow_neuro
+
+defproc fifo3_8bit (avMx1of2<8> A; avMx1of2<8> Y)
+{
+  avMx1of2<8> _0to1,_1to2;
+  buffer<8> buf0 (.in=A, .out=_0to1);
+  buffer<8> buf1 (.in=_0to1, .out=_1to2);
+  buffer<8> buf2 (.in=_1to2, .out=Y);
+}

test/unit_tests/fifo3_8bit/test.prsim

@@ -0,0 +1,39 @@
+
+set-channel-neutral "t.A" 8
+set t.Y.a 0
+
+cycle
+system "echo 'reset completed'"
+status X
+mode run
+cycle
+
+assert t.A.a 0
+assert-channel-neutral "t.Y" 8
+
+set-channel-valid "t.A" 8 2
+
+system "echo 'sending first set A'"
+cycle
+assert t.A.a 1
+set-channel-neutral "t.A" 8
+cycle
+assert t.A.a 0
+
+system "echo 'checking first set'"
+assert-channel-valid "t.Y" 8 2
+set t.Y.a 1
+
+cycle
+assert-channel-neutral "t.Y" 8
+set t.Y.a 0
+
+system "echo 'sending second set'"
+set-channel-valid "t.A" 8 95
+cycle
+assert t.A.a 1
+set-channel-neutral "t.A" 8
+cycle
+system "echo 'checking second set'"
+assert t.A.a 0
+assert-channel-valid "t.Y" 8 95

test/unit_tests/fifo_t_15/run/test.prs

@@ -0,0 +1,922 @@
+= "GND" "GND"
+= "Vdd" "Vdd"
+= "Reset" "Reset"
+"t.a.reset_bufarray.buf6.a"->"t.a.reset_bufarray.buf6._y"-
+~("t.a.reset_bufarray.buf6.a")->"t.a.reset_bufarray.buf6._y"+
+"t.a.reset_bufarray.buf6._y"->"t.a.reset_bufarray.buf6.y"-
+~("t.a.reset_bufarray.buf6._y")->"t.a.reset_bufarray.buf6.y"+
+= "t.a.reset_bufarray.supply.vdd" "t.a.reset_bufarray.buf6.vdd"
+= "t.a.reset_bufarray.supply.vss" "t.a.reset_bufarray.buf6.vss"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[14]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[13]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[12]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[11]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[10]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[9]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[8]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[7]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[6]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[5]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[4]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[3]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[2]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[1]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.buf6.y"
+= "t.a.reset_bufarray.in" "t.a.reset_bufarray.buf6.a"
+"t.a.reset_buf.a"->"t.a.reset_buf._y"-
+~("t.a.reset_buf.a")->"t.a.reset_buf._y"+
+"t.a.reset_buf._y"->"t.a.reset_buf.y"-
+~("t.a.reset_buf._y")->"t.a.reset_buf.y"+
+= "t.a.reset_B" "t.a.reset_buf.a"
+= "t.a.supply.vss" "t.a.fifo_element[14].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[14].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[13].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[13].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[12].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[12].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[11].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[11].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[10].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[10].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[9].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[9].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[8].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[8].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[7].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[7].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[6].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[6].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[5].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[5].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[4].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[4].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[3].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[3].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[2].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[2].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[1].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[1].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[0].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[0].supply.vdd"
+= "t.a.supply.vdd" "t.a.reset_buf.vdd"
+= "t.a.supply.vss" "t.a.reset_buf.vss"
+= "t.a._reset_BX" "t.a.reset_bufarray.in"
+= "t.a._reset_BX" "t.a.reset_buf.y"
+"t.a.fifo_element[0].reset_buf.a"->"t.a.fifo_element[0].reset_buf._y"-
+~("t.a.fifo_element[0].reset_buf.a")->"t.a.fifo_element[0].reset_buf._y"+
+"t.a.fifo_element[0].reset_buf._y"->"t.a.fifo_element[0].reset_buf.y"-
+~("t.a.fifo_element[0].reset_buf._y")->"t.a.fifo_element[0].reset_buf.y"+
+"t.a.fifo_element[0].inv_outa.a"->"t.a.fifo_element[0].inv_outa.y"-
+~("t.a.fifo_element[0].inv_outa.a")->"t.a.fifo_element[0].inv_outa.y"+
+~"t.a.fifo_element[0].inack_ctl.c1"&~"t.a.fifo_element[0].inack_ctl.c2"|~"t.a.fifo_element[0].inack_ctl.pr_B"->"t.a.fifo_element[0].inack_ctl._y"+
+"t.a.fifo_element[0].inack_ctl.c1"&"t.a.fifo_element[0].inack_ctl.c2"&"t.a.fifo_element[0].inack_ctl.n1"&"t.a.fifo_element[0].inack_ctl.sr_B"->"t.a.fifo_element[0].inack_ctl._y"-
+"t.a.fifo_element[0].inack_ctl._y"->"t.a.fifo_element[0].inack_ctl.y"-
+~("t.a.fifo_element[0].inack_ctl._y")->"t.a.fifo_element[0].inack_ctl.y"+
+~"t.a.fifo_element[0].buf_func.c1"&~"t.a.fifo_element[0].buf_func.c2"|~"t.a.fifo_element[0].buf_func.pr_B"->"t.a.fifo_element[0].buf_func._y"+
+"t.a.fifo_element[0].buf_func.c1"&"t.a.fifo_element[0].buf_func.c2"&"t.a.fifo_element[0].buf_func.n1"&"t.a.fifo_element[0].buf_func.sr_B"->"t.a.fifo_element[0].buf_func._y"-
+"t.a.fifo_element[0].buf_func._y"->"t.a.fifo_element[0].buf_func.y"-
+~("t.a.fifo_element[0].buf_func._y")->"t.a.fifo_element[0].buf_func.y"+
+= "t.a.fifo_element[0].reset_B" "t.a.fifo_element[0].reset_buf.a"
+= "t.a.fifo_element[0].supply.vdd" "t.a.fifo_element[0].reset_buf.vdd"
+= "t.a.fifo_element[0].supply.vdd" "t.a.fifo_element[0].buf_func.vdd"
+= "t.a.fifo_element[0].supply.vdd" "t.a.fifo_element[0].inv_outa.vdd"
+= "t.a.fifo_element[0].supply.vdd" "t.a.fifo_element[0].en_ctl.vdd"
+= "t.a.fifo_element[0].supply.vdd" "t.a.fifo_element[0].inack_ctl.vdd"
+= "t.a.fifo_element[0].supply.vss" "t.a.fifo_element[0].reset_buf.vss"
+= "t.a.fifo_element[0].supply.vss" "t.a.fifo_element[0].buf_func.vss"
+= "t.a.fifo_element[0].supply.vss" "t.a.fifo_element[0].inv_outa.vss"
+= "t.a.fifo_element[0].supply.vss" "t.a.fifo_element[0].en_ctl.vss"
+= "t.a.fifo_element[0].supply.vss" "t.a.fifo_element[0].inack_ctl.vss"
+= "t.a.fifo_element[0]._reset_BX" "t.a.fifo_element[0].reset_buf.y"
+= "t.a.fifo_element[0]._reset_BX" "t.a.fifo_element[0].buf_func.sr_B"
+= "t.a.fifo_element[0]._reset_BX" "t.a.fifo_element[0].buf_func.pr_B"
+= "t.a.fifo_element[0]._reset_BX" "t.a.fifo_element[0].inack_ctl.sr_B"
+= "t.a.fifo_element[0]._reset_BX" "t.a.fifo_element[0].inack_ctl.pr_B"
+= "t.a.fifo_element[0]._en" "t.a.fifo_element[0].buf_func.c1"
+= "t.a.fifo_element[0]._en" "t.a.fifo_element[0].en_ctl.y"
+= "t.a.fifo_element[0]._en" "t.a.fifo_element[0].inack_ctl.c1"
+~"t.a.fifo_element[0].en_ctl.p1"&~"t.a.fifo_element[0].en_ctl.c1"->"t.a.fifo_element[0].en_ctl.y"+
+"t.a.fifo_element[0].en_ctl.c1"->"t.a.fifo_element[0].en_ctl.y"-
+= "t.a.fifo_element[0]._out_a_B" "t.a.fifo_element[0].buf_func.c2"
+= "t.a.fifo_element[0]._out_a_B" "t.a.fifo_element[0].inv_outa.y"
+= "t.a.fifo_element[0].in.d.d[0]" "t.a.fifo_element[0].in.r"
+= "t.a.fifo_element[0].in.a" "t.a.fifo_element[0].en_ctl.c1"
+= "t.a.fifo_element[0].in.a" "t.a.fifo_element[0].inack_ctl.y"
+= "t.a.fifo_element[0].in.d.d[0]" "t.a.fifo_element[0].buf_func.n1"
+= "t.a.fifo_element[0].in.d.d[0]" "t.a.fifo_element[0].inack_ctl.c2"
+= "t.a.fifo_element[0].in.d.d[0]" "t.a.fifo_element[0].in.r"
+= "t.a.fifo_element[0].out.d.d[0]" "t.a.fifo_element[0].out.r"
+= "t.a.fifo_element[0].out.a" "t.a.fifo_element[0].inv_outa.a"
+= "t.a.fifo_element[0].out.d.d[0]" "t.a.fifo_element[0].buf_func.y"
+= "t.a.fifo_element[0].out.d.d[0]" "t.a.fifo_element[0].en_ctl.p1"
+= "t.a.fifo_element[0].out.d.d[0]" "t.a.fifo_element[0].inack_ctl.n1"
+= "t.a.fifo_element[0].out.d.d[0]" "t.a.fifo_element[0].out.r"
+"t.a.fifo_element[1].reset_buf.a"->"t.a.fifo_element[1].reset_buf._y"-
+~("t.a.fifo_element[1].reset_buf.a")->"t.a.fifo_element[1].reset_buf._y"+
+"t.a.fifo_element[1].reset_buf._y"->"t.a.fifo_element[1].reset_buf.y"-
+~("t.a.fifo_element[1].reset_buf._y")->"t.a.fifo_element[1].reset_buf.y"+
+"t.a.fifo_element[1].inv_outa.a"->"t.a.fifo_element[1].inv_outa.y"-
+~("t.a.fifo_element[1].inv_outa.a")->"t.a.fifo_element[1].inv_outa.y"+
+~"t.a.fifo_element[1].inack_ctl.c1"&~"t.a.fifo_element[1].inack_ctl.c2"|~"t.a.fifo_element[1].inack_ctl.pr_B"->"t.a.fifo_element[1].inack_ctl._y"+
+"t.a.fifo_element[1].inack_ctl.c1"&"t.a.fifo_element[1].inack_ctl.c2"&"t.a.fifo_element[1].inack_ctl.n1"&"t.a.fifo_element[1].inack_ctl.sr_B"->"t.a.fifo_element[1].inack_ctl._y"-
+"t.a.fifo_element[1].inack_ctl._y"->"t.a.fifo_element[1].inack_ctl.y"-
+~("t.a.fifo_element[1].inack_ctl._y")->"t.a.fifo_element[1].inack_ctl.y"+
+~"t.a.fifo_element[1].buf_func.c1"&~"t.a.fifo_element[1].buf_func.c2"|~"t.a.fifo_element[1].buf_func.pr_B"->"t.a.fifo_element[1].buf_func._y"+
+"t.a.fifo_element[1].buf_func.c1"&"t.a.fifo_element[1].buf_func.c2"&"t.a.fifo_element[1].buf_func.n1"&"t.a.fifo_element[1].buf_func.sr_B"->"t.a.fifo_element[1].buf_func._y"-
+"t.a.fifo_element[1].buf_func._y"->"t.a.fifo_element[1].buf_func.y"-
+~("t.a.fifo_element[1].buf_func._y")->"t.a.fifo_element[1].buf_func.y"+
+= "t.a.fifo_element[1].reset_B" "t.a.fifo_element[1].reset_buf.a"
+= "t.a.fifo_element[1].supply.vdd" "t.a.fifo_element[1].reset_buf.vdd"
+= "t.a.fifo_element[1].supply.vdd" "t.a.fifo_element[1].buf_func.vdd"
+= "t.a.fifo_element[1].supply.vdd" "t.a.fifo_element[1].inv_outa.vdd"
+= "t.a.fifo_element[1].supply.vdd" "t.a.fifo_element[1].en_ctl.vdd"
+= "t.a.fifo_element[1].supply.vdd" "t.a.fifo_element[1].inack_ctl.vdd"
+= "t.a.fifo_element[1].supply.vss" "t.a.fifo_element[1].reset_buf.vss"
+= "t.a.fifo_element[1].supply.vss" "t.a.fifo_element[1].buf_func.vss"
+= "t.a.fifo_element[1].supply.vss" "t.a.fifo_element[1].inv_outa.vss"
+= "t.a.fifo_element[1].supply.vss" "t.a.fifo_element[1].en_ctl.vss"
+= "t.a.fifo_element[1].supply.vss" "t.a.fifo_element[1].inack_ctl.vss"
+= "t.a.fifo_element[1]._reset_BX" "t.a.fifo_element[1].reset_buf.y"
+= "t.a.fifo_element[1]._reset_BX" "t.a.fifo_element[1].buf_func.sr_B"
+= "t.a.fifo_element[1]._reset_BX" "t.a.fifo_element[1].buf_func.pr_B"
+= "t.a.fifo_element[1]._reset_BX" "t.a.fifo_element[1].inack_ctl.sr_B"
+= "t.a.fifo_element[1]._reset_BX" "t.a.fifo_element[1].inack_ctl.pr_B"
+= "t.a.fifo_element[1]._en" "t.a.fifo_element[1].buf_func.c1"
+= "t.a.fifo_element[1]._en" "t.a.fifo_element[1].en_ctl.y"
+= "t.a.fifo_element[1]._en" "t.a.fifo_element[1].inack_ctl.c1"
+~"t.a.fifo_element[1].en_ctl.p1"&~"t.a.fifo_element[1].en_ctl.c1"->"t.a.fifo_element[1].en_ctl.y"+
+"t.a.fifo_element[1].en_ctl.c1"->"t.a.fifo_element[1].en_ctl.y"-
+= "t.a.fifo_element[1]._out_a_B" "t.a.fifo_element[1].buf_func.c2"
+= "t.a.fifo_element[1]._out_a_B" "t.a.fifo_element[1].inv_outa.y"
+= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[1].in.r"
+= "t.a.fifo_element[1].in.a" "t.a.fifo_element[1].en_ctl.c1"
+= "t.a.fifo_element[1].in.a" "t.a.fifo_element[1].inack_ctl.y"
+= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[1].buf_func.n1"
+= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[1].inack_ctl.c2"
+= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[1].in.r"
+= "t.a.fifo_element[1].out.d.d[0]" "t.a.fifo_element[1].out.r"
+= "t.a.fifo_element[1].out.a" "t.a.fifo_element[1].inv_outa.a"
+= "t.a.fifo_element[1].out.d.d[0]" "t.a.fifo_element[1].buf_func.y"
+= "t.a.fifo_element[1].out.d.d[0]" "t.a.fifo_element[1].en_ctl.p1"
+= "t.a.fifo_element[1].out.d.d[0]" "t.a.fifo_element[1].inack_ctl.n1"
+= "t.a.fifo_element[1].out.d.d[0]" "t.a.fifo_element[1].out.r"
+"t.a.fifo_element[2].reset_buf.a"->"t.a.fifo_element[2].reset_buf._y"-
+~("t.a.fifo_element[2].reset_buf.a")->"t.a.fifo_element[2].reset_buf._y"+
+"t.a.fifo_element[2].reset_buf._y"->"t.a.fifo_element[2].reset_buf.y"-
+~("t.a.fifo_element[2].reset_buf._y")->"t.a.fifo_element[2].reset_buf.y"+
+"t.a.fifo_element[2].inv_outa.a"->"t.a.fifo_element[2].inv_outa.y"-
+~("t.a.fifo_element[2].inv_outa.a")->"t.a.fifo_element[2].inv_outa.y"+
+~"t.a.fifo_element[2].inack_ctl.c1"&~"t.a.fifo_element[2].inack_ctl.c2"|~"t.a.fifo_element[2].inack_ctl.pr_B"->"t.a.fifo_element[2].inack_ctl._y"+
+"t.a.fifo_element[2].inack_ctl.c1"&"t.a.fifo_element[2].inack_ctl.c2"&"t.a.fifo_element[2].inack_ctl.n1"&"t.a.fifo_element[2].inack_ctl.sr_B"->"t.a.fifo_element[2].inack_ctl._y"-
+"t.a.fifo_element[2].inack_ctl._y"->"t.a.fifo_element[2].inack_ctl.y"-
+~("t.a.fifo_element[2].inack_ctl._y")->"t.a.fifo_element[2].inack_ctl.y"+
+~"t.a.fifo_element[2].buf_func.c1"&~"t.a.fifo_element[2].buf_func.c2"|~"t.a.fifo_element[2].buf_func.pr_B"->"t.a.fifo_element[2].buf_func._y"+
+"t.a.fifo_element[2].buf_func.c1"&"t.a.fifo_element[2].buf_func.c2"&"t.a.fifo_element[2].buf_func.n1"&"t.a.fifo_element[2].buf_func.sr_B"->"t.a.fifo_element[2].buf_func._y"-
+"t.a.fifo_element[2].buf_func._y"->"t.a.fifo_element[2].buf_func.y"-
+~("t.a.fifo_element[2].buf_func._y")->"t.a.fifo_element[2].buf_func.y"+
+= "t.a.fifo_element[2].reset_B" "t.a.fifo_element[2].reset_buf.a"
+= "t.a.fifo_element[2].supply.vdd" "t.a.fifo_element[2].reset_buf.vdd"
+= "t.a.fifo_element[2].supply.vdd" "t.a.fifo_element[2].buf_func.vdd"
+= "t.a.fifo_element[2].supply.vdd" "t.a.fifo_element[2].inv_outa.vdd"
+= "t.a.fifo_element[2].supply.vdd" "t.a.fifo_element[2].en_ctl.vdd"
+= "t.a.fifo_element[2].supply.vdd" "t.a.fifo_element[2].inack_ctl.vdd"
+= "t.a.fifo_element[2].supply.vss" "t.a.fifo_element[2].reset_buf.vss"
+= "t.a.fifo_element[2].supply.vss" "t.a.fifo_element[2].buf_func.vss"
+= "t.a.fifo_element[2].supply.vss" "t.a.fifo_element[2].inv_outa.vss"
+= "t.a.fifo_element[2].supply.vss" "t.a.fifo_element[2].en_ctl.vss"
+= "t.a.fifo_element[2].supply.vss" "t.a.fifo_element[2].inack_ctl.vss"
+= "t.a.fifo_element[2]._reset_BX" "t.a.fifo_element[2].reset_buf.y"
+= "t.a.fifo_element[2]._reset_BX" "t.a.fifo_element[2].buf_func.sr_B"
+= "t.a.fifo_element[2]._reset_BX" "t.a.fifo_element[2].buf_func.pr_B"
+= "t.a.fifo_element[2]._reset_BX" "t.a.fifo_element[2].inack_ctl.sr_B"
+= "t.a.fifo_element[2]._reset_BX" "t.a.fifo_element[2].inack_ctl.pr_B"
+= "t.a.fifo_element[2]._en" "t.a.fifo_element[2].buf_func.c1"
+= "t.a.fifo_element[2]._en" "t.a.fifo_element[2].en_ctl.y"
+= "t.a.fifo_element[2]._en" "t.a.fifo_element[2].inack_ctl.c1"
+~"t.a.fifo_element[2].en_ctl.p1"&~"t.a.fifo_element[2].en_ctl.c1"->"t.a.fifo_element[2].en_ctl.y"+
+"t.a.fifo_element[2].en_ctl.c1"->"t.a.fifo_element[2].en_ctl.y"-
+= "t.a.fifo_element[2]._out_a_B" "t.a.fifo_element[2].buf_func.c2"
+= "t.a.fifo_element[2]._out_a_B" "t.a.fifo_element[2].inv_outa.y"
+= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[2].in.r"
+= "t.a.fifo_element[2].in.a" "t.a.fifo_element[2].en_ctl.c1"
+= "t.a.fifo_element[2].in.a" "t.a.fifo_element[2].inack_ctl.y"
+= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[2].buf_func.n1"
+= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[2].inack_ctl.c2"
+= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[2].in.r"
+= "t.a.fifo_element[2].out.d.d[0]" "t.a.fifo_element[2].out.r"
+= "t.a.fifo_element[2].out.a" "t.a.fifo_element[2].inv_outa.a"
+= "t.a.fifo_element[2].out.d.d[0]" "t.a.fifo_element[2].buf_func.y"
+= "t.a.fifo_element[2].out.d.d[0]" "t.a.fifo_element[2].en_ctl.p1"
+= "t.a.fifo_element[2].out.d.d[0]" "t.a.fifo_element[2].inack_ctl.n1"
+= "t.a.fifo_element[2].out.d.d[0]" "t.a.fifo_element[2].out.r"
+"t.a.fifo_element[3].reset_buf.a"->"t.a.fifo_element[3].reset_buf._y"-
+~("t.a.fifo_element[3].reset_buf.a")->"t.a.fifo_element[3].reset_buf._y"+
+"t.a.fifo_element[3].reset_buf._y"->"t.a.fifo_element[3].reset_buf.y"-
+~("t.a.fifo_element[3].reset_buf._y")->"t.a.fifo_element[3].reset_buf.y"+
+"t.a.fifo_element[3].inv_outa.a"->"t.a.fifo_element[3].inv_outa.y"-
+~("t.a.fifo_element[3].inv_outa.a")->"t.a.fifo_element[3].inv_outa.y"+
+~"t.a.fifo_element[3].inack_ctl.c1"&~"t.a.fifo_element[3].inack_ctl.c2"|~"t.a.fifo_element[3].inack_ctl.pr_B"->"t.a.fifo_element[3].inack_ctl._y"+
+"t.a.fifo_element[3].inack_ctl.c1"&"t.a.fifo_element[3].inack_ctl.c2"&"t.a.fifo_element[3].inack_ctl.n1"&"t.a.fifo_element[3].inack_ctl.sr_B"->"t.a.fifo_element[3].inack_ctl._y"-
+"t.a.fifo_element[3].inack_ctl._y"->"t.a.fifo_element[3].inack_ctl.y"-
+~("t.a.fifo_element[3].inack_ctl._y")->"t.a.fifo_element[3].inack_ctl.y"+
+~"t.a.fifo_element[3].buf_func.c1"&~"t.a.fifo_element[3].buf_func.c2"|~"t.a.fifo_element[3].buf_func.pr_B"->"t.a.fifo_element[3].buf_func._y"+
+"t.a.fifo_element[3].buf_func.c1"&"t.a.fifo_element[3].buf_func.c2"&"t.a.fifo_element[3].buf_func.n1"&"t.a.fifo_element[3].buf_func.sr_B"->"t.a.fifo_element[3].buf_func._y"-
+"t.a.fifo_element[3].buf_func._y"->"t.a.fifo_element[3].buf_func.y"-
+~("t.a.fifo_element[3].buf_func._y")->"t.a.fifo_element[3].buf_func.y"+
+= "t.a.fifo_element[3].reset_B" "t.a.fifo_element[3].reset_buf.a"
+= "t.a.fifo_element[3].supply.vdd" "t.a.fifo_element[3].reset_buf.vdd"
+= "t.a.fifo_element[3].supply.vdd" "t.a.fifo_element[3].buf_func.vdd"
+= "t.a.fifo_element[3].supply.vdd" "t.a.fifo_element[3].inv_outa.vdd"
+= "t.a.fifo_element[3].supply.vdd" "t.a.fifo_element[3].en_ctl.vdd"
+= "t.a.fifo_element[3].supply.vdd" "t.a.fifo_element[3].inack_ctl.vdd"
+= "t.a.fifo_element[3].supply.vss" "t.a.fifo_element[3].reset_buf.vss"
+= "t.a.fifo_element[3].supply.vss" "t.a.fifo_element[3].buf_func.vss"
+= "t.a.fifo_element[3].supply.vss" "t.a.fifo_element[3].inv_outa.vss"
+= "t.a.fifo_element[3].supply.vss" "t.a.fifo_element[3].en_ctl.vss"
+= "t.a.fifo_element[3].supply.vss" "t.a.fifo_element[3].inack_ctl.vss"
+= "t.a.fifo_element[3]._reset_BX" "t.a.fifo_element[3].reset_buf.y"
+= "t.a.fifo_element[3]._reset_BX" "t.a.fifo_element[3].buf_func.sr_B"
+= "t.a.fifo_element[3]._reset_BX" "t.a.fifo_element[3].buf_func.pr_B"
+= "t.a.fifo_element[3]._reset_BX" "t.a.fifo_element[3].inack_ctl.sr_B"
+= "t.a.fifo_element[3]._reset_BX" "t.a.fifo_element[3].inack_ctl.pr_B"
+= "t.a.fifo_element[3]._en" "t.a.fifo_element[3].buf_func.c1"
+= "t.a.fifo_element[3]._en" "t.a.fifo_element[3].en_ctl.y"
+= "t.a.fifo_element[3]._en" "t.a.fifo_element[3].inack_ctl.c1"
+~"t.a.fifo_element[3].en_ctl.p1"&~"t.a.fifo_element[3].en_ctl.c1"->"t.a.fifo_element[3].en_ctl.y"+
+"t.a.fifo_element[3].en_ctl.c1"->"t.a.fifo_element[3].en_ctl.y"-
+= "t.a.fifo_element[3]._out_a_B" "t.a.fifo_element[3].buf_func.c2"
+= "t.a.fifo_element[3]._out_a_B" "t.a.fifo_element[3].inv_outa.y"
+= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[3].in.r"
+= "t.a.fifo_element[3].in.a" "t.a.fifo_element[3].en_ctl.c1"
+= "t.a.fifo_element[3].in.a" "t.a.fifo_element[3].inack_ctl.y"
+= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[3].buf_func.n1"
+= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[3].inack_ctl.c2"
+= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[3].in.r"
+= "t.a.fifo_element[3].out.d.d[0]" "t.a.fifo_element[3].out.r"
+= "t.a.fifo_element[3].out.a" "t.a.fifo_element[3].inv_outa.a"
+= "t.a.fifo_element[3].out.d.d[0]" "t.a.fifo_element[3].buf_func.y"
+= "t.a.fifo_element[3].out.d.d[0]" "t.a.fifo_element[3].en_ctl.p1"
+= "t.a.fifo_element[3].out.d.d[0]" "t.a.fifo_element[3].inack_ctl.n1"
+= "t.a.fifo_element[3].out.d.d[0]" "t.a.fifo_element[3].out.r"
+"t.a.fifo_element[4].reset_buf.a"->"t.a.fifo_element[4].reset_buf._y"-
+~("t.a.fifo_element[4].reset_buf.a")->"t.a.fifo_element[4].reset_buf._y"+
+"t.a.fifo_element[4].reset_buf._y"->"t.a.fifo_element[4].reset_buf.y"-
+~("t.a.fifo_element[4].reset_buf._y")->"t.a.fifo_element[4].reset_buf.y"+
+"t.a.fifo_element[4].inv_outa.a"->"t.a.fifo_element[4].inv_outa.y"-
+~("t.a.fifo_element[4].inv_outa.a")->"t.a.fifo_element[4].inv_outa.y"+
+~"t.a.fifo_element[4].inack_ctl.c1"&~"t.a.fifo_element[4].inack_ctl.c2"|~"t.a.fifo_element[4].inack_ctl.pr_B"->"t.a.fifo_element[4].inack_ctl._y"+
+"t.a.fifo_element[4].inack_ctl.c1"&"t.a.fifo_element[4].inack_ctl.c2"&"t.a.fifo_element[4].inack_ctl.n1"&"t.a.fifo_element[4].inack_ctl.sr_B"->"t.a.fifo_element[4].inack_ctl._y"-
+"t.a.fifo_element[4].inack_ctl._y"->"t.a.fifo_element[4].inack_ctl.y"-
+~("t.a.fifo_element[4].inack_ctl._y")->"t.a.fifo_element[4].inack_ctl.y"+
+~"t.a.fifo_element[4].buf_func.c1"&~"t.a.fifo_element[4].buf_func.c2"|~"t.a.fifo_element[4].buf_func.pr_B"->"t.a.fifo_element[4].buf_func._y"+
+"t.a.fifo_element[4].buf_func.c1"&"t.a.fifo_element[4].buf_func.c2"&"t.a.fifo_element[4].buf_func.n1"&"t.a.fifo_element[4].buf_func.sr_B"->"t.a.fifo_element[4].buf_func._y"-
+"t.a.fifo_element[4].buf_func._y"->"t.a.fifo_element[4].buf_func.y"-
+~("t.a.fifo_element[4].buf_func._y")->"t.a.fifo_element[4].buf_func.y"+
+= "t.a.fifo_element[4].reset_B" "t.a.fifo_element[4].reset_buf.a"
+= "t.a.fifo_element[4].supply.vdd" "t.a.fifo_element[4].reset_buf.vdd"
+= "t.a.fifo_element[4].supply.vdd" "t.a.fifo_element[4].buf_func.vdd"
+= "t.a.fifo_element[4].supply.vdd" "t.a.fifo_element[4].inv_outa.vdd"
+= "t.a.fifo_element[4].supply.vdd" "t.a.fifo_element[4].en_ctl.vdd"
+= "t.a.fifo_element[4].supply.vdd" "t.a.fifo_element[4].inack_ctl.vdd"
+= "t.a.fifo_element[4].supply.vss" "t.a.fifo_element[4].reset_buf.vss"
+= "t.a.fifo_element[4].supply.vss" "t.a.fifo_element[4].buf_func.vss"
+= "t.a.fifo_element[4].supply.vss" "t.a.fifo_element[4].inv_outa.vss"
+= "t.a.fifo_element[4].supply.vss" "t.a.fifo_element[4].en_ctl.vss"
+= "t.a.fifo_element[4].supply.vss" "t.a.fifo_element[4].inack_ctl.vss"
+= "t.a.fifo_element[4]._reset_BX" "t.a.fifo_element[4].reset_buf.y"
+= "t.a.fifo_element[4]._reset_BX" "t.a.fifo_element[4].buf_func.sr_B"
+= "t.a.fifo_element[4]._reset_BX" "t.a.fifo_element[4].buf_func.pr_B"
+= "t.a.fifo_element[4]._reset_BX" "t.a.fifo_element[4].inack_ctl.sr_B"
+= "t.a.fifo_element[4]._reset_BX" "t.a.fifo_element[4].inack_ctl.pr_B"
+= "t.a.fifo_element[4]._en" "t.a.fifo_element[4].buf_func.c1"
+= "t.a.fifo_element[4]._en" "t.a.fifo_element[4].en_ctl.y"
+= "t.a.fifo_element[4]._en" "t.a.fifo_element[4].inack_ctl.c1"
+~"t.a.fifo_element[4].en_ctl.p1"&~"t.a.fifo_element[4].en_ctl.c1"->"t.a.fifo_element[4].en_ctl.y"+
+"t.a.fifo_element[4].en_ctl.c1"->"t.a.fifo_element[4].en_ctl.y"-
+= "t.a.fifo_element[4]._out_a_B" "t.a.fifo_element[4].buf_func.c2"
+= "t.a.fifo_element[4]._out_a_B" "t.a.fifo_element[4].inv_outa.y"
+= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[4].in.r"
+= "t.a.fifo_element[4].in.a" "t.a.fifo_element[4].en_ctl.c1"
+= "t.a.fifo_element[4].in.a" "t.a.fifo_element[4].inack_ctl.y"
+= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[4].buf_func.n1"
+= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[4].inack_ctl.c2"
+= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[4].in.r"
+= "t.a.fifo_element[4].out.d.d[0]" "t.a.fifo_element[4].out.r"
+= "t.a.fifo_element[4].out.a" "t.a.fifo_element[4].inv_outa.a"
+= "t.a.fifo_element[4].out.d.d[0]" "t.a.fifo_element[4].buf_func.y"
+= "t.a.fifo_element[4].out.d.d[0]" "t.a.fifo_element[4].en_ctl.p1"
+= "t.a.fifo_element[4].out.d.d[0]" "t.a.fifo_element[4].inack_ctl.n1"
+= "t.a.fifo_element[4].out.d.d[0]" "t.a.fifo_element[4].out.r"
+"t.a.fifo_element[5].reset_buf.a"->"t.a.fifo_element[5].reset_buf._y"-
+~("t.a.fifo_element[5].reset_buf.a")->"t.a.fifo_element[5].reset_buf._y"+
+"t.a.fifo_element[5].reset_buf._y"->"t.a.fifo_element[5].reset_buf.y"-
+~("t.a.fifo_element[5].reset_buf._y")->"t.a.fifo_element[5].reset_buf.y"+
+"t.a.fifo_element[5].inv_outa.a"->"t.a.fifo_element[5].inv_outa.y"-
+~("t.a.fifo_element[5].inv_outa.a")->"t.a.fifo_element[5].inv_outa.y"+
+~"t.a.fifo_element[5].inack_ctl.c1"&~"t.a.fifo_element[5].inack_ctl.c2"|~"t.a.fifo_element[5].inack_ctl.pr_B"->"t.a.fifo_element[5].inack_ctl._y"+
+"t.a.fifo_element[5].inack_ctl.c1"&"t.a.fifo_element[5].inack_ctl.c2"&"t.a.fifo_element[5].inack_ctl.n1"&"t.a.fifo_element[5].inack_ctl.sr_B"->"t.a.fifo_element[5].inack_ctl._y"-
+"t.a.fifo_element[5].inack_ctl._y"->"t.a.fifo_element[5].inack_ctl.y"-
+~("t.a.fifo_element[5].inack_ctl._y")->"t.a.fifo_element[5].inack_ctl.y"+
+~"t.a.fifo_element[5].buf_func.c1"&~"t.a.fifo_element[5].buf_func.c2"|~"t.a.fifo_element[5].buf_func.pr_B"->"t.a.fifo_element[5].buf_func._y"+
+"t.a.fifo_element[5].buf_func.c1"&"t.a.fifo_element[5].buf_func.c2"&"t.a.fifo_element[5].buf_func.n1"&"t.a.fifo_element[5].buf_func.sr_B"->"t.a.fifo_element[5].buf_func._y"-
+"t.a.fifo_element[5].buf_func._y"->"t.a.fifo_element[5].buf_func.y"-
+~("t.a.fifo_element[5].buf_func._y")->"t.a.fifo_element[5].buf_func.y"+
+= "t.a.fifo_element[5].reset_B" "t.a.fifo_element[5].reset_buf.a"
+= "t.a.fifo_element[5].supply.vdd" "t.a.fifo_element[5].reset_buf.vdd"
+= "t.a.fifo_element[5].supply.vdd" "t.a.fifo_element[5].buf_func.vdd"
+= "t.a.fifo_element[5].supply.vdd" "t.a.fifo_element[5].inv_outa.vdd"
+= "t.a.fifo_element[5].supply.vdd" "t.a.fifo_element[5].en_ctl.vdd"
+= "t.a.fifo_element[5].supply.vdd" "t.a.fifo_element[5].inack_ctl.vdd"
+= "t.a.fifo_element[5].supply.vss" "t.a.fifo_element[5].reset_buf.vss"
+= "t.a.fifo_element[5].supply.vss" "t.a.fifo_element[5].buf_func.vss"
+= "t.a.fifo_element[5].supply.vss" "t.a.fifo_element[5].inv_outa.vss"
+= "t.a.fifo_element[5].supply.vss" "t.a.fifo_element[5].en_ctl.vss"
+= "t.a.fifo_element[5].supply.vss" "t.a.fifo_element[5].inack_ctl.vss"
+= "t.a.fifo_element[5]._reset_BX" "t.a.fifo_element[5].reset_buf.y"
+= "t.a.fifo_element[5]._reset_BX" "t.a.fifo_element[5].buf_func.sr_B"
+= "t.a.fifo_element[5]._reset_BX" "t.a.fifo_element[5].buf_func.pr_B"
+= "t.a.fifo_element[5]._reset_BX" "t.a.fifo_element[5].inack_ctl.sr_B"
+= "t.a.fifo_element[5]._reset_BX" "t.a.fifo_element[5].inack_ctl.pr_B"
+= "t.a.fifo_element[5]._en" "t.a.fifo_element[5].buf_func.c1"
+= "t.a.fifo_element[5]._en" "t.a.fifo_element[5].en_ctl.y"
+= "t.a.fifo_element[5]._en" "t.a.fifo_element[5].inack_ctl.c1"
+~"t.a.fifo_element[5].en_ctl.p1"&~"t.a.fifo_element[5].en_ctl.c1"->"t.a.fifo_element[5].en_ctl.y"+
+"t.a.fifo_element[5].en_ctl.c1"->"t.a.fifo_element[5].en_ctl.y"-
+= "t.a.fifo_element[5]._out_a_B" "t.a.fifo_element[5].buf_func.c2"
+= "t.a.fifo_element[5]._out_a_B" "t.a.fifo_element[5].inv_outa.y"
+= "t.a.fifo_element[5].in.d.d[0]" "t.a.fifo_element[5].in.r"
+= "t.a.fifo_element[5].in.a" "t.a.fifo_element[5].en_ctl.c1"
+= "t.a.fifo_element[5].in.a" "t.a.fifo_element[5].inack_ctl.y"
+= "t.a.fifo_element[5].in.d.d[0]" "t.a.fifo_element[5].buf_func.n1"
+= "t.a.fifo_element[5].in.d.d[0]" "t.a.fifo_element[5].inack_ctl.c2"
+= "t.a.fifo_element[5].in.d.d[0]" "t.a.fifo_element[5].in.r"
+= "t.a.fifo_element[5].out.d.d[0]" "t.a.fifo_element[5].out.r"
+= "t.a.fifo_element[5].out.a" "t.a.fifo_element[5].inv_outa.a"
+= "t.a.fifo_element[5].out.d.d[0]" "t.a.fifo_element[5].buf_func.y"
+= "t.a.fifo_element[5].out.d.d[0]" "t.a.fifo_element[5].en_ctl.p1"
+= "t.a.fifo_element[5].out.d.d[0]" "t.a.fifo_element[5].inack_ctl.n1"
+= "t.a.fifo_element[5].out.d.d[0]" "t.a.fifo_element[5].out.r"
+"t.a.fifo_element[6].reset_buf.a"->"t.a.fifo_element[6].reset_buf._y"-
+~("t.a.fifo_element[6].reset_buf.a")->"t.a.fifo_element[6].reset_buf._y"+
+"t.a.fifo_element[6].reset_buf._y"->"t.a.fifo_element[6].reset_buf.y"-
+~("t.a.fifo_element[6].reset_buf._y")->"t.a.fifo_element[6].reset_buf.y"+
+"t.a.fifo_element[6].inv_outa.a"->"t.a.fifo_element[6].inv_outa.y"-
+~("t.a.fifo_element[6].inv_outa.a")->"t.a.fifo_element[6].inv_outa.y"+
+~"t.a.fifo_element[6].inack_ctl.c1"&~"t.a.fifo_element[6].inack_ctl.c2"|~"t.a.fifo_element[6].inack_ctl.pr_B"->"t.a.fifo_element[6].inack_ctl._y"+
+"t.a.fifo_element[6].inack_ctl.c1"&"t.a.fifo_element[6].inack_ctl.c2"&"t.a.fifo_element[6].inack_ctl.n1"&"t.a.fifo_element[6].inack_ctl.sr_B"->"t.a.fifo_element[6].inack_ctl._y"-
+"t.a.fifo_element[6].inack_ctl._y"->"t.a.fifo_element[6].inack_ctl.y"-
+~("t.a.fifo_element[6].inack_ctl._y")->"t.a.fifo_element[6].inack_ctl.y"+
+~"t.a.fifo_element[6].buf_func.c1"&~"t.a.fifo_element[6].buf_func.c2"|~"t.a.fifo_element[6].buf_func.pr_B"->"t.a.fifo_element[6].buf_func._y"+
+"t.a.fifo_element[6].buf_func.c1"&"t.a.fifo_element[6].buf_func.c2"&"t.a.fifo_element[6].buf_func.n1"&"t.a.fifo_element[6].buf_func.sr_B"->"t.a.fifo_element[6].buf_func._y"-
+"t.a.fifo_element[6].buf_func._y"->"t.a.fifo_element[6].buf_func.y"-
+~("t.a.fifo_element[6].buf_func._y")->"t.a.fifo_element[6].buf_func.y"+
+= "t.a.fifo_element[6].reset_B" "t.a.fifo_element[6].reset_buf.a"
+= "t.a.fifo_element[6].supply.vdd" "t.a.fifo_element[6].reset_buf.vdd"
+= "t.a.fifo_element[6].supply.vdd" "t.a.fifo_element[6].buf_func.vdd"
+= "t.a.fifo_element[6].supply.vdd" "t.a.fifo_element[6].inv_outa.vdd"
+= "t.a.fifo_element[6].supply.vdd" "t.a.fifo_element[6].en_ctl.vdd"
+= "t.a.fifo_element[6].supply.vdd" "t.a.fifo_element[6].inack_ctl.vdd"
+= "t.a.fifo_element[6].supply.vss" "t.a.fifo_element[6].reset_buf.vss"
+= "t.a.fifo_element[6].supply.vss" "t.a.fifo_element[6].buf_func.vss"
+= "t.a.fifo_element[6].supply.vss" "t.a.fifo_element[6].inv_outa.vss"
+= "t.a.fifo_element[6].supply.vss" "t.a.fifo_element[6].en_ctl.vss"
+= "t.a.fifo_element[6].supply.vss" "t.a.fifo_element[6].inack_ctl.vss"
+= "t.a.fifo_element[6]._reset_BX" "t.a.fifo_element[6].reset_buf.y"
+= "t.a.fifo_element[6]._reset_BX" "t.a.fifo_element[6].buf_func.sr_B"
+= "t.a.fifo_element[6]._reset_BX" "t.a.fifo_element[6].buf_func.pr_B"
+= "t.a.fifo_element[6]._reset_BX" "t.a.fifo_element[6].inack_ctl.sr_B"
+= "t.a.fifo_element[6]._reset_BX" "t.a.fifo_element[6].inack_ctl.pr_B"
+= "t.a.fifo_element[6]._en" "t.a.fifo_element[6].buf_func.c1"
+= "t.a.fifo_element[6]._en" "t.a.fifo_element[6].en_ctl.y"
+= "t.a.fifo_element[6]._en" "t.a.fifo_element[6].inack_ctl.c1"
+~"t.a.fifo_element[6].en_ctl.p1"&~"t.a.fifo_element[6].en_ctl.c1"->"t.a.fifo_element[6].en_ctl.y"+
+"t.a.fifo_element[6].en_ctl.c1"->"t.a.fifo_element[6].en_ctl.y"-
+= "t.a.fifo_element[6]._out_a_B" "t.a.fifo_element[6].buf_func.c2"
+= "t.a.fifo_element[6]._out_a_B" "t.a.fifo_element[6].inv_outa.y"
+= "t.a.fifo_element[6].in.d.d[0]" "t.a.fifo_element[6].in.r"
+= "t.a.fifo_element[6].in.a" "t.a.fifo_element[6].en_ctl.c1"
+= "t.a.fifo_element[6].in.a" "t.a.fifo_element[6].inack_ctl.y"
+= "t.a.fifo_element[6].in.d.d[0]" "t.a.fifo_element[6].buf_func.n1"
+= "t.a.fifo_element[6].in.d.d[0]" "t.a.fifo_element[6].inack_ctl.c2"
+= "t.a.fifo_element[6].in.d.d[0]" "t.a.fifo_element[6].in.r"
+= "t.a.fifo_element[6].out.d.d[0]" "t.a.fifo_element[6].out.r"
+= "t.a.fifo_element[6].out.a" "t.a.fifo_element[6].inv_outa.a"
+= "t.a.fifo_element[6].out.d.d[0]" "t.a.fifo_element[6].buf_func.y"
+= "t.a.fifo_element[6].out.d.d[0]" "t.a.fifo_element[6].en_ctl.p1"
+= "t.a.fifo_element[6].out.d.d[0]" "t.a.fifo_element[6].inack_ctl.n1"
+= "t.a.fifo_element[6].out.d.d[0]" "t.a.fifo_element[6].out.r"
+"t.a.fifo_element[7].reset_buf.a"->"t.a.fifo_element[7].reset_buf._y"-
+~("t.a.fifo_element[7].reset_buf.a")->"t.a.fifo_element[7].reset_buf._y"+
+"t.a.fifo_element[7].reset_buf._y"->"t.a.fifo_element[7].reset_buf.y"-
+~("t.a.fifo_element[7].reset_buf._y")->"t.a.fifo_element[7].reset_buf.y"+
+"t.a.fifo_element[7].inv_outa.a"->"t.a.fifo_element[7].inv_outa.y"-
+~("t.a.fifo_element[7].inv_outa.a")->"t.a.fifo_element[7].inv_outa.y"+
+~"t.a.fifo_element[7].inack_ctl.c1"&~"t.a.fifo_element[7].inack_ctl.c2"|~"t.a.fifo_element[7].inack_ctl.pr_B"->"t.a.fifo_element[7].inack_ctl._y"+
+"t.a.fifo_element[7].inack_ctl.c1"&"t.a.fifo_element[7].inack_ctl.c2"&"t.a.fifo_element[7].inack_ctl.n1"&"t.a.fifo_element[7].inack_ctl.sr_B"->"t.a.fifo_element[7].inack_ctl._y"-
+"t.a.fifo_element[7].inack_ctl._y"->"t.a.fifo_element[7].inack_ctl.y"-
+~("t.a.fifo_element[7].inack_ctl._y")->"t.a.fifo_element[7].inack_ctl.y"+
+~"t.a.fifo_element[7].buf_func.c1"&~"t.a.fifo_element[7].buf_func.c2"|~"t.a.fifo_element[7].buf_func.pr_B"->"t.a.fifo_element[7].buf_func._y"+
+"t.a.fifo_element[7].buf_func.c1"&"t.a.fifo_element[7].buf_func.c2"&"t.a.fifo_element[7].buf_func.n1"&"t.a.fifo_element[7].buf_func.sr_B"->"t.a.fifo_element[7].buf_func._y"-
+"t.a.fifo_element[7].buf_func._y"->"t.a.fifo_element[7].buf_func.y"-
+~("t.a.fifo_element[7].buf_func._y")->"t.a.fifo_element[7].buf_func.y"+
+= "t.a.fifo_element[7].reset_B" "t.a.fifo_element[7].reset_buf.a"
+= "t.a.fifo_element[7].supply.vdd" "t.a.fifo_element[7].reset_buf.vdd"
+= "t.a.fifo_element[7].supply.vdd" "t.a.fifo_element[7].buf_func.vdd"
+= "t.a.fifo_element[7].supply.vdd" "t.a.fifo_element[7].inv_outa.vdd"
+= "t.a.fifo_element[7].supply.vdd" "t.a.fifo_element[7].en_ctl.vdd"
+= "t.a.fifo_element[7].supply.vdd" "t.a.fifo_element[7].inack_ctl.vdd"
+= "t.a.fifo_element[7].supply.vss" "t.a.fifo_element[7].reset_buf.vss"
+= "t.a.fifo_element[7].supply.vss" "t.a.fifo_element[7].buf_func.vss"
+= "t.a.fifo_element[7].supply.vss" "t.a.fifo_element[7].inv_outa.vss"
+= "t.a.fifo_element[7].supply.vss" "t.a.fifo_element[7].en_ctl.vss"
+= "t.a.fifo_element[7].supply.vss" "t.a.fifo_element[7].inack_ctl.vss"
+= "t.a.fifo_element[7]._reset_BX" "t.a.fifo_element[7].reset_buf.y"
+= "t.a.fifo_element[7]._reset_BX" "t.a.fifo_element[7].buf_func.sr_B"
+= "t.a.fifo_element[7]._reset_BX" "t.a.fifo_element[7].buf_func.pr_B"
+= "t.a.fifo_element[7]._reset_BX" "t.a.fifo_element[7].inack_ctl.sr_B"
+= "t.a.fifo_element[7]._reset_BX" "t.a.fifo_element[7].inack_ctl.pr_B"
+= "t.a.fifo_element[7]._en" "t.a.fifo_element[7].buf_func.c1"
+= "t.a.fifo_element[7]._en" "t.a.fifo_element[7].en_ctl.y"
+= "t.a.fifo_element[7]._en" "t.a.fifo_element[7].inack_ctl.c1"
+~"t.a.fifo_element[7].en_ctl.p1"&~"t.a.fifo_element[7].en_ctl.c1"->"t.a.fifo_element[7].en_ctl.y"+
+"t.a.fifo_element[7].en_ctl.c1"->"t.a.fifo_element[7].en_ctl.y"-
+= "t.a.fifo_element[7]._out_a_B" "t.a.fifo_element[7].buf_func.c2"
+= "t.a.fifo_element[7]._out_a_B" "t.a.fifo_element[7].inv_outa.y"
+= "t.a.fifo_element[7].in.d.d[0]" "t.a.fifo_element[7].in.r"
+= "t.a.fifo_element[7].in.a" "t.a.fifo_element[7].en_ctl.c1"
+= "t.a.fifo_element[7].in.a" "t.a.fifo_element[7].inack_ctl.y"
+= "t.a.fifo_element[7].in.d.d[0]" "t.a.fifo_element[7].buf_func.n1"
+= "t.a.fifo_element[7].in.d.d[0]" "t.a.fifo_element[7].inack_ctl.c2"
+= "t.a.fifo_element[7].in.d.d[0]" "t.a.fifo_element[7].in.r"
+= "t.a.fifo_element[7].out.d.d[0]" "t.a.fifo_element[7].out.r"
+= "t.a.fifo_element[7].out.a" "t.a.fifo_element[7].inv_outa.a"
+= "t.a.fifo_element[7].out.d.d[0]" "t.a.fifo_element[7].buf_func.y"
+= "t.a.fifo_element[7].out.d.d[0]" "t.a.fifo_element[7].en_ctl.p1"
+= "t.a.fifo_element[7].out.d.d[0]" "t.a.fifo_element[7].inack_ctl.n1"
+= "t.a.fifo_element[7].out.d.d[0]" "t.a.fifo_element[7].out.r"
+"t.a.fifo_element[8].reset_buf.a"->"t.a.fifo_element[8].reset_buf._y"-
+~("t.a.fifo_element[8].reset_buf.a")->"t.a.fifo_element[8].reset_buf._y"+
+"t.a.fifo_element[8].reset_buf._y"->"t.a.fifo_element[8].reset_buf.y"-
+~("t.a.fifo_element[8].reset_buf._y")->"t.a.fifo_element[8].reset_buf.y"+
+"t.a.fifo_element[8].inv_outa.a"->"t.a.fifo_element[8].inv_outa.y"-
+~("t.a.fifo_element[8].inv_outa.a")->"t.a.fifo_element[8].inv_outa.y"+
+~"t.a.fifo_element[8].inack_ctl.c1"&~"t.a.fifo_element[8].inack_ctl.c2"|~"t.a.fifo_element[8].inack_ctl.pr_B"->"t.a.fifo_element[8].inack_ctl._y"+
+"t.a.fifo_element[8].inack_ctl.c1"&"t.a.fifo_element[8].inack_ctl.c2"&"t.a.fifo_element[8].inack_ctl.n1"&"t.a.fifo_element[8].inack_ctl.sr_B"->"t.a.fifo_element[8].inack_ctl._y"-
+"t.a.fifo_element[8].inack_ctl._y"->"t.a.fifo_element[8].inack_ctl.y"-
+~("t.a.fifo_element[8].inack_ctl._y")->"t.a.fifo_element[8].inack_ctl.y"+
+~"t.a.fifo_element[8].buf_func.c1"&~"t.a.fifo_element[8].buf_func.c2"|~"t.a.fifo_element[8].buf_func.pr_B"->"t.a.fifo_element[8].buf_func._y"+
+"t.a.fifo_element[8].buf_func.c1"&"t.a.fifo_element[8].buf_func.c2"&"t.a.fifo_element[8].buf_func.n1"&"t.a.fifo_element[8].buf_func.sr_B"->"t.a.fifo_element[8].buf_func._y"-
+"t.a.fifo_element[8].buf_func._y"->"t.a.fifo_element[8].buf_func.y"-
+~("t.a.fifo_element[8].buf_func._y")->"t.a.fifo_element[8].buf_func.y"+
+= "t.a.fifo_element[8].reset_B" "t.a.fifo_element[8].reset_buf.a"
+= "t.a.fifo_element[8].supply.vdd" "t.a.fifo_element[8].reset_buf.vdd"
+= "t.a.fifo_element[8].supply.vdd" "t.a.fifo_element[8].buf_func.vdd"
+= "t.a.fifo_element[8].supply.vdd" "t.a.fifo_element[8].inv_outa.vdd"
+= "t.a.fifo_element[8].supply.vdd" "t.a.fifo_element[8].en_ctl.vdd"
+= "t.a.fifo_element[8].supply.vdd" "t.a.fifo_element[8].inack_ctl.vdd"
+= "t.a.fifo_element[8].supply.vss" "t.a.fifo_element[8].reset_buf.vss"
+= "t.a.fifo_element[8].supply.vss" "t.a.fifo_element[8].buf_func.vss"
+= "t.a.fifo_element[8].supply.vss" "t.a.fifo_element[8].inv_outa.vss"
+= "t.a.fifo_element[8].supply.vss" "t.a.fifo_element[8].en_ctl.vss"
+= "t.a.fifo_element[8].supply.vss" "t.a.fifo_element[8].inack_ctl.vss"
+= "t.a.fifo_element[8]._reset_BX" "t.a.fifo_element[8].reset_buf.y"
+= "t.a.fifo_element[8]._reset_BX" "t.a.fifo_element[8].buf_func.sr_B"
+= "t.a.fifo_element[8]._reset_BX" "t.a.fifo_element[8].buf_func.pr_B"
+= "t.a.fifo_element[8]._reset_BX" "t.a.fifo_element[8].inack_ctl.sr_B"
+= "t.a.fifo_element[8]._reset_BX" "t.a.fifo_element[8].inack_ctl.pr_B"
+= "t.a.fifo_element[8]._en" "t.a.fifo_element[8].buf_func.c1"
+= "t.a.fifo_element[8]._en" "t.a.fifo_element[8].en_ctl.y"
+= "t.a.fifo_element[8]._en" "t.a.fifo_element[8].inack_ctl.c1"
+~"t.a.fifo_element[8].en_ctl.p1"&~"t.a.fifo_element[8].en_ctl.c1"->"t.a.fifo_element[8].en_ctl.y"+
+"t.a.fifo_element[8].en_ctl.c1"->"t.a.fifo_element[8].en_ctl.y"-
+= "t.a.fifo_element[8]._out_a_B" "t.a.fifo_element[8].buf_func.c2"
+= "t.a.fifo_element[8]._out_a_B" "t.a.fifo_element[8].inv_outa.y"
+= "t.a.fifo_element[8].in.d.d[0]" "t.a.fifo_element[8].in.r"
+= "t.a.fifo_element[8].in.a" "t.a.fifo_element[8].en_ctl.c1"
+= "t.a.fifo_element[8].in.a" "t.a.fifo_element[8].inack_ctl.y"
+= "t.a.fifo_element[8].in.d.d[0]" "t.a.fifo_element[8].buf_func.n1"
+= "t.a.fifo_element[8].in.d.d[0]" "t.a.fifo_element[8].inack_ctl.c2"
+= "t.a.fifo_element[8].in.d.d[0]" "t.a.fifo_element[8].in.r"
+= "t.a.fifo_element[8].out.d.d[0]" "t.a.fifo_element[8].out.r"
+= "t.a.fifo_element[8].out.a" "t.a.fifo_element[8].inv_outa.a"
+= "t.a.fifo_element[8].out.d.d[0]" "t.a.fifo_element[8].buf_func.y"
+= "t.a.fifo_element[8].out.d.d[0]" "t.a.fifo_element[8].en_ctl.p1"
+= "t.a.fifo_element[8].out.d.d[0]" "t.a.fifo_element[8].inack_ctl.n1"
+= "t.a.fifo_element[8].out.d.d[0]" "t.a.fifo_element[8].out.r"
+"t.a.fifo_element[9].reset_buf.a"->"t.a.fifo_element[9].reset_buf._y"-
+~("t.a.fifo_element[9].reset_buf.a")->"t.a.fifo_element[9].reset_buf._y"+
+"t.a.fifo_element[9].reset_buf._y"->"t.a.fifo_element[9].reset_buf.y"-
+~("t.a.fifo_element[9].reset_buf._y")->"t.a.fifo_element[9].reset_buf.y"+
+"t.a.fifo_element[9].inv_outa.a"->"t.a.fifo_element[9].inv_outa.y"-
+~("t.a.fifo_element[9].inv_outa.a")->"t.a.fifo_element[9].inv_outa.y"+
+~"t.a.fifo_element[9].inack_ctl.c1"&~"t.a.fifo_element[9].inack_ctl.c2"|~"t.a.fifo_element[9].inack_ctl.pr_B"->"t.a.fifo_element[9].inack_ctl._y"+
+"t.a.fifo_element[9].inack_ctl.c1"&"t.a.fifo_element[9].inack_ctl.c2"&"t.a.fifo_element[9].inack_ctl.n1"&"t.a.fifo_element[9].inack_ctl.sr_B"->"t.a.fifo_element[9].inack_ctl._y"-
+"t.a.fifo_element[9].inack_ctl._y"->"t.a.fifo_element[9].inack_ctl.y"-
+~("t.a.fifo_element[9].inack_ctl._y")->"t.a.fifo_element[9].inack_ctl.y"+
+~"t.a.fifo_element[9].buf_func.c1"&~"t.a.fifo_element[9].buf_func.c2"|~"t.a.fifo_element[9].buf_func.pr_B"->"t.a.fifo_element[9].buf_func._y"+
+"t.a.fifo_element[9].buf_func.c1"&"t.a.fifo_element[9].buf_func.c2"&"t.a.fifo_element[9].buf_func.n1"&"t.a.fifo_element[9].buf_func.sr_B"->"t.a.fifo_element[9].buf_func._y"-
+"t.a.fifo_element[9].buf_func._y"->"t.a.fifo_element[9].buf_func.y"-
+~("t.a.fifo_element[9].buf_func._y")->"t.a.fifo_element[9].buf_func.y"+
+= "t.a.fifo_element[9].reset_B" "t.a.fifo_element[9].reset_buf.a"
+= "t.a.fifo_element[9].supply.vdd" "t.a.fifo_element[9].reset_buf.vdd"
+= "t.a.fifo_element[9].supply.vdd" "t.a.fifo_element[9].buf_func.vdd"
+= "t.a.fifo_element[9].supply.vdd" "t.a.fifo_element[9].inv_outa.vdd"
+= "t.a.fifo_element[9].supply.vdd" "t.a.fifo_element[9].en_ctl.vdd"
+= "t.a.fifo_element[9].supply.vdd" "t.a.fifo_element[9].inack_ctl.vdd"
+= "t.a.fifo_element[9].supply.vss" "t.a.fifo_element[9].reset_buf.vss"
+= "t.a.fifo_element[9].supply.vss" "t.a.fifo_element[9].buf_func.vss"
+= "t.a.fifo_element[9].supply.vss" "t.a.fifo_element[9].inv_outa.vss"
+= "t.a.fifo_element[9].supply.vss" "t.a.fifo_element[9].en_ctl.vss"
+= "t.a.fifo_element[9].supply.vss" "t.a.fifo_element[9].inack_ctl.vss"
+= "t.a.fifo_element[9]._reset_BX" "t.a.fifo_element[9].reset_buf.y"
+= "t.a.fifo_element[9]._reset_BX" "t.a.fifo_element[9].buf_func.sr_B"
+= "t.a.fifo_element[9]._reset_BX" "t.a.fifo_element[9].buf_func.pr_B"
+= "t.a.fifo_element[9]._reset_BX" "t.a.fifo_element[9].inack_ctl.sr_B"
+= "t.a.fifo_element[9]._reset_BX" "t.a.fifo_element[9].inack_ctl.pr_B"
+= "t.a.fifo_element[9]._en" "t.a.fifo_element[9].buf_func.c1"
+= "t.a.fifo_element[9]._en" "t.a.fifo_element[9].en_ctl.y"
+= "t.a.fifo_element[9]._en" "t.a.fifo_element[9].inack_ctl.c1"
+~"t.a.fifo_element[9].en_ctl.p1"&~"t.a.fifo_element[9].en_ctl.c1"->"t.a.fifo_element[9].en_ctl.y"+
+"t.a.fifo_element[9].en_ctl.c1"->"t.a.fifo_element[9].en_ctl.y"-
+= "t.a.fifo_element[9]._out_a_B" "t.a.fifo_element[9].buf_func.c2"
+= "t.a.fifo_element[9]._out_a_B" "t.a.fifo_element[9].inv_outa.y"
+= "t.a.fifo_element[9].in.d.d[0]" "t.a.fifo_element[9].in.r"
+= "t.a.fifo_element[9].in.a" "t.a.fifo_element[9].en_ctl.c1"
+= "t.a.fifo_element[9].in.a" "t.a.fifo_element[9].inack_ctl.y"
+= "t.a.fifo_element[9].in.d.d[0]" "t.a.fifo_element[9].buf_func.n1"
+= "t.a.fifo_element[9].in.d.d[0]" "t.a.fifo_element[9].inack_ctl.c2"
+= "t.a.fifo_element[9].in.d.d[0]" "t.a.fifo_element[9].in.r"
+= "t.a.fifo_element[9].out.d.d[0]" "t.a.fifo_element[9].out.r"
+= "t.a.fifo_element[9].out.a" "t.a.fifo_element[9].inv_outa.a"
+= "t.a.fifo_element[9].out.d.d[0]" "t.a.fifo_element[9].buf_func.y"
+= "t.a.fifo_element[9].out.d.d[0]" "t.a.fifo_element[9].en_ctl.p1"
+= "t.a.fifo_element[9].out.d.d[0]" "t.a.fifo_element[9].inack_ctl.n1"
+= "t.a.fifo_element[9].out.d.d[0]" "t.a.fifo_element[9].out.r"
+"t.a.fifo_element[10].reset_buf.a"->"t.a.fifo_element[10].reset_buf._y"-
+~("t.a.fifo_element[10].reset_buf.a")->"t.a.fifo_element[10].reset_buf._y"+
+"t.a.fifo_element[10].reset_buf._y"->"t.a.fifo_element[10].reset_buf.y"-
+~("t.a.fifo_element[10].reset_buf._y")->"t.a.fifo_element[10].reset_buf.y"+
+"t.a.fifo_element[10].inv_outa.a"->"t.a.fifo_element[10].inv_outa.y"-
+~("t.a.fifo_element[10].inv_outa.a")->"t.a.fifo_element[10].inv_outa.y"+
+~"t.a.fifo_element[10].inack_ctl.c1"&~"t.a.fifo_element[10].inack_ctl.c2"|~"t.a.fifo_element[10].inack_ctl.pr_B"->"t.a.fifo_element[10].inack_ctl._y"+
+"t.a.fifo_element[10].inack_ctl.c1"&"t.a.fifo_element[10].inack_ctl.c2"&"t.a.fifo_element[10].inack_ctl.n1"&"t.a.fifo_element[10].inack_ctl.sr_B"->"t.a.fifo_element[10].inack_ctl._y"-
+"t.a.fifo_element[10].inack_ctl._y"->"t.a.fifo_element[10].inack_ctl.y"-
+~("t.a.fifo_element[10].inack_ctl._y")->"t.a.fifo_element[10].inack_ctl.y"+
+~"t.a.fifo_element[10].buf_func.c1"&~"t.a.fifo_element[10].buf_func.c2"|~"t.a.fifo_element[10].buf_func.pr_B"->"t.a.fifo_element[10].buf_func._y"+
+"t.a.fifo_element[10].buf_func.c1"&"t.a.fifo_element[10].buf_func.c2"&"t.a.fifo_element[10].buf_func.n1"&"t.a.fifo_element[10].buf_func.sr_B"->"t.a.fifo_element[10].buf_func._y"-
+"t.a.fifo_element[10].buf_func._y"->"t.a.fifo_element[10].buf_func.y"-
+~("t.a.fifo_element[10].buf_func._y")->"t.a.fifo_element[10].buf_func.y"+
+= "t.a.fifo_element[10].reset_B" "t.a.fifo_element[10].reset_buf.a"
+= "t.a.fifo_element[10].supply.vdd" "t.a.fifo_element[10].reset_buf.vdd"
+= "t.a.fifo_element[10].supply.vdd" "t.a.fifo_element[10].buf_func.vdd"
+= "t.a.fifo_element[10].supply.vdd" "t.a.fifo_element[10].inv_outa.vdd"
+= "t.a.fifo_element[10].supply.vdd" "t.a.fifo_element[10].en_ctl.vdd"
+= "t.a.fifo_element[10].supply.vdd" "t.a.fifo_element[10].inack_ctl.vdd"
+= "t.a.fifo_element[10].supply.vss" "t.a.fifo_element[10].reset_buf.vss"
+= "t.a.fifo_element[10].supply.vss" "t.a.fifo_element[10].buf_func.vss"
+= "t.a.fifo_element[10].supply.vss" "t.a.fifo_element[10].inv_outa.vss"
+= "t.a.fifo_element[10].supply.vss" "t.a.fifo_element[10].en_ctl.vss"
+= "t.a.fifo_element[10].supply.vss" "t.a.fifo_element[10].inack_ctl.vss"
+= "t.a.fifo_element[10]._reset_BX" "t.a.fifo_element[10].reset_buf.y"
+= "t.a.fifo_element[10]._reset_BX" "t.a.fifo_element[10].buf_func.sr_B"
+= "t.a.fifo_element[10]._reset_BX" "t.a.fifo_element[10].buf_func.pr_B"
+= "t.a.fifo_element[10]._reset_BX" "t.a.fifo_element[10].inack_ctl.sr_B"
+= "t.a.fifo_element[10]._reset_BX" "t.a.fifo_element[10].inack_ctl.pr_B"
+= "t.a.fifo_element[10]._en" "t.a.fifo_element[10].buf_func.c1"
+= "t.a.fifo_element[10]._en" "t.a.fifo_element[10].en_ctl.y"
+= "t.a.fifo_element[10]._en" "t.a.fifo_element[10].inack_ctl.c1"
+~"t.a.fifo_element[10].en_ctl.p1"&~"t.a.fifo_element[10].en_ctl.c1"->"t.a.fifo_element[10].en_ctl.y"+
+"t.a.fifo_element[10].en_ctl.c1"->"t.a.fifo_element[10].en_ctl.y"-
+= "t.a.fifo_element[10]._out_a_B" "t.a.fifo_element[10].buf_func.c2"
+= "t.a.fifo_element[10]._out_a_B" "t.a.fifo_element[10].inv_outa.y"
+= "t.a.fifo_element[10].in.d.d[0]" "t.a.fifo_element[10].in.r"
+= "t.a.fifo_element[10].in.a" "t.a.fifo_element[10].en_ctl.c1"
+= "t.a.fifo_element[10].in.a" "t.a.fifo_element[10].inack_ctl.y"
+= "t.a.fifo_element[10].in.d.d[0]" "t.a.fifo_element[10].buf_func.n1"
+= "t.a.fifo_element[10].in.d.d[0]" "t.a.fifo_element[10].inack_ctl.c2"
+= "t.a.fifo_element[10].in.d.d[0]" "t.a.fifo_element[10].in.r"
+= "t.a.fifo_element[10].out.d.d[0]" "t.a.fifo_element[10].out.r"
+= "t.a.fifo_element[10].out.a" "t.a.fifo_element[10].inv_outa.a"
+= "t.a.fifo_element[10].out.d.d[0]" "t.a.fifo_element[10].buf_func.y"
+= "t.a.fifo_element[10].out.d.d[0]" "t.a.fifo_element[10].en_ctl.p1"
+= "t.a.fifo_element[10].out.d.d[0]" "t.a.fifo_element[10].inack_ctl.n1"
+= "t.a.fifo_element[10].out.d.d[0]" "t.a.fifo_element[10].out.r"
+"t.a.fifo_element[11].reset_buf.a"->"t.a.fifo_element[11].reset_buf._y"-
+~("t.a.fifo_element[11].reset_buf.a")->"t.a.fifo_element[11].reset_buf._y"+
+"t.a.fifo_element[11].reset_buf._y"->"t.a.fifo_element[11].reset_buf.y"-
+~("t.a.fifo_element[11].reset_buf._y")->"t.a.fifo_element[11].reset_buf.y"+
+"t.a.fifo_element[11].inv_outa.a"->"t.a.fifo_element[11].inv_outa.y"-
+~("t.a.fifo_element[11].inv_outa.a")->"t.a.fifo_element[11].inv_outa.y"+
+~"t.a.fifo_element[11].inack_ctl.c1"&~"t.a.fifo_element[11].inack_ctl.c2"|~"t.a.fifo_element[11].inack_ctl.pr_B"->"t.a.fifo_element[11].inack_ctl._y"+
+"t.a.fifo_element[11].inack_ctl.c1"&"t.a.fifo_element[11].inack_ctl.c2"&"t.a.fifo_element[11].inack_ctl.n1"&"t.a.fifo_element[11].inack_ctl.sr_B"->"t.a.fifo_element[11].inack_ctl._y"-
+"t.a.fifo_element[11].inack_ctl._y"->"t.a.fifo_element[11].inack_ctl.y"-
+~("t.a.fifo_element[11].inack_ctl._y")->"t.a.fifo_element[11].inack_ctl.y"+
+~"t.a.fifo_element[11].buf_func.c1"&~"t.a.fifo_element[11].buf_func.c2"|~"t.a.fifo_element[11].buf_func.pr_B"->"t.a.fifo_element[11].buf_func._y"+
+"t.a.fifo_element[11].buf_func.c1"&"t.a.fifo_element[11].buf_func.c2"&"t.a.fifo_element[11].buf_func.n1"&"t.a.fifo_element[11].buf_func.sr_B"->"t.a.fifo_element[11].buf_func._y"-
+"t.a.fifo_element[11].buf_func._y"->"t.a.fifo_element[11].buf_func.y"-
+~("t.a.fifo_element[11].buf_func._y")->"t.a.fifo_element[11].buf_func.y"+
+= "t.a.fifo_element[11].reset_B" "t.a.fifo_element[11].reset_buf.a"
+= "t.a.fifo_element[11].supply.vdd" "t.a.fifo_element[11].reset_buf.vdd"
+= "t.a.fifo_element[11].supply.vdd" "t.a.fifo_element[11].buf_func.vdd"
+= "t.a.fifo_element[11].supply.vdd" "t.a.fifo_element[11].inv_outa.vdd"
+= "t.a.fifo_element[11].supply.vdd" "t.a.fifo_element[11].en_ctl.vdd"
+= "t.a.fifo_element[11].supply.vdd" "t.a.fifo_element[11].inack_ctl.vdd"
+= "t.a.fifo_element[11].supply.vss" "t.a.fifo_element[11].reset_buf.vss"
+= "t.a.fifo_element[11].supply.vss" "t.a.fifo_element[11].buf_func.vss"
+= "t.a.fifo_element[11].supply.vss" "t.a.fifo_element[11].inv_outa.vss"
+= "t.a.fifo_element[11].supply.vss" "t.a.fifo_element[11].en_ctl.vss"
+= "t.a.fifo_element[11].supply.vss" "t.a.fifo_element[11].inack_ctl.vss"
+= "t.a.fifo_element[11]._reset_BX" "t.a.fifo_element[11].reset_buf.y"
+= "t.a.fifo_element[11]._reset_BX" "t.a.fifo_element[11].buf_func.sr_B"
+= "t.a.fifo_element[11]._reset_BX" "t.a.fifo_element[11].buf_func.pr_B"
+= "t.a.fifo_element[11]._reset_BX" "t.a.fifo_element[11].inack_ctl.sr_B"
+= "t.a.fifo_element[11]._reset_BX" "t.a.fifo_element[11].inack_ctl.pr_B"
+= "t.a.fifo_element[11]._en" "t.a.fifo_element[11].buf_func.c1"
+= "t.a.fifo_element[11]._en" "t.a.fifo_element[11].en_ctl.y"
+= "t.a.fifo_element[11]._en" "t.a.fifo_element[11].inack_ctl.c1"
+~"t.a.fifo_element[11].en_ctl.p1"&~"t.a.fifo_element[11].en_ctl.c1"->"t.a.fifo_element[11].en_ctl.y"+
+"t.a.fifo_element[11].en_ctl.c1"->"t.a.fifo_element[11].en_ctl.y"-
+= "t.a.fifo_element[11]._out_a_B" "t.a.fifo_element[11].buf_func.c2"
+= "t.a.fifo_element[11]._out_a_B" "t.a.fifo_element[11].inv_outa.y"
+= "t.a.fifo_element[11].in.d.d[0]" "t.a.fifo_element[11].in.r"
+= "t.a.fifo_element[11].in.a" "t.a.fifo_element[11].en_ctl.c1"
+= "t.a.fifo_element[11].in.a" "t.a.fifo_element[11].inack_ctl.y"
+= "t.a.fifo_element[11].in.d.d[0]" "t.a.fifo_element[11].buf_func.n1"
+= "t.a.fifo_element[11].in.d.d[0]" "t.a.fifo_element[11].inack_ctl.c2"
+= "t.a.fifo_element[11].in.d.d[0]" "t.a.fifo_element[11].in.r"
+= "t.a.fifo_element[11].out.d.d[0]" "t.a.fifo_element[11].out.r"
+= "t.a.fifo_element[11].out.a" "t.a.fifo_element[11].inv_outa.a"
+= "t.a.fifo_element[11].out.d.d[0]" "t.a.fifo_element[11].buf_func.y"
+= "t.a.fifo_element[11].out.d.d[0]" "t.a.fifo_element[11].en_ctl.p1"
+= "t.a.fifo_element[11].out.d.d[0]" "t.a.fifo_element[11].inack_ctl.n1"
+= "t.a.fifo_element[11].out.d.d[0]" "t.a.fifo_element[11].out.r"
+"t.a.fifo_element[12].reset_buf.a"->"t.a.fifo_element[12].reset_buf._y"-
+~("t.a.fifo_element[12].reset_buf.a")->"t.a.fifo_element[12].reset_buf._y"+
+"t.a.fifo_element[12].reset_buf._y"->"t.a.fifo_element[12].reset_buf.y"-
+~("t.a.fifo_element[12].reset_buf._y")->"t.a.fifo_element[12].reset_buf.y"+
+"t.a.fifo_element[12].inv_outa.a"->"t.a.fifo_element[12].inv_outa.y"-
+~("t.a.fifo_element[12].inv_outa.a")->"t.a.fifo_element[12].inv_outa.y"+
+~"t.a.fifo_element[12].inack_ctl.c1"&~"t.a.fifo_element[12].inack_ctl.c2"|~"t.a.fifo_element[12].inack_ctl.pr_B"->"t.a.fifo_element[12].inack_ctl._y"+
+"t.a.fifo_element[12].inack_ctl.c1"&"t.a.fifo_element[12].inack_ctl.c2"&"t.a.fifo_element[12].inack_ctl.n1"&"t.a.fifo_element[12].inack_ctl.sr_B"->"t.a.fifo_element[12].inack_ctl._y"-
+"t.a.fifo_element[12].inack_ctl._y"->"t.a.fifo_element[12].inack_ctl.y"-
+~("t.a.fifo_element[12].inack_ctl._y")->"t.a.fifo_element[12].inack_ctl.y"+
+~"t.a.fifo_element[12].buf_func.c1"&~"t.a.fifo_element[12].buf_func.c2"|~"t.a.fifo_element[12].buf_func.pr_B"->"t.a.fifo_element[12].buf_func._y"+
+"t.a.fifo_element[12].buf_func.c1"&"t.a.fifo_element[12].buf_func.c2"&"t.a.fifo_element[12].buf_func.n1"&"t.a.fifo_element[12].buf_func.sr_B"->"t.a.fifo_element[12].buf_func._y"-
+"t.a.fifo_element[12].buf_func._y"->"t.a.fifo_element[12].buf_func.y"-
+~("t.a.fifo_element[12].buf_func._y")->"t.a.fifo_element[12].buf_func.y"+
+= "t.a.fifo_element[12].reset_B" "t.a.fifo_element[12].reset_buf.a"
+= "t.a.fifo_element[12].supply.vdd" "t.a.fifo_element[12].reset_buf.vdd"
+= "t.a.fifo_element[12].supply.vdd" "t.a.fifo_element[12].buf_func.vdd"
+= "t.a.fifo_element[12].supply.vdd" "t.a.fifo_element[12].inv_outa.vdd"
+= "t.a.fifo_element[12].supply.vdd" "t.a.fifo_element[12].en_ctl.vdd"
+= "t.a.fifo_element[12].supply.vdd" "t.a.fifo_element[12].inack_ctl.vdd"
+= "t.a.fifo_element[12].supply.vss" "t.a.fifo_element[12].reset_buf.vss"
+= "t.a.fifo_element[12].supply.vss" "t.a.fifo_element[12].buf_func.vss"
+= "t.a.fifo_element[12].supply.vss" "t.a.fifo_element[12].inv_outa.vss"
+= "t.a.fifo_element[12].supply.vss" "t.a.fifo_element[12].en_ctl.vss"
+= "t.a.fifo_element[12].supply.vss" "t.a.fifo_element[12].inack_ctl.vss"
+= "t.a.fifo_element[12]._reset_BX" "t.a.fifo_element[12].reset_buf.y"
+= "t.a.fifo_element[12]._reset_BX" "t.a.fifo_element[12].buf_func.sr_B"
+= "t.a.fifo_element[12]._reset_BX" "t.a.fifo_element[12].buf_func.pr_B"
+= "t.a.fifo_element[12]._reset_BX" "t.a.fifo_element[12].inack_ctl.sr_B"
+= "t.a.fifo_element[12]._reset_BX" "t.a.fifo_element[12].inack_ctl.pr_B"
+= "t.a.fifo_element[12]._en" "t.a.fifo_element[12].buf_func.c1"
+= "t.a.fifo_element[12]._en" "t.a.fifo_element[12].en_ctl.y"
+= "t.a.fifo_element[12]._en" "t.a.fifo_element[12].inack_ctl.c1"
+~"t.a.fifo_element[12].en_ctl.p1"&~"t.a.fifo_element[12].en_ctl.c1"->"t.a.fifo_element[12].en_ctl.y"+
+"t.a.fifo_element[12].en_ctl.c1"->"t.a.fifo_element[12].en_ctl.y"-
+= "t.a.fifo_element[12]._out_a_B" "t.a.fifo_element[12].buf_func.c2"
+= "t.a.fifo_element[12]._out_a_B" "t.a.fifo_element[12].inv_outa.y"
+= "t.a.fifo_element[12].in.d.d[0]" "t.a.fifo_element[12].in.r"
+= "t.a.fifo_element[12].in.a" "t.a.fifo_element[12].en_ctl.c1"
+= "t.a.fifo_element[12].in.a" "t.a.fifo_element[12].inack_ctl.y"
+= "t.a.fifo_element[12].in.d.d[0]" "t.a.fifo_element[12].buf_func.n1"
+= "t.a.fifo_element[12].in.d.d[0]" "t.a.fifo_element[12].inack_ctl.c2"
+= "t.a.fifo_element[12].in.d.d[0]" "t.a.fifo_element[12].in.r"
+= "t.a.fifo_element[12].out.d.d[0]" "t.a.fifo_element[12].out.r"
+= "t.a.fifo_element[12].out.a" "t.a.fifo_element[12].inv_outa.a"
+= "t.a.fifo_element[12].out.d.d[0]" "t.a.fifo_element[12].buf_func.y"
+= "t.a.fifo_element[12].out.d.d[0]" "t.a.fifo_element[12].en_ctl.p1"
+= "t.a.fifo_element[12].out.d.d[0]" "t.a.fifo_element[12].inack_ctl.n1"
+= "t.a.fifo_element[12].out.d.d[0]" "t.a.fifo_element[12].out.r"
+"t.a.fifo_element[13].reset_buf.a"->"t.a.fifo_element[13].reset_buf._y"-
+~("t.a.fifo_element[13].reset_buf.a")->"t.a.fifo_element[13].reset_buf._y"+
+"t.a.fifo_element[13].reset_buf._y"->"t.a.fifo_element[13].reset_buf.y"-
+~("t.a.fifo_element[13].reset_buf._y")->"t.a.fifo_element[13].reset_buf.y"+
+"t.a.fifo_element[13].inv_outa.a"->"t.a.fifo_element[13].inv_outa.y"-
+~("t.a.fifo_element[13].inv_outa.a")->"t.a.fifo_element[13].inv_outa.y"+
+~"t.a.fifo_element[13].inack_ctl.c1"&~"t.a.fifo_element[13].inack_ctl.c2"|~"t.a.fifo_element[13].inack_ctl.pr_B"->"t.a.fifo_element[13].inack_ctl._y"+
+"t.a.fifo_element[13].inack_ctl.c1"&"t.a.fifo_element[13].inack_ctl.c2"&"t.a.fifo_element[13].inack_ctl.n1"&"t.a.fifo_element[13].inack_ctl.sr_B"->"t.a.fifo_element[13].inack_ctl._y"-
+"t.a.fifo_element[13].inack_ctl._y"->"t.a.fifo_element[13].inack_ctl.y"-
+~("t.a.fifo_element[13].inack_ctl._y")->"t.a.fifo_element[13].inack_ctl.y"+
+~"t.a.fifo_element[13].buf_func.c1"&~"t.a.fifo_element[13].buf_func.c2"|~"t.a.fifo_element[13].buf_func.pr_B"->"t.a.fifo_element[13].buf_func._y"+
+"t.a.fifo_element[13].buf_func.c1"&"t.a.fifo_element[13].buf_func.c2"&"t.a.fifo_element[13].buf_func.n1"&"t.a.fifo_element[13].buf_func.sr_B"->"t.a.fifo_element[13].buf_func._y"-
+"t.a.fifo_element[13].buf_func._y"->"t.a.fifo_element[13].buf_func.y"-
+~("t.a.fifo_element[13].buf_func._y")->"t.a.fifo_element[13].buf_func.y"+
+= "t.a.fifo_element[13].reset_B" "t.a.fifo_element[13].reset_buf.a"
+= "t.a.fifo_element[13].supply.vdd" "t.a.fifo_element[13].reset_buf.vdd"
+= "t.a.fifo_element[13].supply.vdd" "t.a.fifo_element[13].buf_func.vdd"
+= "t.a.fifo_element[13].supply.vdd" "t.a.fifo_element[13].inv_outa.vdd"
+= "t.a.fifo_element[13].supply.vdd" "t.a.fifo_element[13].en_ctl.vdd"
+= "t.a.fifo_element[13].supply.vdd" "t.a.fifo_element[13].inack_ctl.vdd"
+= "t.a.fifo_element[13].supply.vss" "t.a.fifo_element[13].reset_buf.vss"
+= "t.a.fifo_element[13].supply.vss" "t.a.fifo_element[13].buf_func.vss"
+= "t.a.fifo_element[13].supply.vss" "t.a.fifo_element[13].inv_outa.vss"
+= "t.a.fifo_element[13].supply.vss" "t.a.fifo_element[13].en_ctl.vss"
+= "t.a.fifo_element[13].supply.vss" "t.a.fifo_element[13].inack_ctl.vss"
+= "t.a.fifo_element[13]._reset_BX" "t.a.fifo_element[13].reset_buf.y"
+= "t.a.fifo_element[13]._reset_BX" "t.a.fifo_element[13].buf_func.sr_B"
+= "t.a.fifo_element[13]._reset_BX" "t.a.fifo_element[13].buf_func.pr_B"
+= "t.a.fifo_element[13]._reset_BX" "t.a.fifo_element[13].inack_ctl.sr_B"
+= "t.a.fifo_element[13]._reset_BX" "t.a.fifo_element[13].inack_ctl.pr_B"
+= "t.a.fifo_element[13]._en" "t.a.fifo_element[13].buf_func.c1"
+= "t.a.fifo_element[13]._en" "t.a.fifo_element[13].en_ctl.y"
+= "t.a.fifo_element[13]._en" "t.a.fifo_element[13].inack_ctl.c1"
+~"t.a.fifo_element[13].en_ctl.p1"&~"t.a.fifo_element[13].en_ctl.c1"->"t.a.fifo_element[13].en_ctl.y"+
+"t.a.fifo_element[13].en_ctl.c1"->"t.a.fifo_element[13].en_ctl.y"-
+= "t.a.fifo_element[13]._out_a_B" "t.a.fifo_element[13].buf_func.c2"
+= "t.a.fifo_element[13]._out_a_B" "t.a.fifo_element[13].inv_outa.y"
+= "t.a.fifo_element[13].in.d.d[0]" "t.a.fifo_element[13].in.r"
+= "t.a.fifo_element[13].in.a" "t.a.fifo_element[13].en_ctl.c1"
+= "t.a.fifo_element[13].in.a" "t.a.fifo_element[13].inack_ctl.y"
+= "t.a.fifo_element[13].in.d.d[0]" "t.a.fifo_element[13].buf_func.n1"
+= "t.a.fifo_element[13].in.d.d[0]" "t.a.fifo_element[13].inack_ctl.c2"
+= "t.a.fifo_element[13].in.d.d[0]" "t.a.fifo_element[13].in.r"
+= "t.a.fifo_element[13].out.d.d[0]" "t.a.fifo_element[13].out.r"
+= "t.a.fifo_element[13].out.a" "t.a.fifo_element[13].inv_outa.a"
+= "t.a.fifo_element[13].out.d.d[0]" "t.a.fifo_element[13].buf_func.y"
+= "t.a.fifo_element[13].out.d.d[0]" "t.a.fifo_element[13].en_ctl.p1"
+= "t.a.fifo_element[13].out.d.d[0]" "t.a.fifo_element[13].inack_ctl.n1"
+= "t.a.fifo_element[13].out.d.d[0]" "t.a.fifo_element[13].out.r"
+"t.a.fifo_element[14].reset_buf.a"->"t.a.fifo_element[14].reset_buf._y"-
+~("t.a.fifo_element[14].reset_buf.a")->"t.a.fifo_element[14].reset_buf._y"+
+"t.a.fifo_element[14].reset_buf._y"->"t.a.fifo_element[14].reset_buf.y"-
+~("t.a.fifo_element[14].reset_buf._y")->"t.a.fifo_element[14].reset_buf.y"+
+"t.a.fifo_element[14].inv_outa.a"->"t.a.fifo_element[14].inv_outa.y"-
+~("t.a.fifo_element[14].inv_outa.a")->"t.a.fifo_element[14].inv_outa.y"+
+~"t.a.fifo_element[14].inack_ctl.c1"&~"t.a.fifo_element[14].inack_ctl.c2"|~"t.a.fifo_element[14].inack_ctl.pr_B"->"t.a.fifo_element[14].inack_ctl._y"+
+"t.a.fifo_element[14].inack_ctl.c1"&"t.a.fifo_element[14].inack_ctl.c2"&"t.a.fifo_element[14].inack_ctl.n1"&"t.a.fifo_element[14].inack_ctl.sr_B"->"t.a.fifo_element[14].inack_ctl._y"-
+"t.a.fifo_element[14].inack_ctl._y"->"t.a.fifo_element[14].inack_ctl.y"-
+~("t.a.fifo_element[14].inack_ctl._y")->"t.a.fifo_element[14].inack_ctl.y"+
+~"t.a.fifo_element[14].buf_func.c1"&~"t.a.fifo_element[14].buf_func.c2"|~"t.a.fifo_element[14].buf_func.pr_B"->"t.a.fifo_element[14].buf_func._y"+
+"t.a.fifo_element[14].buf_func.c1"&"t.a.fifo_element[14].buf_func.c2"&"t.a.fifo_element[14].buf_func.n1"&"t.a.fifo_element[14].buf_func.sr_B"->"t.a.fifo_element[14].buf_func._y"-
+"t.a.fifo_element[14].buf_func._y"->"t.a.fifo_element[14].buf_func.y"-
+~("t.a.fifo_element[14].buf_func._y")->"t.a.fifo_element[14].buf_func.y"+
+= "t.a.fifo_element[14].reset_B" "t.a.fifo_element[14].reset_buf.a"
+= "t.a.fifo_element[14].supply.vdd" "t.a.fifo_element[14].reset_buf.vdd"
+= "t.a.fifo_element[14].supply.vdd" "t.a.fifo_element[14].buf_func.vdd"
+= "t.a.fifo_element[14].supply.vdd" "t.a.fifo_element[14].inv_outa.vdd"
+= "t.a.fifo_element[14].supply.vdd" "t.a.fifo_element[14].en_ctl.vdd"
+= "t.a.fifo_element[14].supply.vdd" "t.a.fifo_element[14].inack_ctl.vdd"
+= "t.a.fifo_element[14].supply.vss" "t.a.fifo_element[14].reset_buf.vss"
+= "t.a.fifo_element[14].supply.vss" "t.a.fifo_element[14].buf_func.vss"
+= "t.a.fifo_element[14].supply.vss" "t.a.fifo_element[14].inv_outa.vss"
+= "t.a.fifo_element[14].supply.vss" "t.a.fifo_element[14].en_ctl.vss"
+= "t.a.fifo_element[14].supply.vss" "t.a.fifo_element[14].inack_ctl.vss"
+= "t.a.fifo_element[14]._reset_BX" "t.a.fifo_element[14].reset_buf.y"
+= "t.a.fifo_element[14]._reset_BX" "t.a.fifo_element[14].buf_func.sr_B"
+= "t.a.fifo_element[14]._reset_BX" "t.a.fifo_element[14].buf_func.pr_B"
+= "t.a.fifo_element[14]._reset_BX" "t.a.fifo_element[14].inack_ctl.sr_B"
+= "t.a.fifo_element[14]._reset_BX" "t.a.fifo_element[14].inack_ctl.pr_B"
+= "t.a.fifo_element[14]._en" "t.a.fifo_element[14].buf_func.c1"
+= "t.a.fifo_element[14]._en" "t.a.fifo_element[14].en_ctl.y"
+= "t.a.fifo_element[14]._en" "t.a.fifo_element[14].inack_ctl.c1"
+~"t.a.fifo_element[14].en_ctl.p1"&~"t.a.fifo_element[14].en_ctl.c1"->"t.a.fifo_element[14].en_ctl.y"+
+"t.a.fifo_element[14].en_ctl.c1"->"t.a.fifo_element[14].en_ctl.y"-
+= "t.a.fifo_element[14]._out_a_B" "t.a.fifo_element[14].buf_func.c2"
+= "t.a.fifo_element[14]._out_a_B" "t.a.fifo_element[14].inv_outa.y"
+= "t.a.fifo_element[14].in.d.d[0]" "t.a.fifo_element[14].in.r"
+= "t.a.fifo_element[14].in.a" "t.a.fifo_element[14].en_ctl.c1"
+= "t.a.fifo_element[14].in.a" "t.a.fifo_element[14].inack_ctl.y"
+= "t.a.fifo_element[14].in.d.d[0]" "t.a.fifo_element[14].buf_func.n1"
+= "t.a.fifo_element[14].in.d.d[0]" "t.a.fifo_element[14].inack_ctl.c2"
+= "t.a.fifo_element[14].in.d.d[0]" "t.a.fifo_element[14].in.r"
+= "t.a.fifo_element[14].out.d.d[0]" "t.a.fifo_element[14].out.r"
+= "t.a.fifo_element[14].out.a" "t.a.fifo_element[14].inv_outa.a"
+= "t.a.fifo_element[14].out.d.d[0]" "t.a.fifo_element[14].buf_func.y"
+= "t.a.fifo_element[14].out.d.d[0]" "t.a.fifo_element[14].en_ctl.p1"
+= "t.a.fifo_element[14].out.d.d[0]" "t.a.fifo_element[14].inack_ctl.n1"
+= "t.a.fifo_element[14].out.d.d[0]" "t.a.fifo_element[14].out.r"
+= "t.a.fifo_element[14].in.a" "t.a.fifo_element[13].out.a"
+= "t.a.fifo_element[14].in.d.d[0]" "t.a.fifo_element[13].out.r"
+= "t.a.fifo_element[14].in.d.d[0]" "t.a.fifo_element[13].out.d.d[0]"
+= "t.a.fifo_element[14].in.d.d[0]" "t.a.fifo_element[14].in.r"
+= "t.a.fifo_element[13].in.a" "t.a.fifo_element[12].out.a"
+= "t.a.fifo_element[13].in.d.d[0]" "t.a.fifo_element[12].out.r"
+= "t.a.fifo_element[13].in.d.d[0]" "t.a.fifo_element[12].out.d.d[0]"
+= "t.a.fifo_element[13].in.d.d[0]" "t.a.fifo_element[13].in.r"
+= "t.a.fifo_element[12].in.a" "t.a.fifo_element[11].out.a"
+= "t.a.fifo_element[12].in.d.d[0]" "t.a.fifo_element[11].out.r"
+= "t.a.fifo_element[12].in.d.d[0]" "t.a.fifo_element[11].out.d.d[0]"
+= "t.a.fifo_element[12].in.d.d[0]" "t.a.fifo_element[12].in.r"
+= "t.a.fifo_element[11].in.a" "t.a.fifo_element[10].out.a"
+= "t.a.fifo_element[11].in.d.d[0]" "t.a.fifo_element[10].out.r"
+= "t.a.fifo_element[11].in.d.d[0]" "t.a.fifo_element[10].out.d.d[0]"
+= "t.a.fifo_element[11].in.d.d[0]" "t.a.fifo_element[11].in.r"
+= "t.a.fifo_element[10].in.a" "t.a.fifo_element[9].out.a"
+= "t.a.fifo_element[10].in.d.d[0]" "t.a.fifo_element[9].out.r"
+= "t.a.fifo_element[10].in.d.d[0]" "t.a.fifo_element[9].out.d.d[0]"
+= "t.a.fifo_element[10].in.d.d[0]" "t.a.fifo_element[10].in.r"
+= "t.a.fifo_element[9].in.a" "t.a.fifo_element[8].out.a"
+= "t.a.fifo_element[9].in.d.d[0]" "t.a.fifo_element[8].out.r"
+= "t.a.fifo_element[9].in.d.d[0]" "t.a.fifo_element[8].out.d.d[0]"
+= "t.a.fifo_element[9].in.d.d[0]" "t.a.fifo_element[9].in.r"
+= "t.a.fifo_element[8].in.a" "t.a.fifo_element[7].out.a"
+= "t.a.fifo_element[8].in.d.d[0]" "t.a.fifo_element[7].out.r"
+= "t.a.fifo_element[8].in.d.d[0]" "t.a.fifo_element[7].out.d.d[0]"
+= "t.a.fifo_element[8].in.d.d[0]" "t.a.fifo_element[8].in.r"
+= "t.a.fifo_element[7].in.a" "t.a.fifo_element[6].out.a"
+= "t.a.fifo_element[7].in.d.d[0]" "t.a.fifo_element[6].out.r"
+= "t.a.fifo_element[7].in.d.d[0]" "t.a.fifo_element[6].out.d.d[0]"
+= "t.a.fifo_element[7].in.d.d[0]" "t.a.fifo_element[7].in.r"
+= "t.a.fifo_element[6].in.a" "t.a.fifo_element[5].out.a"
+= "t.a.fifo_element[6].in.d.d[0]" "t.a.fifo_element[5].out.r"
+= "t.a.fifo_element[6].in.d.d[0]" "t.a.fifo_element[5].out.d.d[0]"
+= "t.a.fifo_element[6].in.d.d[0]" "t.a.fifo_element[6].in.r"
+= "t.a.fifo_element[5].in.a" "t.a.fifo_element[4].out.a"
+= "t.a.fifo_element[5].in.d.d[0]" "t.a.fifo_element[4].out.r"
+= "t.a.fifo_element[5].in.d.d[0]" "t.a.fifo_element[4].out.d.d[0]"
+= "t.a.fifo_element[5].in.d.d[0]" "t.a.fifo_element[5].in.r"
+= "t.a.fifo_element[4].in.a" "t.a.fifo_element[3].out.a"
+= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[3].out.r"
+= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[3].out.d.d[0]"
+= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[4].in.r"
+= "t.a.fifo_element[3].in.a" "t.a.fifo_element[2].out.a"
+= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[2].out.r"
+= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[2].out.d.d[0]"
+= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[3].in.r"
+= "t.a.fifo_element[2].in.a" "t.a.fifo_element[1].out.a"
+= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[1].out.r"
+= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[1].out.d.d[0]"
+= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[2].in.r"
+= "t.a.fifo_element[1].in.a" "t.a.fifo_element[0].out.a"
+= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[0].out.r"
+= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[0].out.d.d[0]"
+= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[1].in.r"
+= "t.a._reset_BXX[0]" "t.a.reset_bufarray.out[0]"
+= "t.a._reset_BXX[1]" "t.a.reset_bufarray.out[1]"
+= "t.a._reset_BXX[2]" "t.a.reset_bufarray.out[2]"
+= "t.a._reset_BXX[3]" "t.a.reset_bufarray.out[3]"
+= "t.a._reset_BXX[4]" "t.a.reset_bufarray.out[4]"
+= "t.a._reset_BXX[5]" "t.a.reset_bufarray.out[5]"
+= "t.a._reset_BXX[6]" "t.a.reset_bufarray.out[6]"
+= "t.a._reset_BXX[7]" "t.a.reset_bufarray.out[7]"
+= "t.a._reset_BXX[8]" "t.a.reset_bufarray.out[8]"
+= "t.a._reset_BXX[9]" "t.a.reset_bufarray.out[9]"
+= "t.a._reset_BXX[10]" "t.a.reset_bufarray.out[10]"
+= "t.a._reset_BXX[11]" "t.a.reset_bufarray.out[11]"
+= "t.a._reset_BXX[12]" "t.a.reset_bufarray.out[12]"
+= "t.a._reset_BXX[13]" "t.a.reset_bufarray.out[13]"
+= "t.a._reset_BXX[14]" "t.a.reset_bufarray.out[14]"
+= "t.a._reset_BXX[14]" "t.a.fifo_element[13].reset_B"
+= "t.a._reset_BXX[14]" "t.a._reset_BXX[13]"
+= "t.a._reset_BXX[14]" "t.a.fifo_element[12].reset_B"
+= "t.a._reset_BXX[14]" "t.a._reset_BXX[12]"
+= "t.a._reset_BXX[14]" "t.a.fifo_element[11].reset_B"
+= "t.a._reset_BXX[14]" "t.a._reset_BXX[11]"
+= "t.a._reset_BXX[14]" "t.a.fifo_element[10].reset_B"
+= "t.a._reset_BXX[14]" "t.a._reset_BXX[10]"
+= "t.a._reset_BXX[14]" "t.a.fifo_element[9].reset_B"
+= "t.a._reset_BXX[14]" "t.a._reset_BXX[9]"
+= "t.a._reset_BXX[14]" "t.a.fifo_element[8].reset_B"
+= "t.a._reset_BXX[14]" "t.a._reset_BXX[8]"
+= "t.a._reset_BXX[14]" "t.a.fifo_element[7].reset_B"
+= "t.a._reset_BXX[14]" "t.a._reset_BXX[7]"
+= "t.a._reset_BXX[14]" "t.a.fifo_element[6].reset_B"
+= "t.a._reset_BXX[14]" "t.a._reset_BXX[6]"
+= "t.a._reset_BXX[14]" "t.a.fifo_element[5].reset_B"
+= "t.a._reset_BXX[14]" "t.a._reset_BXX[5]"
+= "t.a._reset_BXX[14]" "t.a.fifo_element[4].reset_B"
+= "t.a._reset_BXX[14]" "t.a._reset_BXX[4]"
+= "t.a._reset_BXX[14]" "t.a.fifo_element[3].reset_B"
+= "t.a._reset_BXX[14]" "t.a._reset_BXX[3]"
+= "t.a._reset_BXX[14]" "t.a.fifo_element[2].reset_B"
+= "t.a._reset_BXX[14]" "t.a._reset_BXX[2]"
+= "t.a._reset_BXX[14]" "t.a.fifo_element[1].reset_B"
+= "t.a._reset_BXX[14]" "t.a._reset_BXX[1]"
+= "t.a._reset_BXX[14]" "t.a.fifo_element[0].reset_B"
+= "t.a._reset_BXX[14]" "t.a._reset_BXX[0]"
+= "t.a._reset_BXX[14]" "t.a.fifo_element[14].reset_B"
+= "t.a.in.d.d[0]" "t.a.in.r"
+= "t.a.in.a" "t.a.fifo_element[0].in.a"
+= "t.a.in.d.d[0]" "t.a.fifo_element[0].in.r"
+= "t.a.in.d.d[0]" "t.a.fifo_element[0].in.d.d[0]"
+= "t.a.in.d.d[0]" "t.a.in.r"
+= "t.a.out.d.d[0]" "t.a.out.r"
+= "t.a.out.a" "t.a.fifo_element[14].out.a"
+= "t.a.out.d.d[0]" "t.a.fifo_element[14].out.r"
+= "t.a.out.d.d[0]" "t.a.fifo_element[14].out.d.d[0]"
+= "t.a.out.d.d[0]" "t.a.out.r"
+= "Reset" "t.a.reset_B"
+= "Vdd" "t.a.supply.vdd"
+= "GND" "t.a.supply.vss"
+= "t.out.d.d[0]" "t.out.r"
+= "t.out.r" "t.a.out.r"
+= "t.out.a" "t.a.out.a"
+= "t.out.d.d[0]" "t.a.out.d.d[0]"
+= "t.out.d.d[0]" "t.out.r"
+= "t.in.d.d[0]" "t.in.r"
+= "t.in.r" "t.a.in.r"
+= "t.in.a" "t.a.in.a"
+= "t.in.d.d[0]" "t.a.in.d.d[0]"
+= "t.in.d.d[0]" "t.in.r"

test/unit_tests/fifo_t_15/test.act

@@ -0,0 +1,43 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/primitives.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+defproc fifo_test(a1of1 in; a1of1 out)
+{
+  fifo_t<15> a(.in = in, .out = out);
+  a.supply.vdd = Vdd;
+  a.supply.vss = GND; 
+  a.reset_B = Reset;
+
+}
+
+fifo_test t;

test/unit_tests/fifo_t_15/test.prsim

@@ -0,0 +1,49 @@
+watchall
+system "echo '[0] code starts'"
+set t.in.r 0
+set t.out.a 0
+cycle
+set Reset 0
+cycle
+status X
+mode run
+set Reset 1
+cycle
+system "echo '[1] reset done'"
+system "echo '----------------------------------------------------------------------------------------------------'"
+set t.in.r 1
+cycle
+set t.in.r 0
+system "echo '1 bit inside'"
+set t.in.r 1
+cycle
+set t.in.r 0
+cycle
+system "echo '2 bit inside'"
+set t.in.r 1
+cycle
+set t.in.r 0
+cycle
+system "echo '3 bit inside'"
+set t.in.r 1
+cycle
+set t.in.r 0
+cycle
+system "echo '4 bit inside'"
+set t.in.r 1
+cycle
+set t.in.r 0
+cycle
+system "echo '5 bit inside'"
+set t.in.r 1
+cycle
+set t.in.r 0
+cycle
+system "echo '6 bit inside'"
+set t.in.r 1
+cycle
+set t.in.r 0
+cycle
+system "echo '7 bit inside'"
+assert t.out.r 1
+

test/unit_tests/fifo_t_5/run/prsim.out

@@ -0,0 +1,250 @@
+t.a.fifo_element[1]._en t.a.fifo_element[0]._out_a_B t.a.fifo_element[1]._out_a_B t.a.fifo_element[1].in.r t.in.r t.a.fifo_element[2]._en t.out.r t.a.fifo_element[0].buf_func._y t.a.fifo_element[3]._en t.a.fifo_element[3].inack_ctl._y t.a.fifo_element[1].in.a t.a.fifo_element[3].in.a t.a.fifo_element[2].in.r t.a.fifo_element[3]._out_a_B t.a.fifo_element[3].in.r t.a.fifo_element[2].in.a t.a.fifo_element[0]._en t.out.a t.a.fifo_element[4].in.r t.a.fifo_element[4]._en t.in.a t.a.fifo_element[2].inack_ctl._y t.a.fifo_element[4]._out_a_B t.a.fifo_element[4].buf_func._y t.a.fifo_element[1].inack_ctl._y t.a.fifo_element[4].in.a t.a.fifo_element[2]._out_a_B t.a.fifo_element[3].buf_func._y t.a.fifo_element[4].inack_ctl._y t.a.fifo_element[2].buf_func._y t.a.fifo_element[0].inack_ctl._y t.a.fifo_element[1].buf_func._y 
+[] code starts
+	     82968 t.in.r : 0
+	     82968 t.out.a : 0
+	     83383 t.a.fifo_element[4]._out_a_B : 1  [by t.out.a:=0]
+[] set Reset(B) low
+	     83383 Reset : 0
+	     83403 t.a.reset_buf._y : 1  [by Reset:=0]
+	     89464 t.a._reset_BX : 0  [by t.a.reset_buf._y:=1]
+	     89511 t.a.reset_bufarray.buf2._y : 1  [by t.a._reset_BX:=0]
+	     89527 t.a._reset_BXX[0] : 0  [by t.a.reset_bufarray.buf2._y:=1]
+	     89531 t.a.fifo_element[1].reset_buf._y : 1  [by t.a._reset_BXX[0]:=0]
+	     89542 t.a.fifo_element[4].reset_buf._y : 1  [by t.a._reset_BXX[0]:=0]
+	     98656 t.a.fifo_element[0].reset_buf._y : 1  [by t.a._reset_BXX[0]:=0]
+	     98711 t.a.fifo_element[0]._reset_BX : 0  [by t.a.fifo_element[0].reset_buf._y:=1]
+	    103251 t.a.fifo_element[2].reset_buf._y : 1  [by t.a._reset_BXX[0]:=0]
+	    117100 t.a.fifo_element[2]._reset_BX : 0  [by t.a.fifo_element[2].reset_buf._y:=1]
+	    126473 t.a.fifo_element[4]._reset_BX : 0  [by t.a.fifo_element[4].reset_buf._y:=1]
+	    126895 t.a.fifo_element[4].buf_func._y : 1  [by t.a.fifo_element[4]._reset_BX:=0]
+	    126896 t.out.r : 0  [by t.a.fifo_element[4].buf_func._y:=1]
+	    128491 t.a.fifo_element[0].inack_ctl._y : 1  [by t.a.fifo_element[0]._reset_BX:=0]
+	    128492 t.in.a : 0  [by t.a.fifo_element[0].inack_ctl._y:=1]
+	    131443 t.a.fifo_element[2].inack_ctl._y : 1  [by t.a.fifo_element[2]._reset_BX:=0]
+	    132779 t.a.fifo_element[1]._reset_BX : 0  [by t.a.fifo_element[1].reset_buf._y:=1]
+	    133061 t.a.fifo_element[1].buf_func._y : 1  [by t.a.fifo_element[1]._reset_BX:=0]
+	    133064 t.a.fifo_element[2].in.r : 0  [by t.a.fifo_element[1].buf_func._y:=1]
+	    133547 t.a.fifo_element[1].inack_ctl._y : 1  [by t.a.fifo_element[1]._reset_BX:=0]
+	    133625 t.a.fifo_element[3].reset_buf._y : 1  [by t.a._reset_BXX[0]:=0]
+	    134176 t.a.fifo_element[3]._reset_BX : 0  [by t.a.fifo_element[3].reset_buf._y:=1]
+	    135130 t.a.fifo_element[3].inack_ctl._y : 1  [by t.a.fifo_element[3]._reset_BX:=0]
+	    135247 t.a.fifo_element[3].buf_func._y : 1  [by t.a.fifo_element[3]._reset_BX:=0]
+	    136211 t.a.fifo_element[3].in.a : 0  [by t.a.fifo_element[3].inack_ctl._y:=1]
+	    137193 t.a.fifo_element[2]._out_a_B : 1  [by t.a.fifo_element[3].in.a:=0]
+	    141912 t.a.fifo_element[2].buf_func._y : 1  [by t.a.fifo_element[2]._reset_BX:=0]
+	    141930 t.a.fifo_element[3].in.r : 0  [by t.a.fifo_element[2].buf_func._y:=1]
+	    150364 t.a.fifo_element[0].buf_func._y : 1  [by t.a.fifo_element[0]._reset_BX:=0]
+	    151648 t.a.fifo_element[2].in.a : 0  [by t.a.fifo_element[2].inack_ctl._y:=1]
+	    154377 t.a.fifo_element[1].in.r : 0  [by t.a.fifo_element[0].buf_func._y:=1]
+	    155651 t.a.fifo_element[2]._en : 1  [by t.a.fifo_element[2].in.a:=0]
+	    155988 t.a.fifo_element[1].in.a : 0  [by t.a.fifo_element[1].inack_ctl._y:=1]
+	    156490 t.a.fifo_element[0]._out_a_B : 1  [by t.a.fifo_element[1].in.a:=0]
+	    160748 t.a.fifo_element[1]._en : 1  [by t.a.fifo_element[1].in.a:=0]
+	    175187 t.a.fifo_element[4].inack_ctl._y : 1  [by t.a.fifo_element[4]._reset_BX:=0]
+	    175390 t.a.fifo_element[4].in.a : 0  [by t.a.fifo_element[4].inack_ctl._y:=1]
+	    175529 t.a.fifo_element[3]._out_a_B : 1  [by t.a.fifo_element[4].in.a:=0]
+	    175961 t.a.fifo_element[0]._en : 1  [by t.a.fifo_element[1].in.r:=0]
+	    177244 t.a.fifo_element[4]._en : 1  [by t.a.fifo_element[4].in.a:=0]
+	    189717 t.a.fifo_element[4].in.r : 0  [by t.a.fifo_element[3].buf_func._y:=1]
+	    196549 t.a.fifo_element[1]._out_a_B : 1  [by t.a.fifo_element[2].in.a:=0]
+	    226063 t.a.fifo_element[3]._en : 1  [by t.a.fifo_element[4].in.r:=0]
+
+[] set Reset(B) high
+	    226063 Reset : 1
+	    226132 t.a.reset_buf._y : 0  [by Reset:=1]
+	    226143 t.a._reset_BX : 1  [by t.a.reset_buf._y:=0]
+	    277929 t.a.reset_bufarray.buf2._y : 0  [by t.a._reset_BX:=1]
+	    278133 t.a._reset_BXX[0] : 1  [by t.a.reset_bufarray.buf2._y:=0]
+	    278134 t.a.fifo_element[2].reset_buf._y : 0  [by t.a._reset_BXX[0]:=1]
+	    278148 t.a.fifo_element[3].reset_buf._y : 0  [by t.a._reset_BXX[0]:=1]
+	    278170 t.a.fifo_element[1].reset_buf._y : 0  [by t.a._reset_BXX[0]:=1]
+	    278188 t.a.fifo_element[3]._reset_BX : 1  [by t.a.fifo_element[3].reset_buf._y:=0]
+	    278245 t.a.fifo_element[4].reset_buf._y : 0  [by t.a._reset_BXX[0]:=1]
+	    278332 t.a.fifo_element[4]._reset_BX : 1  [by t.a.fifo_element[4].reset_buf._y:=0]
+	    278427 t.a.fifo_element[1]._reset_BX : 1  [by t.a.fifo_element[1].reset_buf._y:=0]
+	    278872 t.a.fifo_element[0].reset_buf._y : 0  [by t.a._reset_BXX[0]:=1]
+	    279166 t.a.fifo_element[0]._reset_BX : 1  [by t.a.fifo_element[0].reset_buf._y:=0]
+	    325646 t.a.fifo_element[2]._reset_BX : 1  [by t.a.fifo_element[2].reset_buf._y:=0]
+[0] reset done, r up
+	    325646 t.in.r : 1
+	    325647 t.a.fifo_element[0].buf_func._y : 0  [by t.in.r:=1]
+	    327453 t.a.fifo_element[1].in.r : 1  [by t.a.fifo_element[0].buf_func._y:=0]
+	    328662 t.a.fifo_element[0].inack_ctl._y : 0  [by t.a.fifo_element[1].in.r:=1]
+	    329252 t.in.a : 1  [by t.a.fifo_element[0].inack_ctl._y:=0]
+	    329430 t.a.fifo_element[0]._en : 0  [by t.in.a:=1]
+	    329460 t.a.fifo_element[1].buf_func._y : 0  [by t.a.fifo_element[1].in.r:=1]
+	    330263 t.a.fifo_element[2].in.r : 1  [by t.a.fifo_element[1].buf_func._y:=0]
+	    330427 t.a.fifo_element[2].buf_func._y : 0  [by t.a.fifo_element[2].in.r:=1]
+	    330449 t.a.fifo_element[3].in.r : 1  [by t.a.fifo_element[2].buf_func._y:=0]
+	    331296 t.a.fifo_element[3].buf_func._y : 0  [by t.a.fifo_element[3].in.r:=1]
+	    331429 t.a.fifo_element[4].in.r : 1  [by t.a.fifo_element[3].buf_func._y:=0]
+	    331788 t.a.fifo_element[3].inack_ctl._y : 0  [by t.a.fifo_element[4].in.r:=1]
+	    332458 t.a.fifo_element[1].inack_ctl._y : 0  [by t.a.fifo_element[2].in.r:=1]
+	    332679 t.a.fifo_element[1].in.a : 1  [by t.a.fifo_element[1].inack_ctl._y:=0]
+	    332686 t.a.fifo_element[1]._en : 0  [by t.a.fifo_element[1].in.a:=1]
+	    332709 t.a.fifo_element[0]._out_a_B : 0  [by t.a.fifo_element[1].in.a:=1]
+	    339422 t.a.fifo_element[0].buf_func._y : 1  [by t.a.fifo_element[0]._out_a_B:=0]
+	    345904 t.a.fifo_element[3].in.a : 1  [by t.a.fifo_element[3].inack_ctl._y:=0]
+	    345995 t.a.fifo_element[3]._en : 0  [by t.a.fifo_element[3].in.a:=1]
+	    347091 t.a.fifo_element[4].buf_func._y : 0  [by t.a.fifo_element[4].in.r:=1]
+	    347098 t.out.r : 1  [by t.a.fifo_element[4].buf_func._y:=0]
+	    348093 t.a.fifo_element[2]._out_a_B : 0  [by t.a.fifo_element[3].in.a:=1]
+	    349885 t.a.fifo_element[4].inack_ctl._y : 0  [by t.out.r:=1]
+	    349991 t.a.fifo_element[4].in.a : 1  [by t.a.fifo_element[4].inack_ctl._y:=0]
+	    350069 t.a.fifo_element[4]._en : 0  [by t.a.fifo_element[4].in.a:=1]
+	    350266 t.a.fifo_element[3]._out_a_B : 0  [by t.a.fifo_element[4].in.a:=1]
+	    360577 t.a.fifo_element[2].inack_ctl._y : 0  [by t.a.fifo_element[3].in.r:=1]
+	    361032 t.a.fifo_element[2].in.a : 1  [by t.a.fifo_element[2].inack_ctl._y:=0]
+	    361044 t.a.fifo_element[2]._en : 0  [by t.a.fifo_element[2].in.a:=1]
+	    361056 t.a.fifo_element[2].buf_func._y : 1  [by t.a.fifo_element[2]._en:=0]
+	    361436 t.a.fifo_element[1]._out_a_B : 0  [by t.a.fifo_element[2].in.a:=1]
+	    365712 t.a.fifo_element[1].buf_func._y : 1  [by t.a.fifo_element[1]._out_a_B:=0]
+	    366972 t.a.fifo_element[3].in.r : 0  [by t.a.fifo_element[2].buf_func._y:=1]
+	    368611 t.a.fifo_element[2].in.r : 0  [by t.a.fifo_element[1].buf_func._y:=1]
+	    368613 t.a.fifo_element[2].inack_ctl._y : 1  [by t.a.fifo_element[2].in.r:=0]
+	    369262 t.a.fifo_element[3].buf_func._y : 1  [by t.a.fifo_element[3]._out_a_B:=0]
+	    370511 t.a.fifo_element[4].in.r : 0  [by t.a.fifo_element[3].buf_func._y:=1]
+	    371267 t.a.fifo_element[3].inack_ctl._y : 1  [by t.a.fifo_element[3].in.r:=0]
+	    371433 t.a.fifo_element[3].in.a : 0  [by t.a.fifo_element[3].inack_ctl._y:=1]
+	    371508 t.a.fifo_element[3]._en : 1  [by t.a.fifo_element[3].in.a:=0]
+	    371778 t.a.fifo_element[2]._out_a_B : 1  [by t.a.fifo_element[3].in.a:=0]
+	    373148 t.a.fifo_element[2].in.a : 0  [by t.a.fifo_element[2].inack_ctl._y:=1]
+	    373286 t.a.fifo_element[2]._en : 1  [by t.a.fifo_element[2].in.a:=0]
+	    374010 t.a.fifo_element[4].inack_ctl._y : 1  [by t.a.fifo_element[4].in.r:=0]
+	    374012 t.a.fifo_element[4].in.a : 0  [by t.a.fifo_element[4].inack_ctl._y:=1]
+	    378411 t.a.fifo_element[1]._out_a_B : 1  [by t.a.fifo_element[2].in.a:=0]
+	    396883 t.a.fifo_element[1].in.r : 0  [by t.a.fifo_element[0].buf_func._y:=1]
+	    396884 t.a.fifo_element[1].inack_ctl._y : 1  [by t.a.fifo_element[1].in.r:=0]
+	    397432 t.a.fifo_element[1].in.a : 0  [by t.a.fifo_element[1].inack_ctl._y:=1]
+	    397443 t.a.fifo_element[1]._en : 1  [by t.a.fifo_element[1].in.a:=0]
+	    397802 t.a.fifo_element[0]._out_a_B : 1  [by t.a.fifo_element[1].in.a:=0]
+	    417929 t.a.fifo_element[3]._out_a_B : 1  [by t.a.fifo_element[4].in.a:=0]
+[0] r down
+	    417929 t.in.r : 0
+	    417996 t.a.fifo_element[0].inack_ctl._y : 1  [by t.in.r:=0]
+	    420637 t.in.a : 0  [by t.a.fifo_element[0].inack_ctl._y:=1]
+	    420653 t.a.fifo_element[0]._en : 1  [by t.in.a:=0]
+[1] r up
+	    420653 t.in.r : 1
+	    425215 t.a.fifo_element[0].buf_func._y : 0  [by t.in.r:=1]
+	    425743 t.a.fifo_element[1].in.r : 1  [by t.a.fifo_element[0].buf_func._y:=0]
+	    428178 t.a.fifo_element[1].buf_func._y : 0  [by t.a.fifo_element[1].in.r:=1]
+	    452103 t.a.fifo_element[2].in.r : 1  [by t.a.fifo_element[1].buf_func._y:=0]
+	    452105 t.a.fifo_element[1].inack_ctl._y : 0  [by t.a.fifo_element[2].in.r:=1]
+	    452623 t.a.fifo_element[0].inack_ctl._y : 0  [by t.a.fifo_element[1].in.r:=1]
+	    452626 t.in.a : 1  [by t.a.fifo_element[0].inack_ctl._y:=0]
+	    452655 t.a.fifo_element[0]._en : 0  [by t.in.a:=1]
+	    465144 t.a.fifo_element[2].buf_func._y : 0  [by t.a.fifo_element[2].in.r:=1]
+	    465461 t.a.fifo_element[3].in.r : 1  [by t.a.fifo_element[2].buf_func._y:=0]
+	    465614 t.a.fifo_element[2].inack_ctl._y : 0  [by t.a.fifo_element[3].in.r:=1]
+	    465658 t.a.fifo_element[2].in.a : 1  [by t.a.fifo_element[2].inack_ctl._y:=0]
+	    467062 t.a.fifo_element[3].buf_func._y : 0  [by t.a.fifo_element[3].in.r:=1]
+	    467063 t.a.fifo_element[4].in.r : 1  [by t.a.fifo_element[3].buf_func._y:=0]
+	    467280 t.a.fifo_element[3].inack_ctl._y : 0  [by t.a.fifo_element[4].in.r:=1]
+	    467302 t.a.fifo_element[3].in.a : 1  [by t.a.fifo_element[3].inack_ctl._y:=0]
+	    467303 t.a.fifo_element[3]._en : 0  [by t.a.fifo_element[3].in.a:=1]
+	    468419 t.a.fifo_element[2]._en : 0  [by t.a.fifo_element[2].in.a:=1]
+	    468883 t.a.fifo_element[2]._out_a_B : 0  [by t.a.fifo_element[3].in.a:=1]
+	    478228 t.a.fifo_element[2].buf_func._y : 1  [by t.a.fifo_element[2]._out_a_B:=0]
+	    478387 t.a.fifo_element[3].in.r : 0  [by t.a.fifo_element[2].buf_func._y:=1]
+	    479341 t.a.fifo_element[1]._out_a_B : 0  [by t.a.fifo_element[2].in.a:=1]
+	    498063 t.a.fifo_element[3].inack_ctl._y : 1  [by t.a.fifo_element[3].in.r:=0]
+	    499350 t.a.fifo_element[3].in.a : 0  [by t.a.fifo_element[3].inack_ctl._y:=1]
+	    501582 t.a.fifo_element[2]._out_a_B : 1  [by t.a.fifo_element[3].in.a:=0]
+	    513063 t.a.fifo_element[1].in.a : 1  [by t.a.fifo_element[1].inack_ctl._y:=0]
+	    513208 t.a.fifo_element[1]._en : 0  [by t.a.fifo_element[1].in.a:=1]
+	    515895 t.a.fifo_element[0]._out_a_B : 0  [by t.a.fifo_element[1].in.a:=1]
+	    515896 t.a.fifo_element[0].buf_func._y : 1  [by t.a.fifo_element[0]._out_a_B:=0]
+	    519562 t.a.fifo_element[1].buf_func._y : 1  [by t.a.fifo_element[1]._en:=0]
+	    519724 t.a.fifo_element[2].in.r : 0  [by t.a.fifo_element[1].buf_func._y:=1]
+	    527093 t.a.fifo_element[2].inack_ctl._y : 1  [by t.a.fifo_element[2].in.r:=0]
+	    527107 t.a.fifo_element[2].in.a : 0  [by t.a.fifo_element[2].inack_ctl._y:=1]
+	    527114 t.a.fifo_element[2]._en : 1  [by t.a.fifo_element[2].in.a:=0]
+	    527267 t.a.fifo_element[1]._out_a_B : 1  [by t.a.fifo_element[2].in.a:=0]
+	    555180 t.a.fifo_element[1].in.r : 0  [by t.a.fifo_element[0].buf_func._y:=1]
+	    576737 t.a.fifo_element[1].inack_ctl._y : 1  [by t.a.fifo_element[1].in.r:=0]
+	    576738 t.a.fifo_element[1].in.a : 0  [by t.a.fifo_element[1].inack_ctl._y:=1]
+	    576739 t.a.fifo_element[1]._en : 1  [by t.a.fifo_element[1].in.a:=0]
+	    576739 t.a.fifo_element[0]._out_a_B : 1  [by t.a.fifo_element[1].in.a:=0]
+[1] r down
+	    576739 t.in.r : 0
+	    578982 t.a.fifo_element[0].inack_ctl._y : 1  [by t.in.r:=0]
+	    579169 t.in.a : 0  [by t.a.fifo_element[0].inack_ctl._y:=1]
+	    579170 t.a.fifo_element[0]._en : 1  [by t.in.a:=0]
+[2] r up
+	    579170 t.in.r : 1
+	    583352 t.a.fifo_element[0].buf_func._y : 0  [by t.in.r:=1]
+	    618134 t.a.fifo_element[1].in.r : 1  [by t.a.fifo_element[0].buf_func._y:=0]
+	    618135 t.a.fifo_element[1].buf_func._y : 0  [by t.a.fifo_element[1].in.r:=1]
+	    618140 t.a.fifo_element[2].in.r : 1  [by t.a.fifo_element[1].buf_func._y:=0]
+	    618141 t.a.fifo_element[1].inack_ctl._y : 0  [by t.a.fifo_element[2].in.r:=1]
+	    618158 t.a.fifo_element[1].in.a : 1  [by t.a.fifo_element[1].inack_ctl._y:=0]
+	    618987 t.a.fifo_element[0].inack_ctl._y : 0  [by t.a.fifo_element[1].in.r:=1]
+	    618990 t.in.a : 1  [by t.a.fifo_element[0].inack_ctl._y:=0]
+	    619031 t.a.fifo_element[2].buf_func._y : 0  [by t.a.fifo_element[2].in.r:=1]
+	    619931 t.a.fifo_element[0]._en : 0  [by t.in.a:=1]
+	    620731 t.a.fifo_element[1]._en : 0  [by t.a.fifo_element[1].in.a:=1]
+	    626519 t.a.fifo_element[0]._out_a_B : 0  [by t.a.fifo_element[1].in.a:=1]
+	    626520 t.a.fifo_element[0].buf_func._y : 1  [by t.a.fifo_element[0]._out_a_B:=0]
+	    626562 t.a.fifo_element[1].in.r : 0  [by t.a.fifo_element[0].buf_func._y:=1]
+	    629379 t.a.fifo_element[1].inack_ctl._y : 1  [by t.a.fifo_element[1].in.r:=0]
+	    643112 t.a.fifo_element[1].in.a : 0  [by t.a.fifo_element[1].inack_ctl._y:=1]
+	    643207 t.a.fifo_element[0]._out_a_B : 1  [by t.a.fifo_element[1].in.a:=0]
+	    677993 t.a.fifo_element[3].in.r : 1  [by t.a.fifo_element[2].buf_func._y:=0]
+	    678328 t.a.fifo_element[2].inack_ctl._y : 0  [by t.a.fifo_element[3].in.r:=1]
+	    678336 t.a.fifo_element[2].in.a : 1  [by t.a.fifo_element[2].inack_ctl._y:=0]
+	    678370 t.a.fifo_element[2]._en : 0  [by t.a.fifo_element[2].in.a:=1]
+	    692223 t.a.fifo_element[1]._out_a_B : 0  [by t.a.fifo_element[2].in.a:=1]
+	    693141 t.a.fifo_element[1].buf_func._y : 1  [by t.a.fifo_element[1]._out_a_B:=0]
+	    693145 t.a.fifo_element[2].in.r : 0  [by t.a.fifo_element[1].buf_func._y:=1]
+	    695543 t.a.fifo_element[1]._en : 1  [by t.a.fifo_element[2].in.r:=0]
+	    739523 t.a.fifo_element[2].inack_ctl._y : 1  [by t.a.fifo_element[2].in.r:=0]
+	    742738 t.a.fifo_element[2].in.a : 0  [by t.a.fifo_element[2].inack_ctl._y:=1]
+	    789857 t.a.fifo_element[1]._out_a_B : 1  [by t.a.fifo_element[2].in.a:=0]
+[2] r down
+	    789857 t.in.r : 0
+	    789905 t.a.fifo_element[0].inack_ctl._y : 1  [by t.in.r:=0]
+	    789908 t.in.a : 0  [by t.a.fifo_element[0].inack_ctl._y:=1]
+	    790086 t.a.fifo_element[0]._en : 1  [by t.in.a:=0]
+[3] r up
+	    790086 t.in.r : 1
+	    811063 t.a.fifo_element[0].buf_func._y : 0  [by t.in.r:=1]
+	    822962 t.a.fifo_element[1].in.r : 1  [by t.a.fifo_element[0].buf_func._y:=0]
+	    828913 t.a.fifo_element[1].buf_func._y : 0  [by t.a.fifo_element[1].in.r:=1]
+	    829740 t.a.fifo_element[2].in.r : 1  [by t.a.fifo_element[1].buf_func._y:=0]
+	    829913 t.a.fifo_element[1].inack_ctl._y : 0  [by t.a.fifo_element[2].in.r:=1]
+	    830097 t.a.fifo_element[1].in.a : 1  [by t.a.fifo_element[1].inack_ctl._y:=0]
+	    830098 t.a.fifo_element[1]._en : 0  [by t.a.fifo_element[1].in.a:=1]
+	    830170 t.a.fifo_element[0]._out_a_B : 0  [by t.a.fifo_element[1].in.a:=1]
+	    862447 t.a.fifo_element[0].inack_ctl._y : 0  [by t.a.fifo_element[1].in.r:=1]
+	    862451 t.in.a : 1  [by t.a.fifo_element[0].inack_ctl._y:=0]
+	    899739 t.a.fifo_element[0]._en : 0  [by t.in.a:=1]
+	    899835 t.a.fifo_element[0].buf_func._y : 1  [by t.a.fifo_element[0]._en:=0]
+	    899971 t.a.fifo_element[1].in.r : 0  [by t.a.fifo_element[0].buf_func._y:=1]
+	    899972 t.a.fifo_element[1].inack_ctl._y : 1  [by t.a.fifo_element[1].in.r:=0]
+	    919018 t.a.fifo_element[1].in.a : 0  [by t.a.fifo_element[1].inack_ctl._y:=1]
+	    919259 t.a.fifo_element[0]._out_a_B : 1  [by t.a.fifo_element[1].in.a:=0]
+[3] r down
+	    919259 t.in.r : 0
+	    923218 t.a.fifo_element[0].inack_ctl._y : 1  [by t.in.r:=0]
+	    923230 t.in.a : 0  [by t.a.fifo_element[0].inack_ctl._y:=1]
+	    927130 t.a.fifo_element[0]._en : 1  [by t.in.a:=0]
+[4] r up
+	    927130 t.in.r : 1
+	    928159 t.a.fifo_element[0].buf_func._y : 0  [by t.in.r:=1]
+	    928160 t.a.fifo_element[1].in.r : 1  [by t.a.fifo_element[0].buf_func._y:=0]
+	    928216 t.a.fifo_element[0].inack_ctl._y : 0  [by t.a.fifo_element[1].in.r:=1]
+	    973222 t.in.a : 1  [by t.a.fifo_element[0].inack_ctl._y:=0]
+	    973223 t.a.fifo_element[0]._en : 0  [by t.in.a:=1]
+[4] r down
+	    973223 t.in.r : 0
+	    973260 t.a.fifo_element[0].inack_ctl._y : 1  [by t.in.r:=0]
+	    996635 t.in.a : 0  [by t.a.fifo_element[0].inack_ctl._y:=1]
+[5] r up
+	    996635 t.in.r : 1
+[5] r down
+	    996635 t.in.r : 0
+[6] r up
+	    996635 t.in.r : 1
+[6] r down
+	    996635 t.in.r : 0

test/unit_tests/fifo_t_5/run/test.prs

@@ -0,0 +1,332 @@
+= "GND" "GND"
+= "Vdd" "Vdd"
+= "Reset" "Reset"
+"t.a.reset_bufarray.buf2.a"->"t.a.reset_bufarray.buf2._y"-
+~("t.a.reset_bufarray.buf2.a")->"t.a.reset_bufarray.buf2._y"+
+"t.a.reset_bufarray.buf2._y"->"t.a.reset_bufarray.buf2.y"-
+~("t.a.reset_bufarray.buf2._y")->"t.a.reset_bufarray.buf2.y"+
+= "t.a.reset_bufarray.supply.vdd" "t.a.reset_bufarray.buf2.vdd"
+= "t.a.reset_bufarray.supply.vss" "t.a.reset_bufarray.buf2.vss"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[4]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[3]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[2]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[1]"
+= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.buf2.y"
+= "t.a.reset_bufarray.in" "t.a.reset_bufarray.buf2.a"
+"t.a.reset_buf.a"->"t.a.reset_buf._y"-
+~("t.a.reset_buf.a")->"t.a.reset_buf._y"+
+"t.a.reset_buf._y"->"t.a.reset_buf.y"-
+~("t.a.reset_buf._y")->"t.a.reset_buf.y"+
+= "t.a.reset_B" "t.a.reset_buf.a"
+= "t.a.supply.vss" "t.a.fifo_element[4].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[4].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[3].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[3].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[2].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[2].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[1].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[1].supply.vdd"
+= "t.a.supply.vss" "t.a.fifo_element[0].supply.vss"
+= "t.a.supply.vdd" "t.a.fifo_element[0].supply.vdd"
+= "t.a.supply.vdd" "t.a.reset_buf.vdd"
+= "t.a.supply.vss" "t.a.reset_buf.vss"
+= "t.a._reset_BX" "t.a.reset_bufarray.in"
+= "t.a._reset_BX" "t.a.reset_buf.y"
+"t.a.fifo_element[0].reset_buf.a"->"t.a.fifo_element[0].reset_buf._y"-
+~("t.a.fifo_element[0].reset_buf.a")->"t.a.fifo_element[0].reset_buf._y"+
+"t.a.fifo_element[0].reset_buf._y"->"t.a.fifo_element[0].reset_buf.y"-
+~("t.a.fifo_element[0].reset_buf._y")->"t.a.fifo_element[0].reset_buf.y"+
+"t.a.fifo_element[0].inv_outa.a"->"t.a.fifo_element[0].inv_outa.y"-
+~("t.a.fifo_element[0].inv_outa.a")->"t.a.fifo_element[0].inv_outa.y"+
+~"t.a.fifo_element[0].inack_ctl.c1"&~"t.a.fifo_element[0].inack_ctl.c2"|~"t.a.fifo_element[0].inack_ctl.pr_B"->"t.a.fifo_element[0].inack_ctl._y"+
+"t.a.fifo_element[0].inack_ctl.c1"&"t.a.fifo_element[0].inack_ctl.c2"&"t.a.fifo_element[0].inack_ctl.n1"&"t.a.fifo_element[0].inack_ctl.sr_B"->"t.a.fifo_element[0].inack_ctl._y"-
+"t.a.fifo_element[0].inack_ctl._y"->"t.a.fifo_element[0].inack_ctl.y"-
+~("t.a.fifo_element[0].inack_ctl._y")->"t.a.fifo_element[0].inack_ctl.y"+
+~"t.a.fifo_element[0].buf_func.c1"&~"t.a.fifo_element[0].buf_func.c2"|~"t.a.fifo_element[0].buf_func.pr_B"->"t.a.fifo_element[0].buf_func._y"+
+"t.a.fifo_element[0].buf_func.c1"&"t.a.fifo_element[0].buf_func.c2"&"t.a.fifo_element[0].buf_func.n1"&"t.a.fifo_element[0].buf_func.sr_B"->"t.a.fifo_element[0].buf_func._y"-
+"t.a.fifo_element[0].buf_func._y"->"t.a.fifo_element[0].buf_func.y"-
+~("t.a.fifo_element[0].buf_func._y")->"t.a.fifo_element[0].buf_func.y"+
+= "t.a.fifo_element[0].reset_B" "t.a.fifo_element[0].reset_buf.a"
+= "t.a.fifo_element[0].supply.vdd" "t.a.fifo_element[0].reset_buf.vdd"
+= "t.a.fifo_element[0].supply.vdd" "t.a.fifo_element[0].buf_func.vdd"
+= "t.a.fifo_element[0].supply.vdd" "t.a.fifo_element[0].inv_outa.vdd"
+= "t.a.fifo_element[0].supply.vdd" "t.a.fifo_element[0].en_ctl.vdd"
+= "t.a.fifo_element[0].supply.vdd" "t.a.fifo_element[0].inack_ctl.vdd"
+= "t.a.fifo_element[0].supply.vss" "t.a.fifo_element[0].reset_buf.vss"
+= "t.a.fifo_element[0].supply.vss" "t.a.fifo_element[0].buf_func.vss"
+= "t.a.fifo_element[0].supply.vss" "t.a.fifo_element[0].inv_outa.vss"
+= "t.a.fifo_element[0].supply.vss" "t.a.fifo_element[0].en_ctl.vss"
+= "t.a.fifo_element[0].supply.vss" "t.a.fifo_element[0].inack_ctl.vss"
+= "t.a.fifo_element[0]._reset_BX" "t.a.fifo_element[0].reset_buf.y"
+= "t.a.fifo_element[0]._reset_BX" "t.a.fifo_element[0].buf_func.sr_B"
+= "t.a.fifo_element[0]._reset_BX" "t.a.fifo_element[0].buf_func.pr_B"
+= "t.a.fifo_element[0]._reset_BX" "t.a.fifo_element[0].inack_ctl.sr_B"
+= "t.a.fifo_element[0]._reset_BX" "t.a.fifo_element[0].inack_ctl.pr_B"
+= "t.a.fifo_element[0]._en" "t.a.fifo_element[0].buf_func.c1"
+= "t.a.fifo_element[0]._en" "t.a.fifo_element[0].en_ctl.y"
+= "t.a.fifo_element[0]._en" "t.a.fifo_element[0].inack_ctl.c1"
+~"t.a.fifo_element[0].en_ctl.p1"&~"t.a.fifo_element[0].en_ctl.c1"->"t.a.fifo_element[0].en_ctl.y"+
+"t.a.fifo_element[0].en_ctl.c1"->"t.a.fifo_element[0].en_ctl.y"-
+= "t.a.fifo_element[0]._out_a_B" "t.a.fifo_element[0].buf_func.c2"
+= "t.a.fifo_element[0]._out_a_B" "t.a.fifo_element[0].inv_outa.y"
+= "t.a.fifo_element[0].in.d.d[0]" "t.a.fifo_element[0].in.r"
+= "t.a.fifo_element[0].in.a" "t.a.fifo_element[0].en_ctl.c1"
+= "t.a.fifo_element[0].in.a" "t.a.fifo_element[0].inack_ctl.y"
+= "t.a.fifo_element[0].in.d.d[0]" "t.a.fifo_element[0].buf_func.n1"
+= "t.a.fifo_element[0].in.d.d[0]" "t.a.fifo_element[0].inack_ctl.c2"
+= "t.a.fifo_element[0].in.d.d[0]" "t.a.fifo_element[0].in.r"
+= "t.a.fifo_element[0].out.d.d[0]" "t.a.fifo_element[0].out.r"
+= "t.a.fifo_element[0].out.a" "t.a.fifo_element[0].inv_outa.a"
+= "t.a.fifo_element[0].out.d.d[0]" "t.a.fifo_element[0].buf_func.y"
+= "t.a.fifo_element[0].out.d.d[0]" "t.a.fifo_element[0].en_ctl.p1"
+= "t.a.fifo_element[0].out.d.d[0]" "t.a.fifo_element[0].inack_ctl.n1"
+= "t.a.fifo_element[0].out.d.d[0]" "t.a.fifo_element[0].out.r"
+"t.a.fifo_element[1].reset_buf.a"->"t.a.fifo_element[1].reset_buf._y"-
+~("t.a.fifo_element[1].reset_buf.a")->"t.a.fifo_element[1].reset_buf._y"+
+"t.a.fifo_element[1].reset_buf._y"->"t.a.fifo_element[1].reset_buf.y"-
+~("t.a.fifo_element[1].reset_buf._y")->"t.a.fifo_element[1].reset_buf.y"+
+"t.a.fifo_element[1].inv_outa.a"->"t.a.fifo_element[1].inv_outa.y"-
+~("t.a.fifo_element[1].inv_outa.a")->"t.a.fifo_element[1].inv_outa.y"+
+~"t.a.fifo_element[1].inack_ctl.c1"&~"t.a.fifo_element[1].inack_ctl.c2"|~"t.a.fifo_element[1].inack_ctl.pr_B"->"t.a.fifo_element[1].inack_ctl._y"+
+"t.a.fifo_element[1].inack_ctl.c1"&"t.a.fifo_element[1].inack_ctl.c2"&"t.a.fifo_element[1].inack_ctl.n1"&"t.a.fifo_element[1].inack_ctl.sr_B"->"t.a.fifo_element[1].inack_ctl._y"-
+"t.a.fifo_element[1].inack_ctl._y"->"t.a.fifo_element[1].inack_ctl.y"-
+~("t.a.fifo_element[1].inack_ctl._y")->"t.a.fifo_element[1].inack_ctl.y"+
+~"t.a.fifo_element[1].buf_func.c1"&~"t.a.fifo_element[1].buf_func.c2"|~"t.a.fifo_element[1].buf_func.pr_B"->"t.a.fifo_element[1].buf_func._y"+
+"t.a.fifo_element[1].buf_func.c1"&"t.a.fifo_element[1].buf_func.c2"&"t.a.fifo_element[1].buf_func.n1"&"t.a.fifo_element[1].buf_func.sr_B"->"t.a.fifo_element[1].buf_func._y"-
+"t.a.fifo_element[1].buf_func._y"->"t.a.fifo_element[1].buf_func.y"-
+~("t.a.fifo_element[1].buf_func._y")->"t.a.fifo_element[1].buf_func.y"+
+= "t.a.fifo_element[1].reset_B" "t.a.fifo_element[1].reset_buf.a"
+= "t.a.fifo_element[1].supply.vdd" "t.a.fifo_element[1].reset_buf.vdd"
+= "t.a.fifo_element[1].supply.vdd" "t.a.fifo_element[1].buf_func.vdd"
+= "t.a.fifo_element[1].supply.vdd" "t.a.fifo_element[1].inv_outa.vdd"
+= "t.a.fifo_element[1].supply.vdd" "t.a.fifo_element[1].en_ctl.vdd"
+= "t.a.fifo_element[1].supply.vdd" "t.a.fifo_element[1].inack_ctl.vdd"
+= "t.a.fifo_element[1].supply.vss" "t.a.fifo_element[1].reset_buf.vss"
+= "t.a.fifo_element[1].supply.vss" "t.a.fifo_element[1].buf_func.vss"
+= "t.a.fifo_element[1].supply.vss" "t.a.fifo_element[1].inv_outa.vss"
+= "t.a.fifo_element[1].supply.vss" "t.a.fifo_element[1].en_ctl.vss"
+= "t.a.fifo_element[1].supply.vss" "t.a.fifo_element[1].inack_ctl.vss"
+= "t.a.fifo_element[1]._reset_BX" "t.a.fifo_element[1].reset_buf.y"
+= "t.a.fifo_element[1]._reset_BX" "t.a.fifo_element[1].buf_func.sr_B"
+= "t.a.fifo_element[1]._reset_BX" "t.a.fifo_element[1].buf_func.pr_B"
+= "t.a.fifo_element[1]._reset_BX" "t.a.fifo_element[1].inack_ctl.sr_B"
+= "t.a.fifo_element[1]._reset_BX" "t.a.fifo_element[1].inack_ctl.pr_B"
+= "t.a.fifo_element[1]._en" "t.a.fifo_element[1].buf_func.c1"
+= "t.a.fifo_element[1]._en" "t.a.fifo_element[1].en_ctl.y"
+= "t.a.fifo_element[1]._en" "t.a.fifo_element[1].inack_ctl.c1"
+~"t.a.fifo_element[1].en_ctl.p1"&~"t.a.fifo_element[1].en_ctl.c1"->"t.a.fifo_element[1].en_ctl.y"+
+"t.a.fifo_element[1].en_ctl.c1"->"t.a.fifo_element[1].en_ctl.y"-
+= "t.a.fifo_element[1]._out_a_B" "t.a.fifo_element[1].buf_func.c2"
+= "t.a.fifo_element[1]._out_a_B" "t.a.fifo_element[1].inv_outa.y"
+= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[1].in.r"
+= "t.a.fifo_element[1].in.a" "t.a.fifo_element[1].en_ctl.c1"
+= "t.a.fifo_element[1].in.a" "t.a.fifo_element[1].inack_ctl.y"
+= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[1].buf_func.n1"
+= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[1].inack_ctl.c2"
+= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[1].in.r"
+= "t.a.fifo_element[1].out.d.d[0]" "t.a.fifo_element[1].out.r"
+= "t.a.fifo_element[1].out.a" "t.a.fifo_element[1].inv_outa.a"
+= "t.a.fifo_element[1].out.d.d[0]" "t.a.fifo_element[1].buf_func.y"
+= "t.a.fifo_element[1].out.d.d[0]" "t.a.fifo_element[1].en_ctl.p1"
+= "t.a.fifo_element[1].out.d.d[0]" "t.a.fifo_element[1].inack_ctl.n1"
+= "t.a.fifo_element[1].out.d.d[0]" "t.a.fifo_element[1].out.r"
+"t.a.fifo_element[2].reset_buf.a"->"t.a.fifo_element[2].reset_buf._y"-
+~("t.a.fifo_element[2].reset_buf.a")->"t.a.fifo_element[2].reset_buf._y"+
+"t.a.fifo_element[2].reset_buf._y"->"t.a.fifo_element[2].reset_buf.y"-
+~("t.a.fifo_element[2].reset_buf._y")->"t.a.fifo_element[2].reset_buf.y"+
+"t.a.fifo_element[2].inv_outa.a"->"t.a.fifo_element[2].inv_outa.y"-
+~("t.a.fifo_element[2].inv_outa.a")->"t.a.fifo_element[2].inv_outa.y"+
+~"t.a.fifo_element[2].inack_ctl.c1"&~"t.a.fifo_element[2].inack_ctl.c2"|~"t.a.fifo_element[2].inack_ctl.pr_B"->"t.a.fifo_element[2].inack_ctl._y"+
+"t.a.fifo_element[2].inack_ctl.c1"&"t.a.fifo_element[2].inack_ctl.c2"&"t.a.fifo_element[2].inack_ctl.n1"&"t.a.fifo_element[2].inack_ctl.sr_B"->"t.a.fifo_element[2].inack_ctl._y"-
+"t.a.fifo_element[2].inack_ctl._y"->"t.a.fifo_element[2].inack_ctl.y"-
+~("t.a.fifo_element[2].inack_ctl._y")->"t.a.fifo_element[2].inack_ctl.y"+
+~"t.a.fifo_element[2].buf_func.c1"&~"t.a.fifo_element[2].buf_func.c2"|~"t.a.fifo_element[2].buf_func.pr_B"->"t.a.fifo_element[2].buf_func._y"+
+"t.a.fifo_element[2].buf_func.c1"&"t.a.fifo_element[2].buf_func.c2"&"t.a.fifo_element[2].buf_func.n1"&"t.a.fifo_element[2].buf_func.sr_B"->"t.a.fifo_element[2].buf_func._y"-
+"t.a.fifo_element[2].buf_func._y"->"t.a.fifo_element[2].buf_func.y"-
+~("t.a.fifo_element[2].buf_func._y")->"t.a.fifo_element[2].buf_func.y"+
+= "t.a.fifo_element[2].reset_B" "t.a.fifo_element[2].reset_buf.a"
+= "t.a.fifo_element[2].supply.vdd" "t.a.fifo_element[2].reset_buf.vdd"
+= "t.a.fifo_element[2].supply.vdd" "t.a.fifo_element[2].buf_func.vdd"
+= "t.a.fifo_element[2].supply.vdd" "t.a.fifo_element[2].inv_outa.vdd"
+= "t.a.fifo_element[2].supply.vdd" "t.a.fifo_element[2].en_ctl.vdd"
+= "t.a.fifo_element[2].supply.vdd" "t.a.fifo_element[2].inack_ctl.vdd"
+= "t.a.fifo_element[2].supply.vss" "t.a.fifo_element[2].reset_buf.vss"
+= "t.a.fifo_element[2].supply.vss" "t.a.fifo_element[2].buf_func.vss"
+= "t.a.fifo_element[2].supply.vss" "t.a.fifo_element[2].inv_outa.vss"
+= "t.a.fifo_element[2].supply.vss" "t.a.fifo_element[2].en_ctl.vss"
+= "t.a.fifo_element[2].supply.vss" "t.a.fifo_element[2].inack_ctl.vss"
+= "t.a.fifo_element[2]._reset_BX" "t.a.fifo_element[2].reset_buf.y"
+= "t.a.fifo_element[2]._reset_BX" "t.a.fifo_element[2].buf_func.sr_B"
+= "t.a.fifo_element[2]._reset_BX" "t.a.fifo_element[2].buf_func.pr_B"
+= "t.a.fifo_element[2]._reset_BX" "t.a.fifo_element[2].inack_ctl.sr_B"
+= "t.a.fifo_element[2]._reset_BX" "t.a.fifo_element[2].inack_ctl.pr_B"
+= "t.a.fifo_element[2]._en" "t.a.fifo_element[2].buf_func.c1"
+= "t.a.fifo_element[2]._en" "t.a.fifo_element[2].en_ctl.y"
+= "t.a.fifo_element[2]._en" "t.a.fifo_element[2].inack_ctl.c1"
+~"t.a.fifo_element[2].en_ctl.p1"&~"t.a.fifo_element[2].en_ctl.c1"->"t.a.fifo_element[2].en_ctl.y"+
+"t.a.fifo_element[2].en_ctl.c1"->"t.a.fifo_element[2].en_ctl.y"-
+= "t.a.fifo_element[2]._out_a_B" "t.a.fifo_element[2].buf_func.c2"
+= "t.a.fifo_element[2]._out_a_B" "t.a.fifo_element[2].inv_outa.y"
+= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[2].in.r"
+= "t.a.fifo_element[2].in.a" "t.a.fifo_element[2].en_ctl.c1"
+= "t.a.fifo_element[2].in.a" "t.a.fifo_element[2].inack_ctl.y"
+= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[2].buf_func.n1"
+= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[2].inack_ctl.c2"
+= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[2].in.r"
+= "t.a.fifo_element[2].out.d.d[0]" "t.a.fifo_element[2].out.r"
+= "t.a.fifo_element[2].out.a" "t.a.fifo_element[2].inv_outa.a"
+= "t.a.fifo_element[2].out.d.d[0]" "t.a.fifo_element[2].buf_func.y"
+= "t.a.fifo_element[2].out.d.d[0]" "t.a.fifo_element[2].en_ctl.p1"
+= "t.a.fifo_element[2].out.d.d[0]" "t.a.fifo_element[2].inack_ctl.n1"
+= "t.a.fifo_element[2].out.d.d[0]" "t.a.fifo_element[2].out.r"
+"t.a.fifo_element[3].reset_buf.a"->"t.a.fifo_element[3].reset_buf._y"-
+~("t.a.fifo_element[3].reset_buf.a")->"t.a.fifo_element[3].reset_buf._y"+
+"t.a.fifo_element[3].reset_buf._y"->"t.a.fifo_element[3].reset_buf.y"-
+~("t.a.fifo_element[3].reset_buf._y")->"t.a.fifo_element[3].reset_buf.y"+
+"t.a.fifo_element[3].inv_outa.a"->"t.a.fifo_element[3].inv_outa.y"-
+~("t.a.fifo_element[3].inv_outa.a")->"t.a.fifo_element[3].inv_outa.y"+
+~"t.a.fifo_element[3].inack_ctl.c1"&~"t.a.fifo_element[3].inack_ctl.c2"|~"t.a.fifo_element[3].inack_ctl.pr_B"->"t.a.fifo_element[3].inack_ctl._y"+
+"t.a.fifo_element[3].inack_ctl.c1"&"t.a.fifo_element[3].inack_ctl.c2"&"t.a.fifo_element[3].inack_ctl.n1"&"t.a.fifo_element[3].inack_ctl.sr_B"->"t.a.fifo_element[3].inack_ctl._y"-
+"t.a.fifo_element[3].inack_ctl._y"->"t.a.fifo_element[3].inack_ctl.y"-
+~("t.a.fifo_element[3].inack_ctl._y")->"t.a.fifo_element[3].inack_ctl.y"+
+~"t.a.fifo_element[3].buf_func.c1"&~"t.a.fifo_element[3].buf_func.c2"|~"t.a.fifo_element[3].buf_func.pr_B"->"t.a.fifo_element[3].buf_func._y"+
+"t.a.fifo_element[3].buf_func.c1"&"t.a.fifo_element[3].buf_func.c2"&"t.a.fifo_element[3].buf_func.n1"&"t.a.fifo_element[3].buf_func.sr_B"->"t.a.fifo_element[3].buf_func._y"-
+"t.a.fifo_element[3].buf_func._y"->"t.a.fifo_element[3].buf_func.y"-
+~("t.a.fifo_element[3].buf_func._y")->"t.a.fifo_element[3].buf_func.y"+
+= "t.a.fifo_element[3].reset_B" "t.a.fifo_element[3].reset_buf.a"
+= "t.a.fifo_element[3].supply.vdd" "t.a.fifo_element[3].reset_buf.vdd"
+= "t.a.fifo_element[3].supply.vdd" "t.a.fifo_element[3].buf_func.vdd"
+= "t.a.fifo_element[3].supply.vdd" "t.a.fifo_element[3].inv_outa.vdd"
+= "t.a.fifo_element[3].supply.vdd" "t.a.fifo_element[3].en_ctl.vdd"
+= "t.a.fifo_element[3].supply.vdd" "t.a.fifo_element[3].inack_ctl.vdd"
+= "t.a.fifo_element[3].supply.vss" "t.a.fifo_element[3].reset_buf.vss"
+= "t.a.fifo_element[3].supply.vss" "t.a.fifo_element[3].buf_func.vss"
+= "t.a.fifo_element[3].supply.vss" "t.a.fifo_element[3].inv_outa.vss"
+= "t.a.fifo_element[3].supply.vss" "t.a.fifo_element[3].en_ctl.vss"
+= "t.a.fifo_element[3].supply.vss" "t.a.fifo_element[3].inack_ctl.vss"
+= "t.a.fifo_element[3]._reset_BX" "t.a.fifo_element[3].reset_buf.y"
+= "t.a.fifo_element[3]._reset_BX" "t.a.fifo_element[3].buf_func.sr_B"
+= "t.a.fifo_element[3]._reset_BX" "t.a.fifo_element[3].buf_func.pr_B"
+= "t.a.fifo_element[3]._reset_BX" "t.a.fifo_element[3].inack_ctl.sr_B"
+= "t.a.fifo_element[3]._reset_BX" "t.a.fifo_element[3].inack_ctl.pr_B"
+= "t.a.fifo_element[3]._en" "t.a.fifo_element[3].buf_func.c1"
+= "t.a.fifo_element[3]._en" "t.a.fifo_element[3].en_ctl.y"
+= "t.a.fifo_element[3]._en" "t.a.fifo_element[3].inack_ctl.c1"
+~"t.a.fifo_element[3].en_ctl.p1"&~"t.a.fifo_element[3].en_ctl.c1"->"t.a.fifo_element[3].en_ctl.y"+
+"t.a.fifo_element[3].en_ctl.c1"->"t.a.fifo_element[3].en_ctl.y"-
+= "t.a.fifo_element[3]._out_a_B" "t.a.fifo_element[3].buf_func.c2"
+= "t.a.fifo_element[3]._out_a_B" "t.a.fifo_element[3].inv_outa.y"
+= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[3].in.r"
+= "t.a.fifo_element[3].in.a" "t.a.fifo_element[3].en_ctl.c1"
+= "t.a.fifo_element[3].in.a" "t.a.fifo_element[3].inack_ctl.y"
+= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[3].buf_func.n1"
+= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[3].inack_ctl.c2"
+= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[3].in.r"
+= "t.a.fifo_element[3].out.d.d[0]" "t.a.fifo_element[3].out.r"
+= "t.a.fifo_element[3].out.a" "t.a.fifo_element[3].inv_outa.a"
+= "t.a.fifo_element[3].out.d.d[0]" "t.a.fifo_element[3].buf_func.y"
+= "t.a.fifo_element[3].out.d.d[0]" "t.a.fifo_element[3].en_ctl.p1"
+= "t.a.fifo_element[3].out.d.d[0]" "t.a.fifo_element[3].inack_ctl.n1"
+= "t.a.fifo_element[3].out.d.d[0]" "t.a.fifo_element[3].out.r"
+"t.a.fifo_element[4].reset_buf.a"->"t.a.fifo_element[4].reset_buf._y"-
+~("t.a.fifo_element[4].reset_buf.a")->"t.a.fifo_element[4].reset_buf._y"+
+"t.a.fifo_element[4].reset_buf._y"->"t.a.fifo_element[4].reset_buf.y"-
+~("t.a.fifo_element[4].reset_buf._y")->"t.a.fifo_element[4].reset_buf.y"+
+"t.a.fifo_element[4].inv_outa.a"->"t.a.fifo_element[4].inv_outa.y"-
+~("t.a.fifo_element[4].inv_outa.a")->"t.a.fifo_element[4].inv_outa.y"+
+~"t.a.fifo_element[4].inack_ctl.c1"&~"t.a.fifo_element[4].inack_ctl.c2"|~"t.a.fifo_element[4].inack_ctl.pr_B"->"t.a.fifo_element[4].inack_ctl._y"+
+"t.a.fifo_element[4].inack_ctl.c1"&"t.a.fifo_element[4].inack_ctl.c2"&"t.a.fifo_element[4].inack_ctl.n1"&"t.a.fifo_element[4].inack_ctl.sr_B"->"t.a.fifo_element[4].inack_ctl._y"-
+"t.a.fifo_element[4].inack_ctl._y"->"t.a.fifo_element[4].inack_ctl.y"-
+~("t.a.fifo_element[4].inack_ctl._y")->"t.a.fifo_element[4].inack_ctl.y"+
+~"t.a.fifo_element[4].buf_func.c1"&~"t.a.fifo_element[4].buf_func.c2"|~"t.a.fifo_element[4].buf_func.pr_B"->"t.a.fifo_element[4].buf_func._y"+
+"t.a.fifo_element[4].buf_func.c1"&"t.a.fifo_element[4].buf_func.c2"&"t.a.fifo_element[4].buf_func.n1"&"t.a.fifo_element[4].buf_func.sr_B"->"t.a.fifo_element[4].buf_func._y"-
+"t.a.fifo_element[4].buf_func._y"->"t.a.fifo_element[4].buf_func.y"-
+~("t.a.fifo_element[4].buf_func._y")->"t.a.fifo_element[4].buf_func.y"+
+= "t.a.fifo_element[4].reset_B" "t.a.fifo_element[4].reset_buf.a"
+= "t.a.fifo_element[4].supply.vdd" "t.a.fifo_element[4].reset_buf.vdd"
+= "t.a.fifo_element[4].supply.vdd" "t.a.fifo_element[4].buf_func.vdd"
+= "t.a.fifo_element[4].supply.vdd" "t.a.fifo_element[4].inv_outa.vdd"
+= "t.a.fifo_element[4].supply.vdd" "t.a.fifo_element[4].en_ctl.vdd"
+= "t.a.fifo_element[4].supply.vdd" "t.a.fifo_element[4].inack_ctl.vdd"
+= "t.a.fifo_element[4].supply.vss" "t.a.fifo_element[4].reset_buf.vss"
+= "t.a.fifo_element[4].supply.vss" "t.a.fifo_element[4].buf_func.vss"
+= "t.a.fifo_element[4].supply.vss" "t.a.fifo_element[4].inv_outa.vss"
+= "t.a.fifo_element[4].supply.vss" "t.a.fifo_element[4].en_ctl.vss"
+= "t.a.fifo_element[4].supply.vss" "t.a.fifo_element[4].inack_ctl.vss"
+= "t.a.fifo_element[4]._reset_BX" "t.a.fifo_element[4].reset_buf.y"
+= "t.a.fifo_element[4]._reset_BX" "t.a.fifo_element[4].buf_func.sr_B"
+= "t.a.fifo_element[4]._reset_BX" "t.a.fifo_element[4].buf_func.pr_B"
+= "t.a.fifo_element[4]._reset_BX" "t.a.fifo_element[4].inack_ctl.sr_B"
+= "t.a.fifo_element[4]._reset_BX" "t.a.fifo_element[4].inack_ctl.pr_B"
+= "t.a.fifo_element[4]._en" "t.a.fifo_element[4].buf_func.c1"
+= "t.a.fifo_element[4]._en" "t.a.fifo_element[4].en_ctl.y"
+= "t.a.fifo_element[4]._en" "t.a.fifo_element[4].inack_ctl.c1"
+~"t.a.fifo_element[4].en_ctl.p1"&~"t.a.fifo_element[4].en_ctl.c1"->"t.a.fifo_element[4].en_ctl.y"+
+"t.a.fifo_element[4].en_ctl.c1"->"t.a.fifo_element[4].en_ctl.y"-
+= "t.a.fifo_element[4]._out_a_B" "t.a.fifo_element[4].buf_func.c2"
+= "t.a.fifo_element[4]._out_a_B" "t.a.fifo_element[4].inv_outa.y"
+= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[4].in.r"
+= "t.a.fifo_element[4].in.a" "t.a.fifo_element[4].en_ctl.c1"
+= "t.a.fifo_element[4].in.a" "t.a.fifo_element[4].inack_ctl.y"
+= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[4].buf_func.n1"
+= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[4].inack_ctl.c2"
+= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[4].in.r"
+= "t.a.fifo_element[4].out.d.d[0]" "t.a.fifo_element[4].out.r"
+= "t.a.fifo_element[4].out.a" "t.a.fifo_element[4].inv_outa.a"
+= "t.a.fifo_element[4].out.d.d[0]" "t.a.fifo_element[4].buf_func.y"
+= "t.a.fifo_element[4].out.d.d[0]" "t.a.fifo_element[4].en_ctl.p1"
+= "t.a.fifo_element[4].out.d.d[0]" "t.a.fifo_element[4].inack_ctl.n1"
+= "t.a.fifo_element[4].out.d.d[0]" "t.a.fifo_element[4].out.r"
+= "t.a.fifo_element[4].in.a" "t.a.fifo_element[3].out.a"
+= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[3].out.r"
+= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[3].out.d.d[0]"
+= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[4].in.r"
+= "t.a.fifo_element[3].in.a" "t.a.fifo_element[2].out.a"
+= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[2].out.r"
+= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[2].out.d.d[0]"
+= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[3].in.r"
+= "t.a.fifo_element[2].in.a" "t.a.fifo_element[1].out.a"
+= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[1].out.r"
+= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[1].out.d.d[0]"
+= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[2].in.r"
+= "t.a.fifo_element[1].in.a" "t.a.fifo_element[0].out.a"
+= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[0].out.r"
+= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[0].out.d.d[0]"
+= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[1].in.r"
+= "t.a._reset_BXX[0]" "t.a.reset_bufarray.out[0]"
+= "t.a._reset_BXX[1]" "t.a.reset_bufarray.out[1]"
+= "t.a._reset_BXX[2]" "t.a.reset_bufarray.out[2]"
+= "t.a._reset_BXX[3]" "t.a.reset_bufarray.out[3]"
+= "t.a._reset_BXX[4]" "t.a.reset_bufarray.out[4]"
+= "t.a._reset_BXX[4]" "t.a.fifo_element[3].reset_B"
+= "t.a._reset_BXX[4]" "t.a._reset_BXX[3]"
+= "t.a._reset_BXX[4]" "t.a.fifo_element[2].reset_B"
+= "t.a._reset_BXX[4]" "t.a._reset_BXX[2]"
+= "t.a._reset_BXX[4]" "t.a.fifo_element[1].reset_B"
+= "t.a._reset_BXX[4]" "t.a._reset_BXX[1]"
+= "t.a._reset_BXX[4]" "t.a.fifo_element[0].reset_B"
+= "t.a._reset_BXX[4]" "t.a._reset_BXX[0]"
+= "t.a._reset_BXX[4]" "t.a.fifo_element[4].reset_B"
+= "t.a.in.d.d[0]" "t.a.in.r"
+= "t.a.in.a" "t.a.fifo_element[0].in.a"
+= "t.a.in.d.d[0]" "t.a.fifo_element[0].in.r"
+= "t.a.in.d.d[0]" "t.a.fifo_element[0].in.d.d[0]"
+= "t.a.in.d.d[0]" "t.a.in.r"
+= "t.a.out.d.d[0]" "t.a.out.r"
+= "t.a.out.a" "t.a.fifo_element[4].out.a"
+= "t.a.out.d.d[0]" "t.a.fifo_element[4].out.r"
+= "t.a.out.d.d[0]" "t.a.fifo_element[4].out.d.d[0]"
+= "t.a.out.d.d[0]" "t.a.out.r"
+= "Reset" "t.a.reset_B"
+= "Vdd" "t.a.supply.vdd"
+= "GND" "t.a.supply.vss"
+= "t.out.d.d[0]" "t.out.r"
+= "t.out.r" "t.a.out.r"
+= "t.out.a" "t.a.out.a"
+= "t.out.d.d[0]" "t.a.out.d.d[0]"
+= "t.out.d.d[0]" "t.out.r"
+= "t.in.d.d[0]" "t.in.r"
+= "t.in.r" "t.a.in.r"
+= "t.in.a" "t.a.in.a"
+= "t.in.d.d[0]" "t.a.in.d.d[0]"
+= "t.in.d.d[0]" "t.in.r"

test/unit_tests/fifo_t_5/test.act

@@ -0,0 +1,43 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/primitives.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+defproc fifo_t_5(a1of1 in; a1of1 out)
+
+{
+  fifo_t<5> a(.in = in, .out = out);
+  a.supply.vdd = Vdd;
+  a.supply.vss = GND; 
+  a.reset_B = Reset;
+}
+
+fifo_t_5 t;

test/unit_tests/fifo_t_5/test.prsim

@@ -0,0 +1,55 @@
+watchall
+system "echo '[] code starts'"
+set t.in.r 0
+set t.out.a 0
+cycle
+system "echo '[] set Reset(B) low'"
+set Reset 0
+cycle
+status X
+mode run
+system "echo '[] set Reset(B) high'"
+set Reset 1
+cycle
+system "echo '[0] reset done, r up'"
+set t.in.r 1
+cycle
+system "echo [0] r down"
+set t.in.r 0
+cycle
+system "echo '[1] r up'"
+set t.in.r 1
+cycle
+system "echo [1] r down"
+set t.in.r 0
+cycle
+system "echo '[2] r up'"
+set t.in.r 1
+cycle
+system "echo [2] r down"
+set t.in.r 0
+cycle
+system "echo '[3] r up'"
+set t.in.r 1
+cycle
+system "echo [3] r down"
+set t.in.r 0
+cycle
+system "echo '[4] r up'"
+set t.in.r 1
+cycle
+system "echo [4] r down"
+set t.in.r 0
+cycle
+system "echo '[5] r up'"
+set t.in.r 1
+cycle
+system "echo [5] r down"
+set t.in.r 0
+cycle
+system "echo '[6] r up'"
+set t.in.r 1
+cycle
+system "echo [6] r down"
+set t.in.r 0
+cycle

test/unit_tests/fork_15/run/prsim.out

@@ -0,0 +1,330 @@
+my_fork.fork_test.out1_t_buf_func[4].n1 my_fork.fork_test._en2_X_f[0] my_fork.out2.v my_fork.fork_test._en1_X_f[0] my_fork.fork_test._out1_a_BX_t[0] my_fork.fork_test.vc.tmp[11] my_fork.fork_test.out1_f_buf_func[6].n1 my_fork.fork_test._out2_a_BX_t[0] my_fork.fork_test.out1_t_buf_func[5].n1 my_fork.fork_test.out1_t_buf_func[0].n1 my_fork.fork_test._out1_a_BX_f[0] my_fork.fork_test.out1_f_buf_func[3].n1 my_fork.fork_test.out1_f_buf_func[8].n1 my_fork.fork_test._out2_a_BX_f[0] my_fork.fork_test._in_v my_fork.fork_test.vc.tmp[2] my_fork.fork_test._en my_fork.fork_test.out1_f_buf_func[5].n1 my_fork.fork_test.vc.OR2_tf[3]._y my_fork.fork_test.out1_f_buf_func[7].n1 my_fork.fork_test.out1_f_buf_func[12].n1 my_fork.fork_test.out1_f_buf_func[1].n1 my_fork.fork_test.out1_f_buf_func[0].n1 my_fork.fork_test.out1_f_buf_func[13].n1 my_fork.fork_test.out1_t_buf_func[2].n1 my_fork.fork_test.vc.tmp[13] my_fork.fork_test.out1_f_buf_func[4].n1 my_fork.fork_test.out1_t_buf_func[11].n1 my_fork.fork_test._en2_X_t[0] my_fork.fork_test._en1_X_t[0] my_fork.fork_test.vc.tmp[1] my_fork.fork_test.vc.tmp[9] my_fork.fork_test.vc.tmp[20] my_fork.fork_test.vc.C2Els[0]._y my_fork.fork_test.out1_t_buf_func[6].n1 my_fork.fork_test.out1_t_buf_func[8].n1 my_fork.fork_test.out1_en_buf_t.buf6._y my_fork.fork_test.out1_f_buf_func[2].n1 my_fork.fork_test.out1_f_buf_func[10].n1 my_fork.fork_test._out1_a_B my_fork.fork_test.out1_t_buf_func[14].n1 my_fork.fork_test.out1_t_buf_func[12].n1 my_fork.fork_test.vc.C2Els[6]._y my_fork.fork_test.vc.tmp[0] my_fork.fork_test.vc.tmp[4] my_fork.fork_test.out1_t_buf_func[3].n1 my_fork.fork_test.vc.tmp[16] my_fork.fork_test.out1_t_buf_func[1].n1 my_fork.fork_test.vc.tmp[24] my_fork.fork_test.vc.tmp[8] my_fork.fork_test._out2_a_B my_fork.fork_test.out1_t_buf_func[10].n1 my_fork.fork_test.out1_a_B_buf_f.buf6._y my_fork.fork_test.vc.tmp[18] my_fork.fork_test.vc.C3Els[2]._y my_fork.fork_test.out1_t_buf_func[13].n1 my_fork.fork_test.vc.OR2_tf[8]._y my_fork.fork_test.out1_f_buf_func[14].n1 my_fork.fork_test.vc.tmp[12] my_fork.fork_test.vc.tmp[3] my_fork.fork_test.vc.tmp[21] my_fork.fork_test.vc.tmp[7] my_fork.fork_test.out1_t_buf_func[7].n1 my_fork.fork_test.out1_f_buf_func[11].n1 my_fork.fork_test.vc.C2Els[3]._y my_fork.fork_test.vc.tmp[23] my_fork.fork_test.out1_f_buf_func[9].n1 my_fork.fork_test.vc.tmp[17] my_fork.fork_test.vc.OR2_tf[13]._y my_fork.fork_test.vc.OR2_tf[0]._y my_fork.fork_test.vc.C3Els[1]._y my_fork.fork_test.vc.tmp[5] my_fork.fork_test.out1_t_buf_func[9].n1 my_fork.out1.a my_fork.fork_test.vc.OR2_tf[9]._y my_fork.out1.v my_fork.out2.a my_fork.fork_test.vc.tmp[22] my_fork.in.v my_fork.fork_test.vc.tmp[6] my_fork.fork_test.vc.C2Els[1]._y my_fork.fork_test.vc.tmp[10] my_fork.fork_test.vc.tmp[14] my_fork.fork_test.out2_en_buf_f.buf6._y my_fork.fork_test.vc.OR2_tf[7]._y my_fork.fork_test.vc.OR2_tf[11]._y my_fork.fork_test.vc.C3Els[0]._y my_fork.fork_test.vc.tmp[19] my_fork.fork_test.vc.OR2_tf[1]._y my_fork.fork_test.vc.C2Els[7]._y my_fork.fork_test.vc.C2Els[4]._y my_fork.fork_test.out1_en_buf_f.buf6._y my_fork.fork_test.vc.OR2_tf[2]._y my_fork.fork_test.out2_en_buf_t.buf6._y my_fork.fork_test.vc.OR2_tf[14]._y my_fork.fork_test.vc.C2Els[5]._y my_fork.fork_test.vc.tmp[15] my_fork.fork_test.vc.OR2_tf[6]._y my_fork.fork_test.vc.OR2_tf[4]._y my_fork.fork_test.out2_a_B_buf_t.buf6._y my_fork.fork_test.out2_a_B_buf_f.buf6._y my_fork.fork_test.vc.OR2_tf[5]._y my_fork.fork_test.vc.C2Els[2]._y my_fork.fork_test.vc.OR2_tf[12]._y my_fork.fork_test.vc.OR2_tf[10]._y my_fork.fork_test.out1_a_B_buf_t.buf6._y my_fork.fork_test.in_v_buf._y 
+	    105864 my_fork.fork_test.out1_f_buf_func[0].n1 : 0
+	    105864 my_fork.out2.v : 0
+	    105864 my_fork.out2.a : 0
+	    105864 my_fork.out1.v : 0
+	    105864 my_fork.fork_test.out1_f_buf_func[1].n1 : 0
+	    105864 my_fork.fork_test.out1_f_buf_func[3].n1 : 0
+	    105864 my_fork.fork_test.out1_f_buf_func[7].n1 : 0
+	    105864 my_fork.out1.a : 0
+	    105864 my_fork.fork_test.out1_t_buf_func[14].n1 : 0
+	    105864 my_fork.fork_test.out1_t_buf_func[6].n1 : 0
+	    105864 my_fork.fork_test.out1_f_buf_func[14].n1 : 0
+	    105864 my_fork.fork_test.out1_f_buf_func[13].n1 : 0
+	    105864 my_fork.fork_test.out1_t_buf_func[13].n1 : 0
+	    105864 my_fork.fork_test.out1_t_buf_func[2].n1 : 0
+	    105864 my_fork.fork_test.out1_f_buf_func[6].n1 : 0
+	    105864 my_fork.fork_test.out1_t_buf_func[12].n1 : 0
+	    105864 my_fork.fork_test.out1_t_buf_func[5].n1 : 0
+	    105864 my_fork.fork_test.out1_f_buf_func[12].n1 : 0
+	    105864 my_fork.fork_test.out1_f_buf_func[11].n1 : 0
+	    105864 my_fork.fork_test.out1_t_buf_func[11].n1 : 0
+	    105864 my_fork.fork_test.out1_t_buf_func[10].n1 : 0
+	    105864 my_fork.fork_test.out1_t_buf_func[0].n1 : 0
+	    105864 my_fork.fork_test.out1_f_buf_func[10].n1 : 0
+	    105864 my_fork.fork_test.out1_f_buf_func[2].n1 : 0
+	    105864 my_fork.fork_test.out1_f_buf_func[5].n1 : 0
+	    105864 my_fork.fork_test.out1_t_buf_func[4].n1 : 0
+	    105864 my_fork.fork_test.out1_t_buf_func[9].n1 : 0
+	    105864 my_fork.fork_test.out1_t_buf_func[1].n1 : 0
+	    105864 my_fork.fork_test.out1_f_buf_func[4].n1 : 0
+	    105864 my_fork.fork_test.out1_f_buf_func[9].n1 : 0
+	    105864 my_fork.fork_test.out1_t_buf_func[8].n1 : 0
+	    105864 my_fork.fork_test.out1_t_buf_func[3].n1 : 0
+	    105864 my_fork.fork_test.out1_f_buf_func[8].n1 : 0
+	    105864 my_fork.fork_test.out1_t_buf_func[7].n1 : 0
+	    105865 my_fork.fork_test.vc.OR2_tf[8]._y : 1  [by my_fork.fork_test.out1_f_buf_func[8].n1:=0]
+	    105866 my_fork.fork_test.vc.OR2_tf[12]._y : 1  [by my_fork.fork_test.out1_f_buf_func[12].n1:=0]
+	    105867 my_fork.fork_test.vc.OR2_tf[0]._y : 1  [by my_fork.fork_test.out1_t_buf_func[0].n1:=0]
+	    105867 my_fork.fork_test.vc.tmp[12] : 0  [by my_fork.fork_test.vc.OR2_tf[12]._y:=1]
+	    105887 my_fork.fork_test.vc.tmp[8] : 0  [by my_fork.fork_test.vc.OR2_tf[8]._y:=1]
+	    105893 my_fork.fork_test.vc.OR2_tf[10]._y : 1  [by my_fork.fork_test.out1_f_buf_func[10].n1:=0]
+	    105908 my_fork.fork_test.vc.OR2_tf[4]._y : 1  [by my_fork.fork_test.out1_f_buf_func[4].n1:=0]
+	    106017 my_fork.fork_test.vc.OR2_tf[1]._y : 1  [by my_fork.fork_test.out1_t_buf_func[1].n1:=0]
+	    106067 my_fork.fork_test.vc.tmp[4] : 0  [by my_fork.fork_test.vc.OR2_tf[4]._y:=1]
+	    106081 my_fork.fork_test.vc.OR2_tf[7]._y : 1  [by my_fork.fork_test.out1_t_buf_func[7].n1:=0]
+	    106181 my_fork.fork_test.vc.OR2_tf[2]._y : 1  [by my_fork.fork_test.out1_f_buf_func[2].n1:=0]
+	    106392 my_fork.fork_test._en : 1  [by my_fork.out1.v:=0]
+	    106393 my_fork.fork_test.out1_en_buf_f.buf6._y : 0  [by my_fork.fork_test._en:=1]
+	    106537 my_fork.fork_test.out2_en_buf_f.buf6._y : 0  [by my_fork.fork_test._en:=1]
+	    106699 my_fork.fork_test._en2_X_f[0] : 1  [by my_fork.fork_test.out2_en_buf_f.buf6._y:=0]
+	    107368 my_fork.fork_test.vc.tmp[7] : 0  [by my_fork.fork_test.vc.OR2_tf[7]._y:=1]
+	    107448 my_fork.fork_test.vc.tmp[0] : 0  [by my_fork.fork_test.vc.OR2_tf[0]._y:=1]
+	    107465 my_fork.fork_test.vc.OR2_tf[5]._y : 1  [by my_fork.fork_test.out1_f_buf_func[5].n1:=0]
+	    108299 my_fork.fork_test._out1_a_B : 1  [by my_fork.out1.a:=0]
+	    108306 my_fork.fork_test.out1_a_B_buf_t.buf6._y : 0  [by my_fork.fork_test._out1_a_B:=1]
+	    108313 my_fork.fork_test.out1_a_B_buf_f.buf6._y : 0  [by my_fork.fork_test._out1_a_B:=1]
+	    108413 my_fork.fork_test.vc.tmp[2] : 0  [by my_fork.fork_test.vc.OR2_tf[2]._y:=1]
+	    108466 my_fork.fork_test._out1_a_BX_f[0] : 1  [by my_fork.fork_test.out1_a_B_buf_t.buf6._y:=0]
+	    108625 my_fork.fork_test.vc.OR2_tf[9]._y : 1  [by my_fork.fork_test.out1_f_buf_func[9].n1:=0]
+	    108626 my_fork.fork_test.vc.tmp[9] : 0  [by my_fork.fork_test.vc.OR2_tf[9]._y:=1]
+	    108627 my_fork.fork_test.vc.C2Els[4]._y : 1  [by my_fork.fork_test.vc.tmp[9]:=0]
+	    108628 my_fork.fork_test.vc.tmp[19] : 0  [by my_fork.fork_test.vc.C2Els[4]._y:=1]
+	    109224 my_fork.fork_test.out1_en_buf_t.buf6._y : 0  [by my_fork.fork_test._en:=1]
+	    110426 my_fork.fork_test._out2_a_B : 1  [by my_fork.out2.a:=0]
+	    110427 my_fork.fork_test.out2_a_B_buf_f.buf6._y : 0  [by my_fork.fork_test._out2_a_B:=1]
+	    110613 my_fork.fork_test.out2_a_B_buf_t.buf6._y : 0  [by my_fork.fork_test._out2_a_B:=1]
+	    111467 my_fork.fork_test._en1_X_t[0] : 1  [by my_fork.fork_test.out1_en_buf_t.buf6._y:=0]
+	    112746 my_fork.fork_test.out2_en_buf_t.buf6._y : 0  [by my_fork.fork_test._en:=1]
+	    112747 my_fork.fork_test._en2_X_t[0] : 1  [by my_fork.fork_test.out2_en_buf_t.buf6._y:=0]
+	    114609 my_fork.fork_test._out2_a_BX_t[0] : 1  [by my_fork.fork_test.out2_a_B_buf_f.buf6._y:=0]
+	    114834 my_fork.fork_test.vc.tmp[5] : 0  [by my_fork.fork_test.vc.OR2_tf[5]._y:=1]
+	    115238 my_fork.fork_test.vc.tmp[10] : 0  [by my_fork.fork_test.vc.OR2_tf[10]._y:=1]
+	    115687 my_fork.fork_test.vc.C2Els[2]._y : 1  [by my_fork.fork_test.vc.tmp[5]:=0]
+	    115692 my_fork.fork_test.vc.tmp[17] : 0  [by my_fork.fork_test.vc.C2Els[2]._y:=1]
+	    118905 my_fork.fork_test.vc.OR2_tf[6]._y : 1  [by my_fork.fork_test.out1_f_buf_func[6].n1:=0]
+	    119547 my_fork.fork_test.vc.OR2_tf[3]._y : 1  [by my_fork.fork_test.out1_t_buf_func[3].n1:=0]
+	    119548 my_fork.fork_test.vc.tmp[3] : 0  [by my_fork.fork_test.vc.OR2_tf[3]._y:=1]
+	    119565 my_fork.fork_test.vc.C2Els[1]._y : 1  [by my_fork.fork_test.vc.tmp[3]:=0]
+	    119796 my_fork.fork_test.vc.tmp[6] : 0  [by my_fork.fork_test.vc.OR2_tf[6]._y:=1]
+	    122138 my_fork.fork_test.vc.tmp[16] : 0  [by my_fork.fork_test.vc.C2Els[1]._y:=1]
+	    125693 my_fork.fork_test.vc.tmp[1] : 0  [by my_fork.fork_test.vc.OR2_tf[1]._y:=1]
+	    125696 my_fork.fork_test.vc.C2Els[0]._y : 1  [by my_fork.fork_test.vc.tmp[1]:=0]
+	    126637 my_fork.fork_test.vc.tmp[15] : 0  [by my_fork.fork_test.vc.C2Els[0]._y:=1]
+	    128157 my_fork.fork_test.vc.C2Els[3]._y : 1  [by my_fork.fork_test.vc.tmp[6]:=0]
+	    128158 my_fork.fork_test.vc.tmp[18] : 0  [by my_fork.fork_test.vc.C2Els[3]._y:=1]
+	    128200 my_fork.fork_test.vc.C2Els[7]._y : 1  [by my_fork.fork_test.vc.tmp[18]:=0]
+	    129789 my_fork.fork_test.vc.OR2_tf[13]._y : 1  [by my_fork.fork_test.out1_t_buf_func[13].n1:=0]
+	    129870 my_fork.fork_test._out1_a_BX_t[0] : 1  [by my_fork.fork_test.out1_a_B_buf_f.buf6._y:=0]
+	    131017 my_fork.fork_test.vc.tmp[23] : 0  [by my_fork.fork_test.vc.C2Els[7]._y:=1]
+	    132744 my_fork.fork_test.vc.OR2_tf[14]._y : 1  [by my_fork.fork_test.out1_f_buf_func[14].n1:=0]
+	    132839 my_fork.fork_test.vc.tmp[14] : 0  [by my_fork.fork_test.vc.OR2_tf[14]._y:=1]
+	    143522 my_fork.fork_test.vc.tmp[13] : 0  [by my_fork.fork_test.vc.OR2_tf[13]._y:=1]
+	    143857 my_fork.fork_test.vc.C3Els[0]._y : 1  [by my_fork.fork_test.vc.tmp[13]:=0]
+	    143865 my_fork.fork_test.vc.tmp[21] : 0  [by my_fork.fork_test.vc.C3Els[0]._y:=1]
+	    145395 my_fork.fork_test._out2_a_BX_f[0] : 1  [by my_fork.fork_test.out2_a_B_buf_t.buf6._y:=0]
+	    145677 my_fork.fork_test._en1_X_f[0] : 1  [by my_fork.fork_test.out1_en_buf_f.buf6._y:=0]
+	    166822 my_fork.fork_test.vc.OR2_tf[11]._y : 1  [by my_fork.fork_test.out1_t_buf_func[11].n1:=0]
+	    166856 my_fork.fork_test.vc.tmp[11] : 0  [by my_fork.fork_test.vc.OR2_tf[11]._y:=1]
+	    180743 my_fork.fork_test.vc.C2Els[5]._y : 1  [by my_fork.fork_test.vc.tmp[11]:=0]
+	    181661 my_fork.fork_test.vc.tmp[20] : 0  [by my_fork.fork_test.vc.C2Els[5]._y:=1]
+	    181665 my_fork.fork_test.vc.C3Els[1]._y : 1  [by my_fork.fork_test.vc.tmp[20]:=0]
+	    185599 my_fork.fork_test.vc.C2Els[6]._y : 1  [by my_fork.fork_test.vc.tmp[15]:=0]
+	    187997 my_fork.fork_test.vc.tmp[22] : 0  [by my_fork.fork_test.vc.C2Els[6]._y:=1]
+	    228043 my_fork.fork_test.vc.tmp[24] : 0  [by my_fork.fork_test.vc.C3Els[1]._y:=1]
+	    231258 my_fork.fork_test.vc.C3Els[2]._y : 1  [by my_fork.fork_test.vc.tmp[24]:=0]
+	    278377 my_fork.fork_test._in_v : 0  [by my_fork.fork_test.vc.C3Els[2]._y:=1]
+	    278425 my_fork.fork_test.in_v_buf._y : 1  [by my_fork.fork_test._in_v:=0]
+	    278428 my_fork.in.v : 0  [by my_fork.fork_test.in_v_buf._y:=1]
+System initialized
+	    278428 Reset : 0
+	    278606 my_fork._reset_B : 1  [by Reset:=0]
+	    299583 my_fork.fork_test.reset_buf._y : 0  [by my_fork._reset_B:=1]
+	    311482 my_fork.fork_test._reset_BX : 1  [by my_fork.fork_test.reset_buf._y:=0]
+	    317433 my_fork.fork_test.reset_bufarray.buf12._y : 0  [by my_fork.fork_test._reset_BX:=1]
+	    356918 my_fork.fork_test._reset_BXX[0] : 1  [by my_fork.fork_test.reset_bufarray.buf12._y:=0]
+System reset completed
+
+Output neutral checked
+	    356918 my_fork.fork_test.out1_t_buf_func[0].n1 : 1
+	    356918 my_fork.fork_test.out1_f_buf_func[14].n1 : 1
+	    356918 my_fork.fork_test.out1_t_buf_func[2].n1 : 1
+	    356918 my_fork.fork_test.out1_f_buf_func[6].n1 : 1
+	    356918 my_fork.fork_test.out1_f_buf_func[13].n1 : 1
+	    356918 my_fork.fork_test.out1_f_buf_func[5].n1 : 1
+	    356918 my_fork.fork_test.out1_f_buf_func[12].n1 : 1
+	    356918 my_fork.fork_test.out1_f_buf_func[11].n1 : 1
+	    356918 my_fork.fork_test.out1_f_buf_func[1].n1 : 1
+	    356918 my_fork.fork_test.out1_f_buf_func[4].n1 : 1
+	    356918 my_fork.fork_test.out1_f_buf_func[10].n1 : 1
+	    356918 my_fork.fork_test.out1_f_buf_func[9].n1 : 1
+	    356918 my_fork.fork_test.out1_f_buf_func[3].n1 : 1
+	    356918 my_fork.fork_test.out1_f_buf_func[8].n1 : 1
+	    356918 my_fork.fork_test.out1_f_buf_func[7].n1 : 1
+	    356919 my_fork.fork_test.vc.OR2_tf[5]._y : 0  [by my_fork.fork_test.out1_f_buf_func[5].n1:=1]
+	    356919 my_fork.fork_test.vc.OR2_tf[12]._y : 0  [by my_fork.fork_test.out1_f_buf_func[12].n1:=1]
+	    356919 my_fork.fork_test.vc.OR2_tf[11]._y : 0  [by my_fork.fork_test.out1_f_buf_func[11].n1:=1]
+	    356919 my_fork.fork_test.out2_f_buf_func[6]._y : 0  [by my_fork.fork_test.out1_f_buf_func[6].n1:=1]
+	    356919 my_fork.fork_test.out1_f_buf_func[10]._y : 0  [by my_fork.fork_test.out1_f_buf_func[10].n1:=1]
+	    356919 my_fork.fork_test.out2_f_buf_func[9]._y : 0  [by my_fork.fork_test.out1_f_buf_func[9].n1:=1]
+	    356919 my_fork.fork_test.out2_f_buf_func[14]._y : 0  [by my_fork.fork_test.out1_f_buf_func[14].n1:=1]
+	    356919 my_fork.fork_test.out2_f_buf_func[10]._y : 0  [by my_fork.fork_test.out1_f_buf_func[10].n1:=1]
+	    356922 my_fork.fork_test.out1_f_buf_func[14]._y : 0  [by my_fork.fork_test.out1_f_buf_func[14].n1:=1]
+	    356922 my_fork.fork_test.vc.OR2_tf[7]._y : 0  [by my_fork.fork_test.out1_f_buf_func[7].n1:=1]
+	    356923 my_fork.fork_test.out2_f_buf_func[3]._y : 0  [by my_fork.fork_test.out1_f_buf_func[3].n1:=1]
+	    356925 my_fork.fork_test.vc.tmp[7] : 1  [by my_fork.fork_test.vc.OR2_tf[7]._y:=0]
+	    356929 my_fork.fork_test.out2_f_buf_func[8]._y : 0  [by my_fork.fork_test.out1_f_buf_func[8].n1:=1]
+	    356930 my_fork.fork_test.vc.OR2_tf[13]._y : 0  [by my_fork.fork_test.out1_f_buf_func[13].n1:=1]
+	    356931 my_fork.fork_test.vc.OR2_tf[1]._y : 0  [by my_fork.fork_test.out1_f_buf_func[1].n1:=1]
+	    356932 my_fork.fork_test.out1_f_buf_func[8]._y : 0  [by my_fork.fork_test.out1_f_buf_func[8].n1:=1]
+	    356933 my_fork.fork_test.out1_f_buf_func[14].y : 1  [by my_fork.fork_test.out1_f_buf_func[14]._y:=0]
+	    356936 my_fork.fork_test.out2_f_buf_func[7]._y : 0  [by my_fork.fork_test.out1_f_buf_func[7].n1:=1]
+	    356939 my_fork.fork_test.out1_f_buf_func[4]._y : 0  [by my_fork.fork_test.out1_f_buf_func[4].n1:=1]
+	    356943 my_fork.fork_test.vc.OR2_tf[4]._y : 0  [by my_fork.fork_test.out1_f_buf_func[4].n1:=1]
+	    356955 my_fork.fork_test.out1_f_buf_func[12]._y : 0  [by my_fork.fork_test.out1_f_buf_func[12].n1:=1]
+	    356974 my_fork.fork_test.out1_f_buf_func[5]._y : 0  [by my_fork.fork_test.out1_f_buf_func[5].n1:=1]
+	    356977 my_fork.fork_test.out2_f_buf_func[3].y : 1  [by my_fork.fork_test.out2_f_buf_func[3]._y:=0]
+	    356989 my_fork.fork_test.out2_f_buf_func[14].y : 1  [by my_fork.fork_test.out2_f_buf_func[14]._y:=0]
+	    356991 my_fork.fork_test.vc.OR2_tf[14]._y : 0  [by my_fork.fork_test.out1_f_buf_func[14].n1:=1]
+	    357013 my_fork.fork_test.out1_f_buf_func[8].y : 1  [by my_fork.fork_test.out1_f_buf_func[8]._y:=0]
+	    357014 my_fork.fork_test.vc.OR2_tf[2]._y : 0  [by my_fork.fork_test.out1_t_buf_func[2].n1:=1]
+	    357022 my_fork.fork_test.out1_f_buf_func[7]._y : 0  [by my_fork.fork_test.out1_f_buf_func[7].n1:=1]
+	    357035 my_fork.fork_test.vc.tmp[4] : 1  [by my_fork.fork_test.vc.OR2_tf[4]._y:=0]
+	    357054 my_fork.fork_test.out1_t_buf_func[2]._y : 0  [by my_fork.fork_test.out1_t_buf_func[2].n1:=1]
+	    357067 my_fork.fork_test.out1_f_buf_func[7].y : 1  [by my_fork.fork_test.out1_f_buf_func[7]._y:=0]
+	    357079 my_fork.fork_test.vc.OR2_tf[9]._y : 0  [by my_fork.fork_test.out1_f_buf_func[9].n1:=1]
+	    357091 my_fork.fork_test.vc.OR2_tf[0]._y : 0  [by my_fork.fork_test.out1_t_buf_func[0].n1:=1]
+	    357102 my_fork.fork_test.out1_t_buf_func[0]._y : 0  [by my_fork.fork_test.out1_t_buf_func[0].n1:=1]
+	    357147 my_fork.fork_test.out2_f_buf_func[6].y : 1  [by my_fork.fork_test.out2_f_buf_func[6]._y:=0]
+	    357159 my_fork.fork_test.out1_f_buf_func[6]._y : 0  [by my_fork.fork_test.out1_f_buf_func[6].n1:=1]
+	    357211 my_fork.fork_test.out1_f_buf_func[6].y : 1  [by my_fork.fork_test.out1_f_buf_func[6]._y:=0]
+	    357275 my_fork.fork_test.out2_f_buf_func[4]._y : 0  [by my_fork.fork_test.out1_f_buf_func[4].n1:=1]
+	    357282 my_fork.fork_test.out2_f_buf_func[4].y : 1  [by my_fork.fork_test.out2_f_buf_func[4]._y:=0]
+	    357326 my_fork.fork_test.out1_f_buf_func[3]._y : 0  [by my_fork.fork_test.out1_f_buf_func[3].n1:=1]
+	    357499 my_fork.fork_test.vc.OR2_tf[3]._y : 0  [by my_fork.fork_test.out1_f_buf_func[3].n1:=1]
+	    357604 my_fork.fork_test.vc.tmp[14] : 1  [by my_fork.fork_test.vc.OR2_tf[14]._y:=0]
+	    357616 my_fork.fork_test.vc.tmp[0] : 1  [by my_fork.fork_test.vc.OR2_tf[0]._y:=0]
+	    357745 my_fork.fork_test.out2_t_buf_func[0]._y : 0  [by my_fork.fork_test.out1_t_buf_func[0].n1:=1]
+	    357747 my_fork.fork_test.out2_t_buf_func[0].y : 1  [by my_fork.fork_test.out2_t_buf_func[0]._y:=0]
+	    357762 my_fork.fork_test.out1_f_buf_func[10].y : 1  [by my_fork.fork_test.out1_f_buf_func[10]._y:=0]
+	    357947 my_fork.fork_test.out2_f_buf_func[5]._y : 0  [by my_fork.fork_test.out1_f_buf_func[5].n1:=1]
+	    357955 my_fork.fork_test.out1_f_buf_func[9]._y : 0  [by my_fork.fork_test.out1_f_buf_func[9].n1:=1]
+	    357965 my_fork.fork_test.vc.OR2_tf[8]._y : 0  [by my_fork.fork_test.out1_f_buf_func[8].n1:=1]
+	    357966 my_fork.fork_test.vc.tmp[8] : 1  [by my_fork.fork_test.vc.OR2_tf[8]._y:=0]
+	    358002 my_fork.fork_test.out1_t_buf_func[0].y : 1  [by my_fork.fork_test.out1_t_buf_func[0]._y:=0]
+	    358051 my_fork.fork_test.out1_t_buf_func[2].y : 1  [by my_fork.fork_test.out1_t_buf_func[2]._y:=0]
+	    358077 my_fork.fork_test.out2_f_buf_func[8].y : 1  [by my_fork.fork_test.out2_f_buf_func[8]._y:=0]
+	    358088 my_fork.fork_test.out1_f_buf_func[9].y : 1  [by my_fork.fork_test.out1_f_buf_func[9]._y:=0]
+	    358091 my_fork.fork_test.vc.tmp[13] : 1  [by my_fork.fork_test.vc.OR2_tf[13]._y:=0]
+	    358123 my_fork.fork_test.vc.tmp[12] : 1  [by my_fork.fork_test.vc.OR2_tf[12]._y:=0]
+	    358127 my_fork.fork_test.vc.C3Els[0]._y : 0  [by my_fork.fork_test.vc.tmp[12]:=1]
+	    358301 my_fork.fork_test.out2_f_buf_func[5].y : 1  [by my_fork.fork_test.out2_f_buf_func[5]._y:=0]
+	    358378 my_fork.fork_test.out2_f_buf_func[9].y : 1  [by my_fork.fork_test.out2_f_buf_func[9]._y:=0]
+	    358610 my_fork.fork_test.out2_f_buf_func[1]._y : 0  [by my_fork.fork_test.out1_f_buf_func[1].n1:=1]
+	    358673 my_fork.fork_test.vc.tmp[21] : 1  [by my_fork.fork_test.vc.C3Els[0]._y:=0]
+	    358718 my_fork.fork_test.out1_f_buf_func[5].y : 1  [by my_fork.fork_test.out1_f_buf_func[5]._y:=0]
+	    358728 my_fork.fork_test.vc.tmp[9] : 1  [by my_fork.fork_test.vc.OR2_tf[9]._y:=0]
+	    358729 my_fork.fork_test.vc.C2Els[4]._y : 0  [by my_fork.fork_test.vc.tmp[9]:=1]
+	    360482 my_fork.fork_test.out1_f_buf_func[11]._y : 0  [by my_fork.fork_test.out1_f_buf_func[11].n1:=1]
+	    360561 my_fork.fork_test.out1_f_buf_func[11].y : 1  [by my_fork.fork_test.out1_f_buf_func[11]._y:=0]
+	    360818 my_fork.fork_test.out1_f_buf_func[13]._y : 0  [by my_fork.fork_test.out1_f_buf_func[13].n1:=1]
+	    360877 my_fork.fork_test.out2_f_buf_func[13]._y : 0  [by my_fork.fork_test.out1_f_buf_func[13].n1:=1]
+	    360965 my_fork.fork_test.out2_f_buf_func[13].y : 1  [by my_fork.fork_test.out2_f_buf_func[13]._y:=0]
+	    363251 my_fork.fork_test.out1_f_buf_func[13].y : 1  [by my_fork.fork_test.out1_f_buf_func[13]._y:=0]
+	    363966 my_fork.fork_test.vc.tmp[3] : 1  [by my_fork.fork_test.vc.OR2_tf[3]._y:=0]
+	    365266 my_fork.fork_test.out1_f_buf_func[12].y : 1  [by my_fork.fork_test.out1_f_buf_func[12]._y:=0]
+	    365374 my_fork.fork_test.vc.tmp[11] : 1  [by my_fork.fork_test.vc.OR2_tf[11]._y:=0]
+	    365583 my_fork.fork_test.vc.tmp[1] : 1  [by my_fork.fork_test.vc.OR2_tf[1]._y:=0]
+	    366566 my_fork.fork_test.vc.OR2_tf[10]._y : 0  [by my_fork.fork_test.out1_f_buf_func[10].n1:=1]
+	    368013 my_fork.fork_test.out2_f_buf_func[7].y : 1  [by my_fork.fork_test.out2_f_buf_func[7]._y:=0]
+	    371036 my_fork.fork_test.vc.tmp[2] : 1  [by my_fork.fork_test.vc.OR2_tf[2]._y:=0]
+	    371095 my_fork.fork_test.vc.C2Els[1]._y : 0  [by my_fork.fork_test.vc.tmp[2]:=1]
+	    371107 my_fork.fork_test.vc.tmp[19] : 1  [by my_fork.fork_test.vc.C2Els[4]._y:=0]
+	    371125 my_fork.fork_test.vc.tmp[16] : 1  [by my_fork.fork_test.vc.C2Els[1]._y:=0]
+	    372938 my_fork.fork_test.out1_f_buf_func[3].y : 1  [by my_fork.fork_test.out1_f_buf_func[3]._y:=0]
+	    373365 my_fork.fork_test.vc.C2Els[0]._y : 0  [by my_fork.fork_test.vc.tmp[1]:=1]
+	    373902 my_fork.fork_test.out1_f_buf_func[1]._y : 0  [by my_fork.fork_test.out1_f_buf_func[1].n1:=1]
+	    374832 my_fork.fork_test.vc.tmp[15] : 1  [by my_fork.fork_test.vc.C2Els[0]._y:=0]
+	    374922 my_fork.fork_test.out1_f_buf_func[4].y : 1  [by my_fork.fork_test.out1_f_buf_func[4]._y:=0]
+	    375964 my_fork.fork_test.vc.OR2_tf[6]._y : 0  [by my_fork.fork_test.out1_f_buf_func[6].n1:=1]
+	    376649 my_fork.fork_test.vc.tmp[6] : 1  [by my_fork.fork_test.vc.OR2_tf[6]._y:=0]
+	    380293 my_fork.fork_test.out2_f_buf_func[11]._y : 0  [by my_fork.fork_test.out1_f_buf_func[11].n1:=1]
+	    380420 my_fork.fork_test.out2_f_buf_func[11].y : 1  [by my_fork.fork_test.out2_f_buf_func[11]._y:=0]
+	    388363 my_fork.fork_test.vc.tmp[5] : 1  [by my_fork.fork_test.vc.OR2_tf[5]._y:=0]
+	    388532 my_fork.fork_test.vc.C2Els[2]._y : 0  [by my_fork.fork_test.vc.tmp[5]:=1]
+	    388575 my_fork.fork_test.vc.tmp[17] : 1  [by my_fork.fork_test.vc.C2Els[2]._y:=0]
+	    393364 my_fork.fork_test.vc.C2Els[3]._y : 0  [by my_fork.fork_test.vc.tmp[6]:=1]
+	    393376 my_fork.fork_test.vc.tmp[18] : 1  [by my_fork.fork_test.vc.C2Els[3]._y:=0]
+	    394206 my_fork.fork_test.out2_t_buf_func[2]._y : 0  [by my_fork.fork_test.out1_t_buf_func[2].n1:=1]
+	    394216 my_fork.fork_test.vc.C2Els[6]._y : 0  [by my_fork.fork_test.vc.tmp[15]:=1]
+	    394219 my_fork.fork_test.vc.tmp[22] : 1  [by my_fork.fork_test.vc.C2Els[6]._y:=0]
+	    394439 my_fork.fork_test.out2_t_buf_func[2].y : 1  [by my_fork.fork_test.out2_t_buf_func[2]._y:=0]
+	    394655 my_fork.fork_test.vc.C2Els[7]._y : 0  [by my_fork.fork_test.vc.tmp[18]:=1]
+	    394693 my_fork.fork_test.vc.tmp[23] : 1  [by my_fork.fork_test.vc.C2Els[7]._y:=0]
+	    394893 my_fork.fork_test.vc.tmp[10] : 1  [by my_fork.fork_test.vc.OR2_tf[10]._y:=0]
+	    394894 my_fork.fork_test.vc.C2Els[5]._y : 0  [by my_fork.fork_test.vc.tmp[10]:=1]
+	    401924 my_fork.fork_test.out2_f_buf_func[12]._y : 0  [by my_fork.fork_test.out1_f_buf_func[12].n1:=1]
+	    402016 my_fork.fork_test.out2_f_buf_func[12].y : 1  [by my_fork.fork_test.out2_f_buf_func[12]._y:=0]
+	    404173 my_fork.fork_test.out2_f_buf_func[1].y : 1  [by my_fork.fork_test.out2_f_buf_func[1]._y:=0]
+	    407341 my_fork.fork_test.out2_f_buf_func[10].y : 1  [by my_fork.fork_test.out2_f_buf_func[10]._y:=0]
+	    407646 my_fork.fork_test.vc.tmp[20] : 1  [by my_fork.fork_test.vc.C2Els[5]._y:=0]
+	    410373 my_fork.fork_test.vc.C3Els[1]._y : 0  [by my_fork.fork_test.vc.tmp[20]:=1]
+	    410375 my_fork.fork_test.vc.tmp[24] : 1  [by my_fork.fork_test.vc.C3Els[1]._y:=0]
+	    410376 my_fork.fork_test.vc.C3Els[2]._y : 0  [by my_fork.fork_test.vc.tmp[24]:=1]
+	    411877 my_fork.fork_test._in_v : 1  [by my_fork.fork_test.vc.C3Els[2]._y:=0]
+	    411879 my_fork.fork_test.in_v_buf._y : 0  [by my_fork.fork_test._in_v:=1]
+	    411897 my_fork.in.v : 1  [by my_fork.fork_test.in_v_buf._y:=0]
+	    433406 my_fork.fork_test.out1_f_buf_func[1].y : 1  [by my_fork.fork_test.out1_f_buf_func[1]._y:=0]
+	    433406 my_fork.out1.v : 1
+	    433406 my_fork.out2.v : 1
+	    433525 my_fork.fork_test.inack_ctl._y : 0  [by my_fork.out2.v:=1]
+	    439245 my_fork.in.a : 1  [by my_fork.fork_test.inack_ctl._y:=0]
+	    439253 my_fork.fork_test._en : 0  [by my_fork.in.a:=1]
+	    439258 my_fork.fork_test.out2_en_buf_t.buf6._y : 1  [by my_fork.fork_test._en:=0]
+	    439259 my_fork.fork_test._en2_X_t[0] : 0  [by my_fork.fork_test.out2_en_buf_t.buf6._y:=1]
+	    439307 my_fork.fork_test.out2_en_buf_f.buf6._y : 1  [by my_fork.fork_test._en:=0]
+	    439445 my_fork.fork_test._en2_X_f[0] : 0  [by my_fork.fork_test.out2_en_buf_f.buf6._y:=1]
+	    440320 my_fork.fork_test.out1_en_buf_f.buf6._y : 1  [by my_fork.fork_test._en:=0]
+	    440321 my_fork.fork_test._en1_X_f[0] : 0  [by my_fork.fork_test.out1_en_buf_f.buf6._y:=1]
+	    489791 my_fork.fork_test.out1_en_buf_t.buf6._y : 1  [by my_fork.fork_test._en:=0]
+	    489855 my_fork.fork_test._en1_X_t[0] : 0  [by my_fork.fork_test.out1_en_buf_t.buf6._y:=1]
+	    489855 my_fork.fork_test.out1_t_buf_func[0].n1 : 0
+	    489855 my_fork.fork_test.out1_f_buf_func[14].n1 : 0
+	    489855 my_fork.fork_test.out1_t_buf_func[2].n1 : 0
+	    489855 my_fork.fork_test.out1_f_buf_func[6].n1 : 0
+	    489855 my_fork.fork_test.out1_f_buf_func[13].n1 : 0
+	    489855 my_fork.fork_test.out1_f_buf_func[5].n1 : 0
+	    489855 my_fork.fork_test.out1_f_buf_func[12].n1 : 0
+	    489855 my_fork.fork_test.out1_f_buf_func[11].n1 : 0
+	    489855 my_fork.fork_test.out1_f_buf_func[1].n1 : 0
+	    489855 my_fork.fork_test.out1_f_buf_func[4].n1 : 0
+	    489855 my_fork.fork_test.out1_f_buf_func[10].n1 : 0
+	    489855 my_fork.fork_test.out1_f_buf_func[9].n1 : 0
+	    489855 my_fork.fork_test.out1_f_buf_func[3].n1 : 0
+	    489855 my_fork.fork_test.out1_f_buf_func[8].n1 : 0
+	    489855 my_fork.fork_test.out1_f_buf_func[7].n1 : 0
+	    489856 my_fork.fork_test.vc.OR2_tf[11]._y : 1  [by my_fork.fork_test.out1_f_buf_func[11].n1:=0]
+	    489857 my_fork.fork_test.vc.OR2_tf[14]._y : 1  [by my_fork.fork_test.out1_f_buf_func[14].n1:=0]
+	    489864 my_fork.fork_test.vc.OR2_tf[1]._y : 1  [by my_fork.fork_test.out1_f_buf_func[1].n1:=0]
+	    489866 my_fork.fork_test.vc.OR2_tf[12]._y : 1  [by my_fork.fork_test.out1_f_buf_func[12].n1:=0]
+	    489871 my_fork.fork_test.vc.tmp[14] : 0  [by my_fork.fork_test.vc.OR2_tf[14]._y:=1]
+	    489880 my_fork.fork_test.vc.OR2_tf[4]._y : 1  [by my_fork.fork_test.out1_f_buf_func[4].n1:=0]
+	    489892 my_fork.fork_test.vc.OR2_tf[2]._y : 1  [by my_fork.fork_test.out1_t_buf_func[2].n1:=0]
+	    489903 my_fork.fork_test.vc.tmp[2] : 0  [by my_fork.fork_test.vc.OR2_tf[2]._y:=1]
+	    489906 my_fork.fork_test.vc.OR2_tf[13]._y : 1  [by my_fork.fork_test.out1_f_buf_func[13].n1:=0]
+	    489907 my_fork.fork_test.vc.tmp[13] : 0  [by my_fork.fork_test.vc.OR2_tf[13]._y:=1]
+	    489978 my_fork.fork_test.vc.OR2_tf[0]._y : 1  [by my_fork.fork_test.out1_t_buf_func[0].n1:=0]
+	    489979 my_fork.fork_test.vc.tmp[0] : 0  [by my_fork.fork_test.vc.OR2_tf[0]._y:=1]
+	    489998 my_fork.fork_test.vc.OR2_tf[6]._y : 1  [by my_fork.fork_test.out1_f_buf_func[6].n1:=0]
+	    490000 my_fork.fork_test.vc.OR2_tf[3]._y : 1  [by my_fork.fork_test.out1_f_buf_func[3].n1:=0]
+	    490085 my_fork.fork_test.vc.OR2_tf[7]._y : 1  [by my_fork.fork_test.out1_f_buf_func[7].n1:=0]
+	    490297 my_fork.fork_test.vc.OR2_tf[5]._y : 1  [by my_fork.fork_test.out1_f_buf_func[5].n1:=0]
+	    490429 my_fork.fork_test.vc.tmp[5] : 0  [by my_fork.fork_test.vc.OR2_tf[5]._y:=1]
+	    490547 my_fork.fork_test.vc.tmp[11] : 0  [by my_fork.fork_test.vc.OR2_tf[11]._y:=1]
+	    490639 my_fork.fork_test.vc.tmp[3] : 0  [by my_fork.fork_test.vc.OR2_tf[3]._y:=1]
+	    490640 my_fork.fork_test.vc.C2Els[1]._y : 1  [by my_fork.fork_test.vc.tmp[3]:=0]
+	    490657 my_fork.fork_test.vc.tmp[16] : 0  [by my_fork.fork_test.vc.C2Els[1]._y:=1]
+	    491407 my_fork.fork_test.vc.tmp[1] : 0  [by my_fork.fork_test.vc.OR2_tf[1]._y:=1]
+	    491477 my_fork.fork_test.vc.tmp[12] : 0  [by my_fork.fork_test.vc.OR2_tf[12]._y:=1]
+	    491559 my_fork.fork_test.vc.C2Els[0]._y : 1  [by my_fork.fork_test.vc.tmp[1]:=0]
+	    491562 my_fork.fork_test.vc.tmp[15] : 0  [by my_fork.fork_test.vc.C2Els[0]._y:=1]
+	    491878 my_fork.fork_test.vc.tmp[7] : 0  [by my_fork.fork_test.vc.OR2_tf[7]._y:=1]
+	    491986 my_fork.fork_test.vc.C2Els[6]._y : 1  [by my_fork.fork_test.vc.tmp[15]:=0]
+	    491992 my_fork.fork_test.vc.tmp[22] : 0  [by my_fork.fork_test.vc.C2Els[6]._y:=1]
+	    493376 my_fork.fork_test.vc.OR2_tf[9]._y : 1  [by my_fork.fork_test.out1_f_buf_func[9].n1:=0]
+	    494460 my_fork.fork_test.vc.C3Els[0]._y : 1  [by my_fork.fork_test.vc.tmp[12]:=0]
+	    495964 my_fork.fork_test.vc.tmp[9] : 0  [by my_fork.fork_test.vc.OR2_tf[9]._y:=1]
+	    496499 my_fork.fork_test.vc.tmp[6] : 0  [by my_fork.fork_test.vc.OR2_tf[6]._y:=1]
+	    496921 my_fork.fork_test.vc.tmp[21] : 0  [by my_fork.fork_test.vc.C3Els[0]._y:=1]
+	    497329 my_fork.fork_test.vc.C2Els[3]._y : 1  [by my_fork.fork_test.vc.tmp[6]:=0]
+	    500108 my_fork.fork_test.vc.OR2_tf[10]._y : 1  [by my_fork.fork_test.out1_f_buf_func[10].n1:=0]
+	    500110 my_fork.fork_test.vc.tmp[10] : 0  [by my_fork.fork_test.vc.OR2_tf[10]._y:=1]
+	    500304 my_fork.fork_test.vc.C2Els[5]._y : 1  [by my_fork.fork_test.vc.tmp[10]:=0]
+	    500907 my_fork.fork_test.vc.tmp[20] : 0  [by my_fork.fork_test.vc.C2Els[5]._y:=1]
+	    506023 my_fork.fork_test.vc.OR2_tf[8]._y : 1  [by my_fork.fork_test.out1_f_buf_func[8].n1:=0]
+	    506161 my_fork.fork_test.vc.tmp[8] : 0  [by my_fork.fork_test.vc.OR2_tf[8]._y:=1]
+	    506178 my_fork.fork_test.vc.C2Els[4]._y : 1  [by my_fork.fork_test.vc.tmp[8]:=0]
+	    506195 my_fork.fork_test.vc.tmp[19] : 0  [by my_fork.fork_test.vc.C2Els[4]._y:=1]
+	    506621 my_fork.fork_test.vc.C3Els[1]._y : 1  [by my_fork.fork_test.vc.tmp[19]:=0]
+	    506622 my_fork.fork_test.vc.tmp[24] : 0  [by my_fork.fork_test.vc.C3Els[1]._y:=1]
+	    507392 my_fork.fork_test.vc.tmp[4] : 0  [by my_fork.fork_test.vc.OR2_tf[4]._y:=1]
+	    507393 my_fork.fork_test.vc.C2Els[2]._y : 1  [by my_fork.fork_test.vc.tmp[4]:=0]
+	    508419 my_fork.fork_test.vc.tmp[17] : 0  [by my_fork.fork_test.vc.C2Els[2]._y:=1]
+	    520261 my_fork.fork_test.vc.tmp[18] : 0  [by my_fork.fork_test.vc.C2Els[3]._y:=1]
+	    520262 my_fork.fork_test.vc.C2Els[7]._y : 1  [by my_fork.fork_test.vc.tmp[18]:=0]
+	    520281 my_fork.fork_test.vc.tmp[23] : 0  [by my_fork.fork_test.vc.C2Els[7]._y:=1]
+	    520449 my_fork.fork_test.vc.C3Els[2]._y : 1  [by my_fork.fork_test.vc.tmp[23]:=0]
+	    520988 my_fork.fork_test._in_v : 0  [by my_fork.fork_test.vc.C3Els[2]._y:=1]
+	    521149 my_fork.fork_test.in_v_buf._y : 1  [by my_fork.fork_test._in_v:=0]
+	    521322 my_fork.in.v : 0  [by my_fork.fork_test.in_v_buf._y:=1]
+Finished

test/unit_tests/fork_15/test.act

@@ -0,0 +1,48 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/primitives.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+defproc fork_15 (avMx1of2<15> in; avMx1of2<15> out1; avMx1of2<15> out2){
+
+    fork<15> fork_test(.in=in, .out1=out1,.out2 = out2);
+    //Low active Reset 
+    bool _reset_B; 
+    prs {
+    	Reset => _reset_B-
+    }
+    fork_test.supply.vss = GND;
+    fork_test.supply.vdd = Vdd;
+    fork_test.reset_B = _reset_B;
+    
+}
+
+fork_15 my_fork;

test/unit_tests/fork_15/test.prsim

@@ -0,0 +1,35 @@
+watchall
+set-qdi-channel-neutral "my_fork.in" 15
+set my_fork.out1.a 0
+set my_fork.out1.v 0
+set my_fork.out2.a 0
+set my_fork.out2.v 0
+cycle
+system "echo 'System initialized'"
+
+set Reset 0
+cycle
+system "echo 'System reset completed'"
+status X
+mode run
+
+assert-qdi-channel-neutral "my_fork.out1" 15
+assert-qdi-channel-neutral "my_fork.out2" 15
+cycle
+system "echo 'Output neutral checked'"
+
+set-qdi-channel-valid "my_fork.in" 15 5
+cycle
+assert my_fork.in.v 1
+assert my_fork.in.a 0
+assert-qdi-channel-valid "my_fork.out1" 15 5
+assert-qdi-channel-valid "my_fork.out2" 15 5
+set my_fork.out1.v 1
+set my_fork.out2.v 1
+cycle
+assert my_fork.in.a 1
+set-qdi-channel-neutral "my_fork.in" 15
+cycle
+set my_fork.out1.a 1
+set my_fork.out1.a 1
+system "echo 'Finished'"

test/unit_tests/helper.scm

@@ -0,0 +1,238 @@
+(define % (lambda (x y)  (- x (* y (truncate (/ x y))))))
+
+(define dualrail-bit
+  (lambda (x i)
+    (let ((tmp 
+	   (string-append x
+			  (string-append ".d["
+					 (string-append (number->string i)  "]")
+					 )
+			  )
+	   ))
+      (list (string-append tmp ".f") (string-append tmp ".t"))
+      )
+    )
+  )
+
+(define assert-var-bit
+  (lambda (x i v)
+    (let ((tmp (dualrail-bit x i)))
+      (begin
+	(assert (car tmp) (- 1 v))
+	(assert (cadr tmp) v)
+	)
+      )
+    )
+  )
+
+(define assert-var-int
+  (lambda (x width value)
+    (letrec ((assert-one-bit
+	      (lambda (v i)
+		(cond
+		 ((=? i width) #t)
+		 (#t (begin
+		       (assert-var-bit x i (% v 2))
+		       (assert-one-bit (truncate (/ v 2)) (+ i 1))
+		       )
+		     )
+		 )
+		)
+	      ))
+      (assert-one-bit value 0)
+      )
+    )
+  )
+	     
+(define assert-qdi-channel-valid
+  (lambda (ch width value)
+    (assert-var-int (string-append ch ".d") width value)
+    )
+  )
+
+(define assert-qdi-channel-neutral
+  (lambda (ch width)
+    (letrec ((helper
+	      (lambda (i)
+		(cond
+		 ((=? i width) #t)
+		 (#t (let ((tmp (dualrail-bit (string-append ch ".d") i)))
+			(begin
+			  (assert (car tmp) 0)
+			  (assert (cadr tmp) 0)
+			  (helper (+ 1 i))
+			  )
+			)
+		     )
+		 )
+		)
+	      )
+	     )
+      (helper 0)
+      )
+    )
+  )
+
+			
+(define set-qdi-channel-neutral
+  (lambda (ch width)
+    (letrec ((ch-name (string-append ch ".d"))
+	     (helper
+	      (lambda (i)
+		(cond
+		 ((=? i width) #t)
+		 (#t (let ((tmp (dualrail-bit ch-name i)))
+		       (begin
+			 (set (car tmp) 0)
+			 (set (cadr tmp) 0)
+			 (helper (+ 1 i))
+			 )
+		       )
+		     )
+		 )
+		)
+	      ))
+      (helper 0)
+      )
+    )
+  )
+
+(define set-qdi-channel-valid
+  (lambda (ch width val)
+    (letrec ((ch-name (string-append ch ".d"))
+	     (helper
+	      (lambda (i v)
+		(cond
+		 ((=? i width) #t)
+		 (#t (let ((tmp (dualrail-bit ch-name i)))
+		       (begin
+			 (set (car tmp) (- 1 (% v 2)))
+			 (set (cadr tmp) (% v 2))
+			 (helper (+ 1 i) (truncate (/ v 2)))
+			 )
+		       )
+		     )
+		 )
+		)
+	      ))
+      (helper 0 val)
+      )
+    )
+  )
+
+(define assert-var-bool  (lambda (x v) (assert-var-int x 1 v)))
+
+
+(define set-bool-array
+  (lambda (ch width val)
+    (letrec ((ch)
+         (helper
+          (lambda (i v)
+            (cond
+              ((=? i width) #t)
+              (#t (let ((tmp (string-append ch (string-append "[" (string-append (number->string i)  "]")))))
+                (begin
+                  (set tmp (% v 2))
+                  (helper (+ 1 i) (truncate (/ v 2)))
+                )
+              ))
+            )
+         )
+        ))
+      (begin
+        (helper 0 val)
+      )
+    )
+  )
+)
+
+(define assert-data-bit
+  (lambda (x i v)
+    (let ((tmp (string-append x (string-append ".d[" (string-append (number->string i)  "]")))))
+        (assert tmp v)
+      )
+    )
+  )
+
+(define assert-data-int
+  (lambda (x width value)
+    (letrec ((assert-one-data-bit
+          (lambda (v i)
+        (cond
+         ((=? i width) #t)
+         (#t (begin
+               (assert-data-bit x i (% v 2))
+               (assert-one-data-bit (truncate (/ v 2)) (+ i 1))
+              )
+         )
+        )
+        )
+      ))
+      (assert-one-data-bit value 0)
+    )
+  )
+)
+
+(define assert-bd-channel-valid
+  (lambda (ch width value)
+    (begin
+      (assert-data-int ch width value)
+      (assert (string-append ch ".r") 1)
+    )
+  )
+)
+
+(define assert-bd-channel-neutral
+  (lambda (ch width)
+    (assert (string-append ch ".r") 0)
+    )
+  )
+
+  (define set-bd-channel-neutral
+  (lambda (ch width)
+    (letrec ((ch-name (string-append ch ".d"))
+         (helper
+          (lambda (i)
+            (cond
+              ((=? i width) #t)
+              (#t (let ((tmp (string-append ch (string-append ".d[" (string-append (number->string i) "]" )))))
+                    (begin
+                      (set tmp 0)
+                      (helper (+ 1 i))
+                    )
+                  )
+              )
+            )
+          )
+        ))
+        (begin 
+          (helper 0)
+          (set (string-append ch ".r") 0)
+        )
+    )
+  )
+)
+
+(define set-bd-channel-valid
+  (lambda (ch width val)
+    (letrec ((ch-name (string-append ch ".d"))
+         (helper
+          (lambda (i v)
+            (cond
+              ((=? i width) #t)
+              (#t (let ((tmp (string-append ch (string-append ".d[" (string-append (number->string i)  "]")))))
+                (begin
+                  (set tmp (% v 2))
+                  (helper (+ 1 i) (truncate (/ v 2)))
+                )
+              ))
+            )
+         )
+        ))
+      (begin
+        (helper 0 val)
+        (set (string-append ch ".r") 1)
+      )
+    )
+  )
+)