alexmadison
afe332e8ba
fifo reg fifo unit test working
2022-04-04 09:49:51 +02:00
alexmadison
fa5f83f061
register rw passed initial tests
2022-04-02 18:31:45 +02:00
alexmadison
eda9e2a98b
register write array unit tests working
2022-04-02 17:16:20 +02:00
alexmadison
e995a78efb
dunno what i changed buti it was probably good
2022-04-01 20:54:27 +02:00
alexmadison
87010c256b
buffer register unit tests init
2022-04-01 20:47:04 +02:00
alexmadison
0a957fc130
registerA_w unit test working
2022-04-01 20:46:45 +02:00
alexmadison
ab248d608e
init and unit tests for register buffer
2022-04-01 16:58:12 +02:00
alexmadison
e05196bb7e
hybrid decoder in fifo train working
2022-03-31 18:06:47 +02:00
alexmadison
c840273ae6
decoder 2d hybrid unit tests working
2022-03-31 18:00:08 +02:00
alexmadison
7b7cd4653e
nrn_hs fifo etc unit test working
2022-03-31 16:20:23 +02:00
alexmadison
cd5d41d7f8
synapse handshake unit tests working
2022-03-31 11:23:51 +02:00
M. Mastella
f468913472
flipflop updated
2022-03-30 16:03:01 +02:00
Greatorex
e09b4a0f7e
Merge branch 'dev' into HEAD
2022-03-30 15:09:59 +02:00
Greatorex
ba17fc0d1b
Auto stash before rebase of "origin/dev"
2022-03-30 15:03:55 +02:00
Greatorex
fbcd679b4c
pushing register
2022-03-30 15:01:50 +02:00
alexmadison
1707f1043a
renamed encoder inputs from x to inx
2022-03-30 10:14:29 +02:00
alexmadison
8b60b23214
omg its working
2022-03-29 18:35:58 +02:00
alexmadison
1a68a951e3
unit test for hs
2022-03-29 11:25:14 +02:00
alexmadison
746ee34107
append unit test with fifos
2022-03-25 18:57:35 +01:00
alexmadison
3587672e69
qdi2bd ready for rev
2022-03-25 17:15:03 +01:00
alexmadison
9d6e74268f
bd2qdi ole backseat reved
2022-03-25 15:43:46 +01:00
alexmadison
9ad12dc951
encoder2d revd mdsn
2022-03-22 16:29:30 +01:00
Greatorex
af2cedf54d
encoder8x8sim
2022-03-18 11:39:30 +01:00
Greatorex
d9cf4669ae
renamed encoder sim
2022-03-18 10:08:10 +01:00
Greatorex
29d43b0a20
Merge remote-tracking branch 'origin/dev' into dev
2022-03-18 10:06:55 +01:00
Greatorex
b9219f266f
Encoder Simmed
2022-03-18 10:06:43 +01:00
Michele
04d12338b7
continued register_rw
2022-03-15 08:16:59 +01:00
Michele
b8a74e1bb7
Auto stash before merge of "dev" and "origin/dev"
2022-03-14 20:43:07 +01:00
M. Mastella
edb0443c01
Added new version of Register_rw (still not properly working)
2022-03-14 17:15:27 +01:00
Michele
4dcd975554
register_rw continued
2022-03-09 20:02:41 +01:00
Michele
6f1a970cfd
register_rw (formerly register_rw_v2) compiles
2022-03-09 16:44:44 +01:00
M. Mastella
d2f643dc26
Merge remote-tracking branch 'origin/dev' into dev
2022-03-09 13:05:14 +01:00
M. Mastella
c8ac3cf37d
started register_v2 with reading and writing abilities
2022-03-09 13:05:08 +01:00
Greatorex
409fee54e8
Merge remote-tracking branch 'origin/dev' into dev
2022-03-08 18:49:07 +01:00
Greatorex
9a9c2f7da5
encoder sim still not working
2022-03-08 18:49:04 +01:00
M. Mastella
7439381c3c
Merge remote-tracking branch 'origin/dev' into dev
2022-03-08 11:36:29 +01:00
M. Mastella
7f5054e89b
arbiter_test redone without fifos
2022-03-08 11:36:25 +01:00
alexmadison
f91fa9b158
all times fix
2022-03-08 10:48:43 +01:00
alexmadison
2a4d8c8dee
added sig names on rhs, ty maxime
2022-03-08 10:24:42 +01:00
alexmadison
a78eec5777
demux_td reviewed and supplies added
2022-03-08 10:11:52 +01:00
M. Mastella
e49866323c
register_write works
2022-03-07 16:36:01 +01:00
Michele
ad318259a5
continued registers.c
2022-03-07 07:15:53 +01:00
Michele
932e967f3d
encoder in register works
2022-03-05 20:33:38 +01:00
Michele
cf66c0e665
added a vtree_5 test
2022-03-05 20:29:02 +01:00
Michele
aa67bd6168
register simulates correctly up to the fake clock generation
2022-03-05 20:28:50 +01:00
Michele
7fe31f0ed8
started testing the register_w (doesn't compile)
2022-03-04 21:17:30 +01:00
Michele
8dabc59a03
flipflop test updated
2022-03-04 21:12:52 +01:00
alexmadison
a53110dda4
renamed encoder to dualrail_encoder
2022-03-04 14:53:14 +01:00
alexmadison
2882bc0f24
encoder unit test
2022-03-04 14:32:02 +01:00
Michele
18cf090b45
Merge remote-tracking branch 'origin/dev' into dev
2022-03-04 13:11:44 +01:00