Commit Graph

454 Commits

Author SHA1 Message Date
alexmadison a0480b0369 removed texel_singlecore: is never used, and is a simplification of dualcore 2023-12-01 12:06:10 +01:00
alexmadison d0717fbea8 removed texel chip tests with write-only registers 2023-12-01 12:05:30 +01:00
alexmadison 1c4206b7d4 added note 2023-12-01 11:52:55 +01:00
alexmadison dbad8816a9 renamed decoder dly test to be include dly 2023-12-01 11:40:11 +01:00
alexmadison 9e7b1cd120 fixed std instaitate test by just copying the async instantiate test 2023-12-01 11:22:34 +01:00
alexmadison ca3a56572d got rid of flip flop reg tests 2023-12-01 11:05:31 +01:00
alexmadison 627caf1aed removed texel small, super old 2023-12-01 11:01:18 +01:00
alexmadison 7e2ae21098 removed texel slim registers, is literally same as texel glue but with less registers, test.prs targets regs that dont exist?? 2023-12-01 10:58:38 +01:00
alexmadison 8cc3c14f83 removed unused texel_in30 instantaitions 2023-12-01 10:55:32 +01:00
alexmadison e4fbc508af removed unused test and object 2023-11-21 16:17:58 +01:00
alexmadison 99b1d8caaf fixed test 2023-11-21 16:07:52 +01:00
alexmadison c336e37377 fixed unit tests 2023-11-21 15:59:00 +01:00
alexmadison bd56ac71e1 fixed register wr array tests 2023-11-21 15:55:15 +01:00
alexmadison e7158ca2a9 fixed unit test 2023-11-21 15:54:35 +01:00
alexmadison 51010a6095 removed tests of non-A-cell registers 2023-11-21 15:54:11 +01:00
alexmadison 5eb77108ab fixed test 2023-11-21 15:41:57 +01:00
alexmadison 96042d3bea fixed test 2023-11-21 14:49:07 +01:00
alexmadison 023da63c73 removed test because its a stupid component 2023-11-21 14:33:12 +01:00
alexmadison aa299fb45f fixed unit tests with new handshake blocks 2023-11-21 14:22:41 +01:00
alexmadison 9411dde4aa fixed test, changed to simple encoder 2023-11-21 13:35:36 +01:00
alexmadison c1e26267e2 fixed test by using encoder_simple 2023-11-21 13:28:38 +01:00
alexmadison 1aeb37f976 fixed test, bits were flipped 2023-11-21 12:24:15 +01:00
alexmadison a130ca59ea deleted fifo3 test because it doesnt actually use the fifo object 2023-11-21 12:17:04 +01:00
alexmadison 0a91459073 removed old decoder, only simple now, fixed 8x8 test, deleted other 2 2023-11-21 11:26:04 +01:00
alexmadison db39324593 fixed encoder2d tests, just changed labels, lowercase d 2023-11-21 10:19:21 +01:00
alexmadison 73acbcbc4f fixed demux_td_sign test and unfucked the sign flipping which shoudl have broken the other version tbh 2023-11-21 10:14:54 +01:00
alexmadison 8b37b91891 removed texel dualcore mapper, never used 2023-11-21 09:54:18 +01:00
alexmadison 200088fb0a removed mapper test, never tested irl 2023-11-21 09:52:18 +01:00
alexmadison e412faf459 fixed demux td 2 unit test and added note to prims 2023-11-21 09:46:56 +01:00
alexmadison 6eb91b72e0 fixed demux bit 7 test and added note to primitives 2023-11-21 09:35:28 +01:00
alexmadison 822cb58d2c fixed demux_7 test and added comment on demux 2023-11-21 09:25:53 +01:00
alexmadison 1d542e8a15 added todo about line end pullups 2023-11-17 13:18:58 +01:00
alexmadison 1c4160092d fixed decoder_2d_hybrid unit test 2023-11-17 13:18:17 +01:00
M. Mastella 25e0b4b1a2 fixing tests, started cleaning 2023-11-17 11:13:19 +01:00
alexmadison ff077c5169 regenned with cores having new names 2022-07-06 18:25:23 +02:00
alexmadison 1cd1b1d054 wiping split modules 2022-07-06 18:24:32 +02:00
alexmadison 72dab29f5c regennmed tdc no read to have the same number of reg bits as normal tdcg 2022-07-06 17:43:21 +02:00
alexmadison 502d35b000 added slice before registers, so register sizes can be reduced 2022-07-06 17:26:26 +02:00
alexmadison 27a0d34153 genned texel dualcore glue noread netlist clean 2022-07-06 16:04:34 +02:00
alexmadison b21b84e78d added some watches 2022-07-06 15:46:41 +02:00
alexmadison 194a7ad196 created version of tdc_g without register read functionality 2022-07-06 15:35:20 +02:00
alexmadison 2ddbeac978 generated a tdc_glue with only 8 registers 2022-07-06 14:06:19 +02:00
alexmadison 7896e0de24 added tests for dynapse sadc hs 2022-07-05 10:53:17 +02:00
alexmadison 8753540b33 removed inverted inputs from sadc encoder, regenned with proper reset sigs I hope 2022-07-01 17:26:55 +02:00
alexmadison a70c9a1b6d removed extra supply vss lines from tiehi/lows 2022-06-29 18:25:44 +02:00
alexmadison 9a7a34c02f please god let this be the last regen of the act. Tiehi/lo's have been given fake PRs 2022-06-29 16:24:00 +02:00
alexmadison 8e38a0fb01 put fake PRs in tiehi/los lol 2022-06-29 15:58:58 +02:00
alexmadison f488e5dc81 renamed to sadc_encoder 2022-06-29 13:36:14 +02:00
alexmadison 836e19a72d added sadc encoder with inputs low active for dynapse sadcs 2022-06-29 13:18:42 +02:00
alexmadison ba7ae68651 lmao forgot to remove top.vdd/vss 2022-06-28 18:20:57 +02:00