Commit Graph

454 Commits

Author SHA1 Message Date
alexmadison fce3eac4e6 bd fifo register unit test working... 2022-04-05 10:02:37 +02:00
alexmadison 531ccf30c2 first tests passed 2022-04-04 20:23:56 +02:00
alexmadison ab52498755 reset working 2022-04-04 19:32:30 +02:00
alexmadison c31248ef34 fixed bug in append and demux 2022-04-04 19:14:35 +02:00
alexmadison daa5e9ca22 adjusted demux msb 2022-04-04 17:51:49 +02:00
alexmadison 5fbd435ca2 XMerge branch 'madison_chip_dev' into dev 2022-04-04 17:49:45 +02:00
alexmadison c462be605d chip wip 2022-04-04 17:48:20 +02:00
Greatorex 0ade5522a2 merge of prims 2022-04-04 17:46:51 +02:00
alexmadison a229dd00cf before the git gets fucked 2022-04-04 17:35:34 +02:00
Greatorex 8f67c42bdb Merge branch 'main' into dev 2022-04-04 17:30:02 +02:00
Greatorex 185a4b2d77 Merge remote-tracking branch 'origin/main' into main 2022-04-04 17:27:34 +02:00
Greatorex a424b496e5 added more demuxs 2022-04-04 17:27:19 +02:00
alexmadison ea3f91d6de chips init 2022-04-04 17:14:08 +02:00
alexmadison 560ae9c5f0 added data slice primitive 2022-04-04 17:13:49 +02:00
Greatorex 31b3853558 added more demuxs 2022-04-04 17:10:05 +02:00
alexmadison 55ed8bb839 added buffered dr decoder 2022-04-04 15:37:31 +02:00
alexmadison 5e4a8ee15c dropper static with unit tests 2022-04-04 15:13:39 +02:00
alexmadison afe332e8ba fifo reg fifo unit test working 2022-04-04 09:49:51 +02:00
alexmadison fa5f83f061 register rw passed initial tests 2022-04-02 18:31:45 +02:00
alexmadison be3cc7a2d7 register rw compiling: 2022-04-02 18:09:09 +02:00
alexmadison b59a57c324 changed write bit selectors from ands to Cels, to avoid selector hazards 2022-04-02 17:37:56 +02:00
alexmadison eda9e2a98b register write array unit tests working 2022-04-02 17:16:20 +02:00
alexmadison e995a78efb dunno what i changed buti it was probably good 2022-04-01 20:54:27 +02:00
alexmadison 87010c256b buffer register unit tests init 2022-04-01 20:47:04 +02:00
alexmadison 0a957fc130 registerA_w unit test working 2022-04-01 20:46:45 +02:00
alexmadison b162cff991 added a comment to mux2 2022-04-01 20:46:03 +02:00
alexmadison 732526f0e3 added cells needed for register 2022-04-01 20:45:37 +02:00
alexmadison a7fc0d2cba write register array compiling 2022-04-01 20:45:04 +02:00
alexmadison 596a6f9c9f register A cell init, compiling not tested 2022-04-01 18:10:49 +02:00
alexmadison ab248d608e init and unit tests for register buffer 2022-04-01 16:58:12 +02:00
alexmadison df1aae7690 added S cells for register 2022-04-01 16:57:44 +02:00
alexmadison 82537e07de added pullup down as wrappers on teh A cells 2022-03-31 18:10:08 +02:00
alexmadison e05196bb7e hybrid decoder in fifo train working 2022-03-31 18:06:47 +02:00
alexmadison c840273ae6 decoder 2d hybrid unit tests working 2022-03-31 18:00:08 +02:00
alexmadison 2c491a6e37 replaced Pullup/downs with A cell naming scheme 2022-03-31 16:44:09 +02:00
alexmadison 6751e2807c comments 2022-03-31 16:23:01 +02:00
alexmadison 7b7cd4653e nrn_hs fifo etc unit test working 2022-03-31 16:20:23 +02:00
alexmadison 89b8dacd29 changed line pull downs to be isochronic as fuk 2022-03-31 16:19:20 +02:00
alexmadison 6ecee7f0c7 added comments 2022-03-31 15:24:51 +02:00
alexmadison f1ae79cd5a added buffering of dualrail decoder output lines to pull downs 2022-03-31 15:22:50 +02:00
alexmadison 6dfc941993 added Cel to buf out ack, so that ack can't be removed before the bufs output data is fully invalidated 2022-03-31 15:10:47 +02:00
alexmadison 1d5d4738a2 cleaned up coders a bit 2022-03-31 13:20:18 +02:00
alexmadison 2e4cdd5029 vastly improved lazy synapse handshakes 2022-03-31 12:44:00 +02:00
alexmadison cd5d41d7f8 synapse handshake unit tests working 2022-03-31 11:23:51 +02:00
alexmadison e779ee55b9 added delays to out req-ack buffers, seems to work 2022-03-30 19:53:27 +02:00
alexmadison a53bd58e29 added Ole dly4 as per hugh 2022-03-30 16:50:05 +02:00
M. Mastella 8c4f081090 Merge remote-tracking branch 'origin/dev' into dev 2022-03-30 16:03:07 +02:00
M. Mastella f468913472 flipflop updated 2022-03-30 16:03:01 +02:00
alexmadison 21c78e4461 fixed bug in delay fifo 2022-03-30 15:47:01 +02:00
alexmadison 4cbe8cb3d1 XMerge branch 'dev' of ssh://git.web.rug.nl:222/bics/actlib_dataflow_neuro into dev 2022-03-30 15:16:19 +02:00