 M. Mastella
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f468913472
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flipflop updated
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2022-03-30 16:03:01 +02:00 |
 Greatorex
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e09b4a0f7e
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Merge branch 'dev' into HEAD
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2022-03-30 15:09:59 +02:00 |
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Greatorex
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ba17fc0d1b
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Auto stash before rebase of "origin/dev"
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2022-03-30 15:03:55 +02:00 |
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Greatorex
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fbcd679b4c
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pushing register
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2022-03-30 15:01:50 +02:00 |
alexmadison
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1707f1043a
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renamed encoder inputs from x to inx
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2022-03-30 10:14:29 +02:00 |
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alexmadison
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8b60b23214
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omg its working
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2022-03-29 18:35:58 +02:00 |
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alexmadison
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1a68a951e3
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unit test for hs
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2022-03-29 11:25:14 +02:00 |
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alexmadison
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746ee34107
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append unit test with fifos
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2022-03-25 18:57:35 +01:00 |
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alexmadison
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3587672e69
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qdi2bd ready for rev
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2022-03-25 17:15:03 +01:00 |
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alexmadison
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9d6e74268f
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bd2qdi ole backseat reved
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2022-03-25 15:43:46 +01:00 |
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alexmadison
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9ad12dc951
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encoder2d revd mdsn
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2022-03-22 16:29:30 +01:00 |
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Greatorex
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af2cedf54d
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encoder8x8sim
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2022-03-18 11:39:30 +01:00 |
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Greatorex
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d9cf4669ae
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renamed encoder sim
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2022-03-18 10:08:10 +01:00 |
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Greatorex
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29d43b0a20
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-18 10:06:55 +01:00 |
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Greatorex
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b9219f266f
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Encoder Simmed
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2022-03-18 10:06:43 +01:00 |
Michele
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04d12338b7
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continued register_rw
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2022-03-15 08:16:59 +01:00 |
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Michele
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b8a74e1bb7
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Auto stash before merge of "dev" and "origin/dev"
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2022-03-14 20:43:07 +01:00 |
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M. Mastella
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edb0443c01
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Added new version of Register_rw (still not properly working)
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2022-03-14 17:15:27 +01:00 |
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Michele
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4dcd975554
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register_rw continued
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2022-03-09 20:02:41 +01:00 |
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Michele
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6f1a970cfd
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register_rw (formerly register_rw_v2) compiles
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2022-03-09 16:44:44 +01:00 |
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M. Mastella
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d2f643dc26
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-09 13:05:14 +01:00 |
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M. Mastella
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c8ac3cf37d
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started register_v2 with reading and writing abilities
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2022-03-09 13:05:08 +01:00 |
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Greatorex
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409fee54e8
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-08 18:49:07 +01:00 |
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Greatorex
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9a9c2f7da5
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encoder sim still not working
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2022-03-08 18:49:04 +01:00 |
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M. Mastella
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7439381c3c
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-08 11:36:29 +01:00 |
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M. Mastella
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7f5054e89b
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arbiter_test redone without fifos
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2022-03-08 11:36:25 +01:00 |
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alexmadison
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f91fa9b158
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all times fix
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2022-03-08 10:48:43 +01:00 |
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alexmadison
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2a4d8c8dee
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added sig names on rhs, ty maxime
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2022-03-08 10:24:42 +01:00 |
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alexmadison
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a78eec5777
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demux_td reviewed and supplies added
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2022-03-08 10:11:52 +01:00 |
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M. Mastella
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e49866323c
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register_write works
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2022-03-07 16:36:01 +01:00 |
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Michele
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ad318259a5
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continued registers.c
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2022-03-07 07:15:53 +01:00 |
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Michele
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932e967f3d
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encoder in register works
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2022-03-05 20:33:38 +01:00 |
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Michele
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cf66c0e665
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added a vtree_5 test
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2022-03-05 20:29:02 +01:00 |
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Michele
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aa67bd6168
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register simulates correctly up to the fake clock generation
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2022-03-05 20:28:50 +01:00 |
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Michele
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7fe31f0ed8
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started testing the register_w (doesn't compile)
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2022-03-04 21:17:30 +01:00 |
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Michele
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8dabc59a03
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flipflop test updated
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2022-03-04 21:12:52 +01:00 |
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alexmadison
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a53110dda4
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renamed encoder to dualrail_encoder
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2022-03-04 14:53:14 +01:00 |
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alexmadison
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2882bc0f24
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encoder unit test
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2022-03-04 14:32:02 +01:00 |
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Michele
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18cf090b45
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-04 13:11:44 +01:00 |
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Michele
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e8fa8e43a6
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Changed FF in std. Started test (spoiler: is not working)
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2022-03-04 13:11:34 +01:00 |
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Greatorex
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828fccfb38
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-04 12:34:00 +01:00 |
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Greatorex
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1abcc9dc55
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Added stuff for line end pull U/D
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2022-03-04 12:33:49 +01:00 |
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alexmadison
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382714d11e
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decoder dly with and grid unit test
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2022-03-03 17:10:55 +01:00 |
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Michele
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e53fc88054
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arbiter_tree works
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2022-03-03 12:39:10 +01:00 |
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Michele
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f5859040d8
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Arbiter tree test
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2022-03-03 12:11:20 +01:00 |
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alexmadison
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7f40b48b49
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arbtree init, using or2s for now
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2022-03-03 10:47:37 +01:00 |
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alexmadison
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9c27248e12
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decoder 2d dly init
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2022-03-02 15:55:26 +01:00 |
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Greatorex
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b15d8c11e9
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-01 17:56:39 +01:00 |
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Greatorex
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ba5e695be5
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finished and simmed demuxtd
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2022-03-01 17:56:30 +01:00 |
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Michele
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357df7f66e
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merge tested with concurrent inputs work
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2022-03-01 17:36:49 +01:00 |