alexmadison
|
21d6982763
|
removed synapses and neurons from top level outputs:
|
2022-06-17 12:10:25 +02:00 |
alexmadison
|
c790e73e69
|
regenned without name change stuff
|
2022-06-17 11:56:01 +02:00 |
alexmadison
|
bfffdb7e97
|
deleted heretical files
|
2022-06-16 18:45:35 +02:00 |
alexmadison
|
2cd1a4b91a
|
genned
|
2022-06-16 18:06:06 +02:00 |
alexmadison
|
3d0e36fbfb
|
genned verilog netlist
|
2022-06-16 17:48:13 +02:00 |
alexmadison
|
0cdc01c279
|
regenned texel dualcore glue with new registers and neuron req keep fix
|
2022-06-16 17:40:33 +02:00 |
alexmadison
|
75f79705c6
|
fixed bug in neuron handshake array where keeps were connected to post-buffered reqs rather than pre-buffered reqs...
|
2022-06-16 16:56:38 +02:00 |
alexmadison
|
97dacbfd08
|
commented out old registers
|
2022-06-15 18:08:33 +02:00 |
alexmadison
|
87577268e5
|
added improved registers
|
2022-06-15 17:58:34 +02:00 |
alexmadison
|
2ea83f3472
|
test merge of sram rw output working
|
2022-05-10 15:34:04 +02:00 |
alexmadison
|
016f634ac6
|
test of spike from sram workin
|
2022-05-10 15:22:19 +02:00 |
alexmadison
|
9ee41dc390
|
spikes out to sram working
|
2022-05-10 14:53:26 +02:00 |
alexmadison
|
7735cf8cba
|
made note of demux td to fixgit add ../dataflow_neuro/primitives.act
|
2022-05-10 14:53:00 +02:00 |
alexmadison
|
4c208bc18a
|
packets to sram rw working
|
2022-05-10 14:07:51 +02:00 |
alexmadison
|
9ceaa10eeb
|
minor change in demux_td
|
2022-05-09 19:29:37 +02:00 |
alexmadison
|
af2c6c665d
|
adding mapper io to chip wip
|
2022-05-09 19:29:18 +02:00 |
alexmadison
|
03851e19b7
|
mapper test init
|
2022-05-09 18:04:49 +02:00 |
alexmadison
|
1586adc0e1
|
started adding mapper
|
2022-05-09 18:04:17 +02:00 |
alexmadison
|
f3a9f2f44c
|
minor changes
|
2022-05-09 16:50:26 +02:00 |
alexmadison
|
0d7b82a0dd
|
altered amzo targettting tests to avoid instabilities
|
2022-05-09 16:48:58 +02:00 |
alexmadison
|
b1e24fa93c
|
added more monitoring tests
|
2022-05-08 19:05:52 +02:00 |
alexmadison
|
b994b60690
|
inverted TBUFs
|
2022-05-08 17:03:38 +02:00 |
alexmadison
|
6ed0c4bfed
|
beefed up prsim to include AMZIOs
|
2022-05-08 17:03:02 +02:00 |
alexmadison
|
04a7a108d5
|
added reset signals in and out
|
2022-05-06 14:17:15 +02:00 |
alexmadison
|
f4c6ce3112
|
minor indentation fix
|
2022-05-05 15:02:56 +02:00 |
alexmadison
|
71a2192427
|
texel dualcore with glue passed tests
|
2022-05-05 14:57:38 +02:00 |
alexmadison
|
7e895605da
|
dummy neuron block init
|
2022-05-05 14:56:59 +02:00 |
alexmadison
|
10f4821eaa
|
regenned texel dualcore innovus fairly finaly??
|
2022-05-02 19:45:34 +02:00 |
alexmadison
|
d3a1a27bb0
|
added buffering to EFO signals
|
2022-05-02 19:11:24 +02:00 |
alexmadison
|
de06893549
|
added reset sigs to neuron syn cores
|
2022-05-02 18:49:57 +02:00 |
alexmadison
|
f70b453ba7
|
Merge branch 'dev' of ssh://git.web.rug.nl:222/bics/actlib_dataflow_neuro into dev
|
2022-05-02 15:27:38 +02:00 |
alexmadison
|
cd445d1736
|
added inverters on every 4th synapse targetting line
|
2022-05-02 15:26:03 +02:00 |
Greatorex
|
64828422a0
|
Merge remote-tracking branch 'origin/dev' into dev
|
2022-05-02 15:12:42 +02:00 |
Greatorex
|
8d7933bf9c
|
wrapped tex_dual_inov
|
2022-05-02 15:12:21 +02:00 |
alexmadison
|
a114505a0b
|
fixed size of syn x channel
|
2022-04-25 13:15:53 +02:00 |
alexmadison
|
b25b403ed4
|
added keeps to output AMZO lines
|
2022-04-25 12:20:00 +02:00 |
alexmadison
|
28823c4bca
|
regened texel dualcore prs
|
2022-04-25 10:32:47 +02:00 |
alexmadison
|
e6f1a31f68
|
encoder1d with bd simmed
|
2022-04-21 16:09:13 +02:00 |
alexmadison
|
e3237e6115
|
set line pull down delays to zero, rero, regenned prs
|
2022-04-21 15:10:12 +02:00 |
alexmadison
|
82aae3d337
|
added bufx32
|
2022-04-21 14:56:57 +02:00 |
alexmadison
|
1e7133cafe
|
reverted hughs madness
|
2022-04-21 14:55:18 +02:00 |
alexmadison
|
3f7cbf2b87
|
Merge branch 'innovus_ready' into dev
|
2022-04-21 14:49:30 +02:00 |
alexmadison
|
28c821a757
|
Merge branch 'dev' of ssh://git.web.rug.nl:222/bics/actlib_dataflow_neuro into dev
|
2022-04-21 14:49:20 +02:00 |
alexmadison
|
ec03f8abe4
|
added reg reset sig
|
2022-04-21 14:33:41 +02:00 |
alexmadison
|
c91a7cad50
|
added separate reset sig for regs
|
2022-04-21 14:32:04 +02:00 |
alexmadison
|
75a42fff1b
|
texel prs for innovus generated
|
2022-04-21 14:31:35 +02:00 |
alexmadison
|
3443d46b9b
|
completely cut out the neuron and synapse hs from core
|
2022-04-21 14:07:15 +02:00 |
alexmadison
|
41f240726c
|
internal access added
|
2022-04-21 10:41:37 +02:00 |
alexmadison
|
c3b336267b
|
added nrn syn ports to dualcore
|
2022-04-21 10:35:43 +02:00 |
alexmadison
|
1a41c03aeb
|
more renaming
|
2022-04-21 10:23:58 +02:00 |