alexmadison
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73acbcbc4f
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fixed demux_td_sign test and unfucked the sign flipping which shoudl have broken the other version tbh
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2023-11-21 10:14:54 +01:00 |
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alexmadison
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200088fb0a
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removed mapper test, never tested irl
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2023-11-21 09:52:18 +01:00 |
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alexmadison
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e412faf459
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fixed demux td 2 unit test and added note to prims
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2023-11-21 09:46:56 +01:00 |
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alexmadison
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6eb91b72e0
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fixed demux bit 7 test and added note to primitives
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2023-11-21 09:35:28 +01:00 |
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alexmadison
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822cb58d2c
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fixed demux_7 test and added comment on demux
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2023-11-21 09:25:53 +01:00 |
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alexmadison
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1c4160092d
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fixed decoder_2d_hybrid unit test
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2023-11-17 13:18:17 +01:00 |
 M. Mastella
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25e0b4b1a2
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fixing tests, started cleaning
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2023-11-17 11:13:19 +01:00 |
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alexmadison
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ff077c5169
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regenned with cores having new names
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2022-07-06 18:25:23 +02:00 |
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alexmadison
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1cd1b1d054
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wiping split modules
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2022-07-06 18:24:32 +02:00 |
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alexmadison
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72dab29f5c
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regennmed tdc no read to have the same number of reg bits as normal tdcg
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2022-07-06 17:43:21 +02:00 |
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alexmadison
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502d35b000
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added slice before registers, so register sizes can be reduced
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2022-07-06 17:26:26 +02:00 |
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alexmadison
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27a0d34153
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genned texel dualcore glue noread netlist clean
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2022-07-06 16:04:34 +02:00 |
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alexmadison
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b21b84e78d
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added some watches
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2022-07-06 15:46:41 +02:00 |
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alexmadison
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194a7ad196
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created version of tdc_g without register read functionality
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2022-07-06 15:35:20 +02:00 |
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alexmadison
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2ddbeac978
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generated a tdc_glue with only 8 registers
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2022-07-06 14:06:19 +02:00 |
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alexmadison
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7896e0de24
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added tests for dynapse sadc hs
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2022-07-05 10:53:17 +02:00 |
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alexmadison
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8753540b33
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removed inverted inputs from sadc encoder, regenned with proper reset sigs I hope
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2022-07-01 17:26:55 +02:00 |
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alexmadison
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a70c9a1b6d
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removed extra supply vss lines from tiehi/lows
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2022-06-29 18:25:44 +02:00 |
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alexmadison
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9a7a34c02f
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please god let this be the last regen of the act. Tiehi/lo's have been given fake PRs
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2022-06-29 16:24:00 +02:00 |
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alexmadison
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f488e5dc81
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renamed to sadc_encoder
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2022-06-29 13:36:14 +02:00 |
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alexmadison
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836e19a72d
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added sadc encoder with inputs low active for dynapse sadcs
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2022-06-29 13:18:42 +02:00 |
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alexmadison
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ba7ae68651
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lmao forgot to remove top.vdd/vss
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2022-06-28 18:20:57 +02:00 |
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alexmadison
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cd978118b5
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dindo nuffin
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2022-06-28 18:04:40 +02:00 |
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alexmadison
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1a7c6121a0
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don't think i regenned netlist.v but just to be safe lol
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2022-06-28 14:46:43 +02:00 |
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alexmadison
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df3bb4022c
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regenned netlist with sigbufs fixed lol
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2022-06-27 15:57:02 +02:00 |
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alexmadison
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79c3d9ed98
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tdc glue small for testing
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2022-06-23 17:54:10 +02:00 |
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alexmadison
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6b0eff672c
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removed split modules folder from git
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2022-06-23 17:51:50 +02:00 |
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alexmadison
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4e01e252b8
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final final generation of tdc_glue i swear
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2022-06-23 17:51:16 +02:00 |
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alexmadison
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c972419199
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regenned with delays in encoder
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2022-06-21 14:00:04 +02:00 |
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alexmadison
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17d9d3da41
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regenned without pulldown delays
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2022-06-20 16:10:35 +02:00 |
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alexmadison
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6a7da77a92
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removed line pulldown delays oops
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2022-06-20 15:43:22 +02:00 |
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alexmadison
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ce4e6dc23c
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regenned modules with synapses and neurons removed from top level
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2022-06-17 12:29:45 +02:00 |
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alexmadison
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21d6982763
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removed synapses and neurons from top level outputs:
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2022-06-17 12:10:25 +02:00 |
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alexmadison
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c790e73e69
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regenned without name change stuff
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2022-06-17 11:56:01 +02:00 |
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alexmadison
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bfffdb7e97
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deleted heretical files
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2022-06-16 18:45:35 +02:00 |
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alexmadison
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2cd1a4b91a
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genned
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2022-06-16 18:06:06 +02:00 |
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alexmadison
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3d0e36fbfb
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genned verilog netlist
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2022-06-16 17:48:13 +02:00 |
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alexmadison
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0cdc01c279
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regenned texel dualcore glue with new registers and neuron req keep fix
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2022-06-16 17:40:33 +02:00 |
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alexmadison
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2ea83f3472
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test merge of sram rw output working
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2022-05-10 15:34:04 +02:00 |
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alexmadison
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016f634ac6
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test of spike from sram workin
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2022-05-10 15:22:19 +02:00 |
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alexmadison
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9ee41dc390
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spikes out to sram working
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2022-05-10 14:53:26 +02:00 |
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alexmadison
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4c208bc18a
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packets to sram rw working
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2022-05-10 14:07:51 +02:00 |
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alexmadison
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03851e19b7
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mapper test init
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2022-05-09 18:04:49 +02:00 |
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alexmadison
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0d7b82a0dd
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altered amzo targettting tests to avoid instabilities
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2022-05-09 16:48:58 +02:00 |
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alexmadison
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b1e24fa93c
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added more monitoring tests
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2022-05-08 19:05:52 +02:00 |
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alexmadison
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6ed0c4bfed
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beefed up prsim to include AMZIOs
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2022-05-08 17:03:02 +02:00 |
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alexmadison
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04a7a108d5
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added reset signals in and out
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2022-05-06 14:17:15 +02:00 |
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alexmadison
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71a2192427
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texel dualcore with glue passed tests
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2022-05-05 14:57:38 +02:00 |
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alexmadison
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10f4821eaa
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regenned texel dualcore innovus fairly finaly??
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2022-05-02 19:45:34 +02:00 |
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alexmadison
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de06893549
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added reset sigs to neuron syn cores
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2022-05-02 18:49:57 +02:00 |