bics/actlib_dataflow_neuro
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  • 422a90ad71 demux: cond.a has been now shorted to in.a M. Mastella 2022-03-08 12:12:45 +01:00
  • 7439381c3c Merge remote-tracking branch 'origin/dev' into dev M. Mastella 2022-03-08 11:36:29 +01:00
  • 7f5054e89b arbiter_test redone without fifos M. Mastella 2022-03-08 11:36:25 +01:00
  • f91fa9b158 all times fix alexmadison 2022-03-08 10:48:43 +01:00
  • 2a4d8c8dee added sig names on rhs, ty maxime alexmadison 2022-03-08 10:24:42 +01:00
  • a78eec5777 demux_td reviewed and supplies added alexmadison 2022-03-08 10:11:52 +01:00
  • 0d3502bf00 Merge remote-tracking branch 'origin/dev' into dev M. Mastella 2022-03-07 16:36:05 +01:00
  • e49866323c register_write works M. Mastella 2022-03-07 16:36:01 +01:00
  • c3f0059bfa encoder2d compiling alexmadison 2022-03-07 16:22:00 +01:00
  • a411231628 added some supplies alexmadison 2022-03-07 16:21:45 +01:00
  • ad318259a5 continued registers.c Michele 2022-03-07 07:15:53 +01:00
  • 932e967f3d encoder in register works Michele 2022-03-05 20:33:38 +01:00
  • cf66c0e665 added a vtree_5 test Michele 2022-03-05 20:29:02 +01:00
  • aa67bd6168 register simulates correctly up to the fake clock generation Michele 2022-03-05 20:28:50 +01:00
  • 78a8f72d25 register compiles Michele 2022-03-05 09:19:19 +01:00
  • a12b77edd5 Merge remote-tracking branch 'origin/dev' into dev Michele 2022-03-04 21:17:39 +01:00
  • 7fe31f0ed8 started testing the register_w (doesn't compile) Michele 2022-03-04 21:13:10 +01:00
  • b4d2d79f5f started testing the register_w Michele 2022-03-04 21:13:10 +01:00
  • 8dabc59a03 flipflop test updated Michele 2022-03-04 21:12:52 +01:00
  • c30a46d6d8 I think the encoder2D compiles now Michele 2022-03-04 21:11:34 +01:00
  • b5fa707c4e forgot proc in defproc Michele 2022-03-04 19:04:11 +01:00
  • 72ec59cbcf added flip flop from XFAB Michele 2022-03-04 19:02:34 +01:00
  • 250f5bcc58 Added A_2C2P_RB_X1 because the encoder needs it Michele 2022-03-04 19:02:12 +01:00
  • 9b3bdc3f6c rejigged A cell in encoder2d alexmadison 2022-03-04 15:09:49 +01:00
  • a53110dda4 renamed encoder to dualrail_encoder alexmadison 2022-03-04 14:53:14 +01:00
  • 2882bc0f24 encoder unit test alexmadison 2022-03-04 14:32:02 +01:00
  • 4a4c4eeb14 merged encoder alexmadison 2022-03-04 14:27:38 +01:00
  • f55322bc7c encoder init alexmadison 2022-03-04 14:10:15 +01:00
  • 18cf090b45 Merge remote-tracking branch 'origin/dev' into dev Michele 2022-03-04 13:11:44 +01:00
  • e8fa8e43a6 Changed FF in std. Started test (spoiler: is not working) Michele 2022-03-04 13:11:34 +01:00
  • 828fccfb38 Merge remote-tracking branch 'origin/dev' into dev Greatorex 2022-03-04 12:34:00 +01:00
  • 1abcc9dc55 Added stuff for line end pull U/D Greatorex 2022-03-04 12:33:49 +01:00
  • 9c6a591dc7 started registers Michele 2022-03-04 11:44:00 +01:00
  • b6c70f7f5e fixed vdd and vss in encoder sigbuf Michele 2022-03-04 11:43:49 +01:00
  • 397c832b7b Added Flip Flop to std.act (still need to try it) Michele 2022-03-04 11:43:33 +01:00
  • 15d3fd1b9b Added sigbuf_1output for signals that cannot have array outputs Michele 2022-03-03 19:23:13 +01:00
  • a4889ae844 fixed conflict with Madison commit Michele 2022-03-03 17:54:29 +01:00
  • d64afd8c50 Merge remote-tracking branch 'origin/dev' into dev Michele 2022-03-03 17:53:40 +01:00
  • ba096bf6b2 wired up most of the stuff in encoder (missing dual rail tree) Michele 2022-03-03 17:52:42 +01:00
  • 382714d11e decoder dly with and grid unit test alexmadison 2022-03-03 17:10:55 +01:00
  • c8412606b3 merged alexmadison 2022-03-03 17:10:16 +01:00
  • 893f71db92 AND grid init alexmadison 2022-03-03 17:09:00 +01:00
  • da5948f493 added N=1 cases alexmadison 2022-03-03 17:05:56 +01:00
  • 0e9f2ae506 started encoder on the coders.act Michele 2022-03-03 15:10:31 +01:00
  • e53fc88054 arbiter_tree works Michele 2022-03-03 12:39:10 +01:00
  • f7cd7006d0 removed arbiter_tree from primitives because is already in coders Michele 2022-03-03 12:15:17 +01:00
  • 24a6260862 Merged encoder_wip into dev Michele 2022-03-03 12:13:14 +01:00
  • f5859040d8 Arbiter tree test Michele 2022-03-03 12:00:49 +01:00
  • 3e1b63c201 continued handshaking tree, not finished Michele 2022-03-02 18:38:17 +01:00
  • b49b9d98c3 started arbiter tree Michele 2022-03-02 08:22:56 +01:00
  • 6fc3e4b99c removed arbiter tree alexmadison 2022-03-03 11:56:59 +01:00
  • af52c688a3 arbiter tree with arbiters, not tested alexmadison 2022-03-03 11:56:34 +01:00
  • d0a2fff096 arbiter init with or2s alexmadison 2022-03-03 10:52:29 +01:00
  • 7f40b48b49 arbtree init, using or2s for now alexmadison 2022-03-03 10:47:37 +01:00
  • 97732b2f72 continued handshaking tree, not finished encoder_wip Michele 2022-03-02 18:38:17 +01:00
  • 9c27248e12 decoder 2d dly init alexmadison 2022-03-02 15:55:26 +01:00
  • 3bba9fefa4 made buf with dly sorry alexmadison 2022-03-02 15:48:54 +01:00
  • 31d2f35042 i am a moron re dly cells alexmadison 2022-03-02 15:47:36 +01:00
  • c61a570f80 fixed wiring bug in prog delay alexmadison 2022-03-02 15:11:22 +01:00
  • 6bece2f459 renamed gates in or tree alexmadison 2022-03-02 13:51:12 +01:00
  • 659cd2479c oops accidentally hit all trees alexmadison 2022-03-02 13:50:04 +01:00
  • c5e582ff3e renamed vars in atree alexmadison 2022-03-02 13:48:57 +01:00
  • e52ec9ed61 renamed var in vtree for consciences alexmadison 2022-03-02 11:51:45 +01:00
  • c580d21efe fixed supply in fifo_t alexmadison 2022-03-02 11:24:28 +01:00
  • 1b7e39bc00 coders.act file init alexmadison 2022-03-02 09:48:41 +01:00
  • 8060051da0 Merge branch 'dev' of ssh://git.web.rug.nl:222/bics/actlib_dataflow_neuro into dev alexmadison 2022-03-02 09:48:11 +01:00
  • b456ea40fd changed delayprog to outin vs ya naming scheme alexmadison 2022-03-02 09:48:05 +01:00
  • 9e144e1c17 started arbiter tree Michele 2022-03-02 08:22:56 +01:00
  • 9f5bbc487d some more supplies added, need still to run all the codes Michele 2022-03-01 19:02:10 +01:00
  • c99ed439a6 added supply also to sigbuf in fifo Michele 2022-03-01 18:57:06 +01:00
  • d507deba84 Merge remote-tracking branch 'origin/dev' into dev Michele 2022-03-01 18:51:10 +01:00
  • 3d273b164d added power supply to sigbuf in fifo_t Michele 2022-03-01 18:51:06 +01:00
  • b15d8c11e9 Merge remote-tracking branch 'origin/dev' into dev Greatorex 2022-03-01 17:56:39 +01:00
  • ba5e695be5 finished and simmed demuxtd Greatorex 2022-03-01 17:56:30 +01:00
  • 357df7f66e merge tested with concurrent inputs work Michele 2022-03-01 17:36:49 +01:00
  • 018b308f61 Merge remote-tracking branch 'origin/dev' into dev Michele 2022-03-01 17:14:15 +01:00
  • 97784db492 merge with simple test is working Michele 2022-03-01 17:14:10 +01:00
  • 79a96ed511 added DLY4 cell alexmadison 2022-03-01 15:28:22 +01:00
  • 233c9a7d10 cleaned up minor alexmadison 2022-03-01 15:27:27 +01:00
  • 00869fc16e programmable delay tested alexmadison 2022-03-01 15:26:43 +01:00
  • 8268379572 bug to prev bug alexmadison 2022-03-01 14:00:47 +01:00
  • 18f84bc652 Merge branch 'dev' of ssh://git.web.rug.nl:222/bics/actlib_dataflow_neuro into dev alexmadison 2022-03-01 13:55:47 +01:00
  • 05f46ccf33 added try except for assert printing alexmadison 2022-03-01 13:55:45 +01:00
  • 0a8496d4f7 Merge remote-tracking branch 'origin/dev' into dev Michele 2022-03-01 13:26:32 +01:00
  • 340a20e49e Added merge, syntax clean but violating dual rail Michele 2022-03-01 13:26:29 +01:00
  • fc4ccea3c0 added and tree alexmadison 2022-03-01 12:22:36 +01:00
  • c947b28b03 added yours truely to the authors alexmadison 2022-03-01 10:18:32 +01:00
  • aeed4e5527 changed c->v tree in buf_s alexmadison 2022-03-01 10:15:23 +01:00
  • a8b1710f65 merged buf_s into primitives alexmadison 2022-03-01 10:09:08 +01:00
  • 66cbbe3da7 unit tests working alexmadison 2022-03-01 09:58:20 +01:00
  • 8b40e70058 differentiated between ctree and vtree, all primitives updated Michele 2022-03-01 09:44:51 +01:00
  • 92b0b36325 pushed merge in primitives.act Michele 2022-02-28 18:58:32 +01:00
  • 1bb1d0be40 Merge remote-tracking branch 'origin/dev' into dev Michele 2022-02-28 18:55:00 +01:00
  • 2678dfc1e1 merge wrote, still need to test it Michele 2022-02-28 18:54:52 +01:00
  • 84b2831d89 buf_s_5 unit tests alexmadison 2022-02-28 18:27:22 +01:00
  • 3fc4b1fb1a buf_s_tempalte init alexmadison 2022-02-28 18:27:03 +01:00
  • 5bae88d56f added flag to plot all times alexmadison 2022-02-28 17:56:12 +01:00
  • 225d481ae1 fifo t 5 unit tests checked alexmadison 2022-02-28 15:52:20 +01:00
  • 94109bb157 plotting in ex bugs alexmadison 2022-02-28 15:44:24 +01:00
  • e21e132d8b Merge branch 'dev' of ssh://git.web.rug.nl:222/bics/actlib_dataflow_neuro into dev alexmadison 2022-02-28 13:57:32 +01:00