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TexelTapeout

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• 1d87a86ba6 texel 30 unit tests working alexmadison 2022-04-08 14:54:00 +02:00
• e27d55bff4 fixed stupid typo in d_dr_en alexmadison 2022-04-08 14:02:55 +02:00
• fa2b6f6850 added dualrail decoder with enable alexmadison 2022-04-08 14:01:41 +02:00
• 7ebd734eee renamed chip nomap to texel_small alexmadison 2022-04-08 12:14:50 +02:00
• ec091708a8 changed cells to lowercase alexmadison 2022-04-08 12:13:43 +02:00
• 66fdedfb28 gutted KEEPs, readded to coders alexmadison 2022-04-08 11:53:49 +02:00
• 74c5b8703f added second delaycfg to bd2qdi alexmadison 2022-04-05 19:17:54 +02:00
• 41d76de718 chip unit tests passing baybeeeeee alexmadison 2022-04-05 18:21:36 +02:00
• 3697d21698 flipped condition bit on demux alexmadison 2022-04-05 17:16:10 +02:00
• 94b4ad2570 fixed hazard caused by buffer delay in bd2qdi alexmadison 2022-04-05 10:54:25 +02:00
• fce3eac4e6 bd fifo register unit test working... alexmadison 2022-04-05 10:02:37 +02:00
• 531ccf30c2 first tests passed alexmadison 2022-04-04 20:23:56 +02:00
• ab52498755 reset working alexmadison 2022-04-04 19:32:30 +02:00
• c31248ef34 fixed bug in append and demux alexmadison 2022-04-04 19:14:35 +02:00
• daa5e9ca22 adjusted demux msb alexmadison 2022-04-04 17:51:49 +02:00
• 5fbd435ca2 XMerge branch 'madison_chip_dev' into dev alexmadison 2022-04-04 17:49:45 +02:00
• c462be605d chip wip alexmadison 2022-04-04 17:48:20 +02:00
• 0ade5522a2 merge of prims Greatorex 2022-04-04 17:46:51 +02:00
• a229dd00cf before the git gets fucked alexmadison 2022-04-04 17:35:34 +02:00
• 8f67c42bdb Merge branch 'main' into dev Greatorex 2022-04-04 17:30:02 +02:00
• 185a4b2d77 Merge remote-tracking branch 'origin/main' into main Greatorex 2022-04-04 17:27:34 +02:00
• a424b496e5 added more demuxs Greatorex 2022-04-04 17:10:05 +02:00
• ea3f91d6de chips init alexmadison 2022-04-04 17:14:08 +02:00
• 560ae9c5f0 added data slice primitive alexmadison 2022-04-04 17:13:49 +02:00
• 31b3853558 added more demuxs Greatorex 2022-04-04 17:10:05 +02:00
• 55ed8bb839 added buffered dr decoder alexmadison 2022-04-04 15:37:31 +02:00
• 5e4a8ee15c dropper static with unit tests alexmadison 2022-04-04 15:13:39 +02:00
• afe332e8ba fifo reg fifo unit test working alexmadison 2022-04-04 09:49:51 +02:00
• fa5f83f061 register rw passed initial tests alexmadison 2022-04-02 18:31:45 +02:00
• be3cc7a2d7 register rw compiling: alexmadison 2022-04-02 18:09:09 +02:00
• b59a57c324 changed write bit selectors from ands to Cels, to avoid selector hazards alexmadison 2022-04-02 17:37:56 +02:00
• eda9e2a98b register write array unit tests working alexmadison 2022-04-02 17:16:20 +02:00
• e995a78efb dunno what i changed buti it was probably good alexmadison 2022-04-01 20:54:27 +02:00
• 87010c256b buffer register unit tests init alexmadison 2022-04-01 20:47:04 +02:00
• 0a957fc130 registerA_w unit test working alexmadison 2022-04-01 20:46:45 +02:00
• b162cff991 added a comment to mux2 alexmadison 2022-04-01 20:46:03 +02:00
• 732526f0e3 added cells needed for register alexmadison 2022-04-01 20:45:37 +02:00
• a7fc0d2cba write register array compiling alexmadison 2022-04-01 20:45:04 +02:00
• 596a6f9c9f register A cell init, compiling not tested alexmadison 2022-04-01 18:10:49 +02:00
• ab248d608e init and unit tests for register buffer alexmadison 2022-04-01 16:58:12 +02:00
• df1aae7690 added S cells for register alexmadison 2022-04-01 16:57:44 +02:00
• 82537e07de added pullup down as wrappers on teh A cells alexmadison 2022-03-31 18:10:08 +02:00
• e05196bb7e hybrid decoder in fifo train working alexmadison 2022-03-31 18:06:47 +02:00
• c840273ae6 decoder 2d hybrid unit tests working alexmadison 2022-03-31 18:00:08 +02:00
• 2c491a6e37 replaced Pullup/downs with A cell naming scheme alexmadison 2022-03-31 16:44:09 +02:00
• 6751e2807c comments alexmadison 2022-03-31 16:23:01 +02:00
• 7b7cd4653e nrn_hs fifo etc unit test working alexmadison 2022-03-31 16:20:23 +02:00
• 89b8dacd29 changed line pull downs to be isochronic as fuk alexmadison 2022-03-31 16:19:20 +02:00
• 6ecee7f0c7 added comments alexmadison 2022-03-31 15:24:51 +02:00
• f1ae79cd5a added buffering of dualrail decoder output lines to pull downs alexmadison 2022-03-31 15:22:50 +02:00
• 6dfc941993 added Cel to buf out ack, so that ack can't be removed before the bufs output data is fully invalidated alexmadison 2022-03-31 15:10:47 +02:00
• 1d5d4738a2 cleaned up coders a bit alexmadison 2022-03-31 13:20:18 +02:00
• 2e4cdd5029 vastly improved lazy synapse handshakes alexmadison 2022-03-31 12:44:00 +02:00
• cd5d41d7f8 synapse handshake unit tests working alexmadison 2022-03-31 11:23:51 +02:00
• e779ee55b9 added delays to out req-ack buffers, seems to work alexmadison 2022-03-30 19:53:27 +02:00
• a53bd58e29 added Ole dly4 as per hugh alexmadison 2022-03-30 16:50:05 +02:00
• 8c4f081090 Merge remote-tracking branch 'origin/dev' into dev M. Mastella 2022-03-30 16:03:07 +02:00
• f468913472 flipflop updated M. Mastella 2022-03-30 16:03:01 +02:00
• 21c78e4461 fixed bug in delay fifo alexmadison 2022-03-30 15:47:01 +02:00
• 4cbe8cb3d1 XMerge branch 'dev' of ssh://git.web.rug.nl:222/bics/actlib_dataflow_neuro into dev alexmadison 2022-03-30 15:16:19 +02:00
• f9cdb2e914 added pulldown2 alexmadison 2022-03-30 15:16:15 +02:00
• 44f0cd871d Merge branch 'HEAD' into dev Greatorex 2022-03-30 15:10:25 +02:00
• e09b4a0f7e Merge branch 'dev' into HEAD Greatorex 2022-03-30 15:09:59 +02:00
• 7db428b827 register added again Greatorex 2022-03-30 15:04:35 +02:00
• ba17fc0d1b Auto stash before rebase of "origin/dev" Greatorex 2022-03-30 15:03:55 +02:00
• fbcd679b4c pushing register Greatorex 2022-03-30 15:01:50 +02:00
• 87f552b1d0 decoder hs wip alexmadison 2022-03-30 14:06:14 +02:00
• cff6eba344 decoder_2d_hs init alexmadison 2022-03-30 13:18:07 +02:00
• d10d78347c refactored decoder into decoder dualrail alexmadison 2022-03-30 11:01:21 +02:00
• 1707f1043a renamed encoder inputs from x to inx alexmadison 2022-03-30 10:14:29 +02:00
• 870da14ccd let delay fifos have N= 0, simplified nrn grids thusly alexmadison 2022-03-29 19:07:04 +02:00
• 8b60b23214 omg its working alexmadison 2022-03-29 18:35:58 +02:00
• 5e4e905960 fixed minor bug in encoder, renamed nrn_hs alexmadison 2022-03-29 15:42:54 +02:00
• 921145c450 added buffering on out alexmadison 2022-03-29 14:57:20 +02:00
• 1a68a951e3 unit test for hs alexmadison 2022-03-29 11:25:14 +02:00
• 28ea85b9ed reverted nrn handshake to 2c1n alexmadison 2022-03-29 11:24:42 +02:00
• 8528ee12cd added cells needed for neuron grid alexmadison 2022-03-28 19:51:50 +02:00
• d395778a4a neuron 2d handshake fixes alexmadison 2022-03-28 19:51:03 +02:00
• fb127d55f5 neuron handshake compiling, now testing alexmadison 2022-03-28 16:23:12 +02:00
• 8cb6eddd37 removed line pull up downs, moved to coders alexmadison 2022-03-28 16:22:51 +02:00
• 746ee34107 append unit test with fifos alexmadison 2022-03-25 18:57:35 +01:00
• 8b44a11fd6 added append, fixed bug in fifo alexmadison 2022-03-25 18:57:18 +01:00
• 3587672e69 qdi2bd ready for rev alexmadison 2022-03-25 17:15:03 +01:00
• 9d6e74268f bd2qdi ole backseat reved alexmadison 2022-03-25 15:43:46 +01:00
• a42254a57b minor bug fix encoder2d alexmadison 2022-03-22 16:30:58 +01:00
• 9ad12dc951 encoder2d revd mdsn alexmadison 2022-03-22 16:29:30 +01:00
• af2cedf54d encoder8x8sim Greatorex 2022-03-18 11:39:30 +01:00
• d9cf4669ae renamed encoder sim Greatorex 2022-03-18 10:08:10 +01:00
• 29d43b0a20 Merge remote-tracking branch 'origin/dev' into dev Greatorex 2022-03-18 10:06:55 +01:00
• b9219f266f Encoder Simmed Greatorex 2022-03-18 10:06:43 +01:00
• 04d12338b7 continued register_rw Michele 2022-03-15 08:16:59 +01:00
• b8a74e1bb7 Auto stash before merge of "dev" and "origin/dev" Michele 2022-03-14 20:43:07 +01:00
• edb0443c01 Added new version of Register_rw (still not properly working) M. Mastella 2022-03-14 17:15:27 +01:00
• cc2234a1b1 moved the ack of the register Michele 2022-03-09 20:18:20 +01:00
• 4dcd975554 register_rw continued Michele 2022-03-09 20:02:41 +01:00
• 6f1a970cfd register_rw (formerly register_rw_v2) compiles Michele 2022-03-09 16:44:44 +01:00
• d2f643dc26 Merge remote-tracking branch 'origin/dev' into dev M. Mastella 2022-03-09 13:05:14 +01:00
• c8ac3cf37d started register_v2 with reading and writing abilities M. Mastella 2022-03-09 13:05:08 +01:00
• 409fee54e8 Merge remote-tracking branch 'origin/dev' into dev Greatorex 2022-03-08 18:49:07 +01:00
• 9a9c2f7da5 encoder sim still not working Greatorex 2022-03-08 18:49:04 +01:00