Commit Graph

188 Commits

Author SHA1 Message Date
alexmadison 19564a5a91 added catch for low n syn mon 2022-04-10 15:19:11 +02:00
alexmadison 6eb6766bef texel small prs 2022-04-10 15:17:38 +02:00
alexmadison feb28f27bf added set bd channel without setting r 2022-04-10 13:59:27 +02:00
alexmadison c81e77a2fa texel30 with manual neurons passing tests 2022-04-08 18:36:58 +02:00
alexmadison cc2487be1c added monitor decoders 2022-04-08 17:55:12 +02:00
alexmadison 1d87a86ba6 texel 30 unit tests working 2022-04-08 14:54:00 +02:00
alexmadison 7ebd734eee renamed chip nomap to texel_small 2022-04-08 12:14:50 +02:00
alexmadison 74c5b8703f added second delaycfg to bd2qdi 2022-04-05 19:17:54 +02:00
alexmadison 41d76de718 chip unit tests passing baybeeeeee 2022-04-05 18:21:36 +02:00
alexmadison fce3eac4e6 bd fifo register unit test working... 2022-04-05 10:02:37 +02:00
alexmadison 531ccf30c2 first tests passed 2022-04-04 20:23:56 +02:00
alexmadison ab52498755 reset working 2022-04-04 19:32:30 +02:00
alexmadison 5fbd435ca2 XMerge branch 'madison_chip_dev' into dev 2022-04-04 17:49:45 +02:00
alexmadison a229dd00cf before the git gets fucked 2022-04-04 17:35:34 +02:00
Greatorex a424b496e5 added more demuxs 2022-04-04 17:27:19 +02:00
alexmadison 5e4a8ee15c dropper static with unit tests 2022-04-04 15:13:39 +02:00
alexmadison afe332e8ba fifo reg fifo unit test working 2022-04-04 09:49:51 +02:00
alexmadison fa5f83f061 register rw passed initial tests 2022-04-02 18:31:45 +02:00
alexmadison eda9e2a98b register write array unit tests working 2022-04-02 17:16:20 +02:00
alexmadison e995a78efb dunno what i changed buti it was probably good 2022-04-01 20:54:27 +02:00
alexmadison 87010c256b buffer register unit tests init 2022-04-01 20:47:04 +02:00
alexmadison 0a957fc130 registerA_w unit test working 2022-04-01 20:46:45 +02:00
alexmadison ab248d608e init and unit tests for register buffer 2022-04-01 16:58:12 +02:00
alexmadison e05196bb7e hybrid decoder in fifo train working 2022-03-31 18:06:47 +02:00
alexmadison c840273ae6 decoder 2d hybrid unit tests working 2022-03-31 18:00:08 +02:00
alexmadison 7b7cd4653e nrn_hs fifo etc unit test working 2022-03-31 16:20:23 +02:00
alexmadison cd5d41d7f8 synapse handshake unit tests working 2022-03-31 11:23:51 +02:00
M. Mastella f468913472 flipflop updated 2022-03-30 16:03:01 +02:00
Greatorex e09b4a0f7e Merge branch 'dev' into HEAD 2022-03-30 15:09:59 +02:00
Greatorex ba17fc0d1b Auto stash before rebase of "origin/dev" 2022-03-30 15:03:55 +02:00
Greatorex fbcd679b4c pushing register 2022-03-30 15:01:50 +02:00
alexmadison 1707f1043a renamed encoder inputs from x to inx 2022-03-30 10:14:29 +02:00
alexmadison 8b60b23214 omg its working 2022-03-29 18:35:58 +02:00
alexmadison 1a68a951e3 unit test for hs 2022-03-29 11:25:14 +02:00
alexmadison 746ee34107 append unit test with fifos 2022-03-25 18:57:35 +01:00
alexmadison 3587672e69 qdi2bd ready for rev 2022-03-25 17:15:03 +01:00
alexmadison 9d6e74268f bd2qdi ole backseat reved 2022-03-25 15:43:46 +01:00
alexmadison 9ad12dc951 encoder2d revd mdsn 2022-03-22 16:29:30 +01:00
Greatorex af2cedf54d encoder8x8sim 2022-03-18 11:39:30 +01:00
Greatorex d9cf4669ae renamed encoder sim 2022-03-18 10:08:10 +01:00
Greatorex 29d43b0a20 Merge remote-tracking branch 'origin/dev' into dev 2022-03-18 10:06:55 +01:00
Greatorex b9219f266f Encoder Simmed 2022-03-18 10:06:43 +01:00
Michele 04d12338b7 continued register_rw 2022-03-15 08:16:59 +01:00
Michele b8a74e1bb7 Auto stash before merge of "dev" and "origin/dev" 2022-03-14 20:43:07 +01:00
M. Mastella edb0443c01 Added new version of Register_rw (still not properly working) 2022-03-14 17:15:27 +01:00
Michele 4dcd975554 register_rw continued 2022-03-09 20:02:41 +01:00
Michele 6f1a970cfd register_rw (formerly register_rw_v2) compiles 2022-03-09 16:44:44 +01:00
M. Mastella d2f643dc26 Merge remote-tracking branch 'origin/dev' into dev 2022-03-09 13:05:14 +01:00
M. Mastella c8ac3cf37d started register_v2 with reading and writing abilities 2022-03-09 13:05:08 +01:00
Greatorex 409fee54e8 Merge remote-tracking branch 'origin/dev' into dev 2022-03-08 18:49:07 +01:00
Greatorex 9a9c2f7da5 encoder sim still not working 2022-03-08 18:49:04 +01:00
M. Mastella 7439381c3c Merge remote-tracking branch 'origin/dev' into dev 2022-03-08 11:36:29 +01:00
M. Mastella 7f5054e89b arbiter_test redone without fifos 2022-03-08 11:36:25 +01:00
alexmadison f91fa9b158 all times fix 2022-03-08 10:48:43 +01:00
alexmadison 2a4d8c8dee added sig names on rhs, ty maxime 2022-03-08 10:24:42 +01:00
alexmadison a78eec5777 demux_td reviewed and supplies added 2022-03-08 10:11:52 +01:00
M. Mastella e49866323c register_write works 2022-03-07 16:36:01 +01:00
Michele ad318259a5 continued registers.c 2022-03-07 07:15:53 +01:00
Michele 932e967f3d encoder in register works 2022-03-05 20:33:38 +01:00
Michele cf66c0e665 added a vtree_5 test 2022-03-05 20:29:02 +01:00
Michele aa67bd6168 register simulates correctly up to the fake clock generation 2022-03-05 20:28:50 +01:00
Michele 7fe31f0ed8 started testing the register_w (doesn't compile) 2022-03-04 21:17:30 +01:00
Michele 8dabc59a03 flipflop test updated 2022-03-04 21:12:52 +01:00
alexmadison a53110dda4 renamed encoder to dualrail_encoder 2022-03-04 14:53:14 +01:00
alexmadison 2882bc0f24 encoder unit test 2022-03-04 14:32:02 +01:00
Michele 18cf090b45 Merge remote-tracking branch 'origin/dev' into dev 2022-03-04 13:11:44 +01:00
Michele e8fa8e43a6 Changed FF in std. Started test (spoiler: is not working) 2022-03-04 13:11:34 +01:00
Greatorex 828fccfb38 Merge remote-tracking branch 'origin/dev' into dev 2022-03-04 12:34:00 +01:00
Greatorex 1abcc9dc55 Added stuff for line end pull U/D 2022-03-04 12:33:49 +01:00
alexmadison 382714d11e decoder dly with and grid unit test 2022-03-03 17:10:55 +01:00
Michele e53fc88054 arbiter_tree works 2022-03-03 12:39:10 +01:00
Michele f5859040d8 Arbiter tree test 2022-03-03 12:11:20 +01:00
alexmadison 7f40b48b49 arbtree init, using or2s for now 2022-03-03 10:47:37 +01:00
alexmadison 9c27248e12 decoder 2d dly init 2022-03-02 15:55:26 +01:00
Greatorex b15d8c11e9 Merge remote-tracking branch 'origin/dev' into dev 2022-03-01 17:56:39 +01:00
Greatorex ba5e695be5 finished and simmed demuxtd 2022-03-01 17:56:30 +01:00
Michele 357df7f66e merge tested with concurrent inputs work 2022-03-01 17:36:49 +01:00
Michele 018b308f61 Merge remote-tracking branch 'origin/dev' into dev 2022-03-01 17:14:15 +01:00
Michele 97784db492 merge with simple test is working 2022-03-01 17:14:10 +01:00
alexmadison 00869fc16e programmable delay tested 2022-03-01 15:26:43 +01:00
alexmadison 8268379572 bug to prev bug 2022-03-01 14:00:47 +01:00
alexmadison 18f84bc652 Merge branch 'dev' of ssh://git.web.rug.nl:222/bics/actlib_dataflow_neuro into dev 2022-03-01 13:55:47 +01:00
alexmadison 05f46ccf33 added try except for assert printing 2022-03-01 13:55:45 +01:00
Michele 0a8496d4f7 Merge remote-tracking branch 'origin/dev' into dev 2022-03-01 13:26:32 +01:00
Michele 340a20e49e Added merge, syntax clean but violating dual rail 2022-03-01 13:26:29 +01:00
alexmadison fc4ccea3c0 added and tree 2022-03-01 12:22:36 +01:00
alexmadison a8b1710f65 merged buf_s into primitives 2022-03-01 10:09:08 +01:00
alexmadison 66cbbe3da7 unit tests working 2022-03-01 09:58:20 +01:00
Michele 8b40e70058 differentiated between ctree and vtree, all primitives updated 2022-03-01 09:44:51 +01:00
Michele 92b0b36325 pushed merge in primitives.act 2022-02-28 18:58:32 +01:00
Michele 1bb1d0be40 Merge remote-tracking branch 'origin/dev' into dev 2022-02-28 18:55:00 +01:00
Michele 2678dfc1e1 merge wrote, still need to test it 2022-02-28 18:54:52 +01:00
alexmadison 84b2831d89 buf_s_5 unit tests 2022-02-28 18:27:22 +01:00
alexmadison 5bae88d56f added flag to plot all times 2022-02-28 17:56:12 +01:00
alexmadison 225d481ae1 fifo t 5 unit tests checked 2022-02-28 15:52:20 +01:00
alexmadison 94109bb157 plotting in ex bugs 2022-02-28 15:44:24 +01:00
alexmadison e21e132d8b Merge branch 'dev' of ssh://git.web.rug.nl:222/bics/actlib_dataflow_neuro into dev 2022-02-28 13:57:32 +01:00
alexmadison 73ae3b0f19 added assert plots 2022-02-28 13:57:28 +01:00
Michele c96a154833 Merge remote-tracking branch 'origin/dev' into dev 2022-02-28 11:11:51 +01:00
Michele 2afec288a8 fifo_test_adv works 2022-02-28 11:11:30 +01:00