Commit Graph
100 Commits
Author SHA1 Message Date
alexmadison aa299fb45f fixed unit tests with new handshake blocks 2023-11-21 14:22:41 +01:00
alexmadison 9411dde4aa fixed test, changed to simple encoder 2023-11-21 13:35:36 +01:00
alexmadison c1e26267e2 fixed test by using encoder_simple 2023-11-21 13:28:38 +01:00
alexmadison 1aeb37f976 fixed test, bits were flipped 2023-11-21 12:24:15 +01:00
alexmadison a130ca59ea deleted fifo3 test because it doesnt actually use the fifo object 2023-11-21 12:17:04 +01:00
alexmadison 0a91459073 removed old decoder, only simple now, fixed 8x8 test, deleted other 2 2023-11-21 11:26:04 +01:00
alexmadison db39324593 fixed encoder2d tests, just changed labels, lowercase d 2023-11-21 10:19:21 +01:00
alexmadison 73acbcbc4f fixed demux_td_sign test and unfucked the sign flipping which shoudl have broken the other version tbh 2023-11-21 10:14:54 +01:00
alexmadison 8b37b91891 removed texel dualcore mapper, never used 2023-11-21 09:54:18 +01:00
alexmadison 200088fb0a removed mapper test, never tested irl 2023-11-21 09:52:18 +01:00
alexmadison e412faf459 fixed demux td 2 unit test and added note to prims 2023-11-21 09:46:56 +01:00
alexmadison 6eb91b72e0 fixed demux bit 7 test and added note to primitives 2023-11-21 09:35:28 +01:00
alexmadison 822cb58d2c fixed demux_7 test and added comment on demux 2023-11-21 09:25:53 +01:00
alexmadison 1d542e8a15 added todo about line end pullups 2023-11-17 13:18:58 +01:00
alexmadison 1c4160092d fixed decoder_2d_hybrid unit test 2023-11-17 13:18:17 +01:00
alexmadison ff077c5169 regenned with cores having new names 2022-07-06 18:25:23 +02:00
alexmadison 1cd1b1d054 wiping split modules 2022-07-06 18:24:32 +02:00
alexmadison 72dab29f5c regennmed tdc no read to have the same number of reg bits as normal tdcg 2022-07-06 17:43:21 +02:00
alexmadison 502d35b000 added slice before registers, so register sizes can be reduced 2022-07-06 17:26:26 +02:00
alexmadison 27a0d34153 genned texel dualcore glue noread netlist clean 2022-07-06 16:04:34 +02:00
alexmadison b21b84e78d added some watches 2022-07-06 15:46:41 +02:00
alexmadison 194a7ad196 created version of tdc_g without register read functionality 2022-07-06 15:35:20 +02:00
alexmadison 2ddbeac978 generated a tdc_glue with only 8 registers 2022-07-06 14:06:19 +02:00
alexmadison 7896e0de24 added tests for dynapse sadc hs 2022-07-05 10:53:17 +02:00
alexmadison 8753540b33 removed inverted inputs from sadc encoder, regenned with proper reset sigs I hope 2022-07-01 17:26:55 +02:00
alexmadison a70c9a1b6d removed extra supply vss lines from tiehi/lows 2022-06-29 18:25:44 +02:00
alexmadison 9a7a34c02f please god let this be the last regen of the act. Tiehi/lo's have been given fake PRs 2022-06-29 16:24:00 +02:00
alexmadison 8e38a0fb01 put fake PRs in tiehi/los lol 2022-06-29 15:58:58 +02:00
alexmadison f488e5dc81 renamed to sadc_encoder 2022-06-29 13:36:14 +02:00
alexmadison 836e19a72d added sadc encoder with inputs low active for dynapse sadcs 2022-06-29 13:18:42 +02:00
alexmadison ba7ae68651 lmao forgot to remove top.vdd/vss 2022-06-28 18:20:57 +02:00
alexmadison cd978118b5 dindo nuffin 2022-06-28 18:04:40 +02:00
alexmadison 1a7c6121a0 don't think i regenned netlist.v but just to be safe lol 2022-06-28 14:46:43 +02:00
alexmadison df3bb4022c regenned netlist with sigbufs fixed lol 2022-06-27 15:57:02 +02:00
alexmadison 14ba815112 fixed treegate buff issue lol 2022-06-27 11:56:12 +02:00
alexmadison 79c3d9ed98 tdc glue small for testing 2022-06-23 17:54:10 +02:00
alexmadison 905adaad48 added a buffer to the reset pd on req lines 2022-06-23 17:53:07 +02:00
alexmadison 6b0eff672c removed split modules folder from git 2022-06-23 17:51:50 +02:00
alexmadison 4e01e252b8 final final generation of tdc_glue i swear 2022-06-23 17:51:16 +02:00
alexmadison 144d89fb90 moved _y_a_B away from the out req lines to avoid more parasitic capacitance in neuron hs 2022-06-22 20:34:59 +02:00
alexmadison 4d4183f714 altered pull downs and ups in the encoder and neuron handshake to minimise parasitic capacitances when ack switches 2022-06-22 19:22:27 +02:00
alexmadison 6c1e079fd4 did some sram shit, doesnt matter 2022-06-22 19:16:04 +02:00
alexmadison 6daea1ef02 updated dummy neurons to have Buf X12 to avoid slow in acks 2022-06-22 19:14:39 +02:00
alexmadison c972419199 regenned with delays in encoder 2022-06-21 14:00:04 +02:00
alexmadison dde782d7c0 updated 2d encoder simple to include delays after the arbiter 2022-06-21 13:39:34 +02:00
alexmadison 7ca41040a3 beta idea to have slow falling edge delays on ack from arbiter. bad idea, gonna revert lol 2022-06-21 12:06:15 +02:00
alexmadison 17d9d3da41 regenned without pulldown delays 2022-06-20 16:10:35 +02:00
alexmadison 8953fdafe6 removed PRs from keeps, again... 2022-06-20 15:43:56 +02:00
alexmadison 6a7da77a92 removed line pulldown delays oops 2022-06-20 15:43:22 +02:00
alexmadison ce4e6dc23c regenned modules with synapses and neurons removed from top level 2022-06-17 12:29:45 +02:00
alexmadison 21d6982763 removed synapses and neurons from top level outputs: 2022-06-17 12:10:25 +02:00
alexmadison c790e73e69 regenned without name change stuff 2022-06-17 11:56:01 +02:00
alexmadison bfffdb7e97 deleted heretical files 2022-06-16 18:45:35 +02:00
alexmadison 2cd1a4b91a genned 2022-06-16 18:06:06 +02:00
alexmadison 3d0e36fbfb genned verilog netlist 2022-06-16 17:48:13 +02:00
alexmadison 0cdc01c279 regenned texel dualcore glue with new registers and neuron req keep fix 2022-06-16 17:40:33 +02:00
alexmadison 75f79705c6 fixed bug in neuron handshake array where keeps were connected to post-buffered reqs rather than pre-buffered reqs... 2022-06-16 16:56:38 +02:00
alexmadison 97dacbfd08 commented out old registers 2022-06-15 18:08:33 +02:00
alexmadison 87577268e5 added improved registers 2022-06-15 17:58:34 +02:00
alexmadison 2ea83f3472 test merge of sram rw output working 2022-05-10 15:34:04 +02:00
alexmadison 016f634ac6 test of spike from sram workin 2022-05-10 15:22:19 +02:00
alexmadison 9ee41dc390 spikes out to sram working 2022-05-10 14:53:26 +02:00
alexmadison 7735cf8cba made note of demux td to fixgit add ../dataflow_neuro/primitives.act 2022-05-10 14:53:00 +02:00
alexmadison 4c208bc18a packets to sram rw working 2022-05-10 14:07:51 +02:00
alexmadison 9ceaa10eeb minor change in demux_td 2022-05-09 19:29:37 +02:00
alexmadison af2c6c665d adding mapper io to chip wip 2022-05-09 19:29:18 +02:00
alexmadison 03851e19b7 mapper test init 2022-05-09 18:04:49 +02:00
alexmadison 1586adc0e1 started adding mapper 2022-05-09 18:04:17 +02:00
alexmadison f3a9f2f44c minor changes 2022-05-09 16:50:26 +02:00
alexmadison 0d7b82a0dd altered amzo targettting tests to avoid instabilities 2022-05-09 16:48:58 +02:00
alexmadison b1e24fa93c added more monitoring tests 2022-05-08 19:05:52 +02:00
alexmadison b994b60690 inverted TBUFs 2022-05-08 17:03:38 +02:00
alexmadison 6ed0c4bfed beefed up prsim to include AMZIOs 2022-05-08 17:03:02 +02:00
alexmadison 04a7a108d5 added reset signals in and out 2022-05-06 14:17:15 +02:00
alexmadison f4c6ce3112 minor indentation fix 2022-05-05 15:02:56 +02:00
alexmadison 71a2192427 texel dualcore with glue passed tests 2022-05-05 14:57:38 +02:00
alexmadison 7e895605da dummy neuron block init 2022-05-05 14:56:59 +02:00
alexmadison 10f4821eaa regenned texel dualcore innovus fairly finaly?? 2022-05-02 19:45:34 +02:00
alexmadison d3a1a27bb0 added buffering to EFO signals 2022-05-02 19:11:24 +02:00
alexmadison de06893549 added reset sigs to neuron syn cores 2022-05-02 18:49:57 +02:00
alexmadison f70b453ba7 Merge branch 'dev' of ssh://git.web.rug.nl:222/bics/actlib_dataflow_neuro into dev 2022-05-02 15:27:38 +02:00
alexmadison cd445d1736 added inverters on every 4th synapse targetting line 2022-05-02 15:26:03 +02:00
alexmadison a114505a0b fixed size of syn x channel 2022-04-25 13:15:53 +02:00
alexmadison b25b403ed4 added keeps to output AMZO lines 2022-04-25 12:20:00 +02:00
alexmadison 28823c4bca regened texel dualcore prs 2022-04-25 10:32:47 +02:00
alexmadison e6f1a31f68 encoder1d with bd simmed 2022-04-21 16:09:13 +02:00
alexmadison e3237e6115 set line pull down delays to zero, rero, regenned prs 2022-04-21 15:10:12 +02:00
alexmadison 82aae3d337 added bufx32 2022-04-21 14:56:57 +02:00
alexmadison 1e7133cafe reverted hughs madness 2022-04-21 14:55:18 +02:00
alexmadison 3f7cbf2b87 Merge branch 'innovus_ready' into dev 2022-04-21 14:49:30 +02:00
alexmadison 28c821a757 Merge branch 'dev' of ssh://git.web.rug.nl:222/bics/actlib_dataflow_neuro into dev 2022-04-21 14:49:20 +02:00
alexmadison ec03f8abe4 added reg reset sig 2022-04-21 14:33:41 +02:00
alexmadison c91a7cad50 added separate reset sig for regs 2022-04-21 14:32:04 +02:00
alexmadison 75a42fff1b texel prs for innovus generated 2022-04-21 14:31:35 +02:00
alexmadison 3443d46b9b completely cut out the neuron and synapse hs from core 2022-04-21 14:07:15 +02:00
alexmadison 41f240726c internal access added 2022-04-21 10:41:37 +02:00
alexmadison c3b336267b added nrn syn ports to dualcore 2022-04-21 10:35:43 +02:00
alexmadison 1a41c03aeb more renaming 2022-04-21 10:23:58 +02:00
alexmadison 10ecb7f55f exposed pd lines 2022-04-21 10:11:26 +02:00
alexmadison 83ae6a4cc3 adjusted pull up channel names 2022-04-20 19:31:06 +02:00