alexmadison
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d395778a4a
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neuron 2d handshake fixes
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2022-03-28 19:51:03 +02:00 |
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alexmadison
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fb127d55f5
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neuron handshake compiling, now testing
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2022-03-28 16:23:12 +02:00 |
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alexmadison
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8cb6eddd37
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removed line pull up downs, moved to coders
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2022-03-28 16:22:51 +02:00 |
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alexmadison
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8b44a11fd6
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added append, fixed bug in fifo
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2022-03-25 18:57:18 +01:00 |
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alexmadison
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3587672e69
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qdi2bd ready for rev
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2022-03-25 17:15:03 +01:00 |
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alexmadison
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9d6e74268f
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bd2qdi ole backseat reved
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2022-03-25 15:43:46 +01:00 |
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alexmadison
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a42254a57b
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minor bug fix encoder2d
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2022-03-22 16:30:58 +01:00 |
 Greatorex
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29d43b0a20
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-18 10:06:55 +01:00 |
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Greatorex
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b9219f266f
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Encoder Simmed
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2022-03-18 10:06:43 +01:00 |
Michele
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04d12338b7
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continued register_rw
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2022-03-15 08:16:59 +01:00 |
 M. Mastella
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edb0443c01
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Added new version of Register_rw (still not properly working)
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2022-03-14 17:15:27 +01:00 |
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Michele
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cc2234a1b1
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moved the ack of the register
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2022-03-09 20:18:20 +01:00 |
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Michele
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4dcd975554
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register_rw continued
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2022-03-09 20:02:41 +01:00 |
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Michele
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6f1a970cfd
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register_rw (formerly register_rw_v2) compiles
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2022-03-09 16:44:44 +01:00 |
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M. Mastella
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d2f643dc26
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-09 13:05:14 +01:00 |
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M. Mastella
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c8ac3cf37d
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started register_v2 with reading and writing abilities
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2022-03-09 13:05:08 +01:00 |
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Greatorex
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409fee54e8
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-08 18:49:07 +01:00 |
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Greatorex
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9a9c2f7da5
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encoder sim still not working
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2022-03-08 18:49:04 +01:00 |
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M. Mastella
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422a90ad71
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demux: cond.a has been now shorted to in.a
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2022-03-08 12:12:45 +01:00 |
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alexmadison
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a78eec5777
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demux_td reviewed and supplies added
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2022-03-08 10:11:52 +01:00 |
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M. Mastella
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0d3502bf00
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-07 16:36:05 +01:00 |
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M. Mastella
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e49866323c
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register_write works
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2022-03-07 16:36:01 +01:00 |
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alexmadison
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c3f0059bfa
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encoder2d compiling
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2022-03-07 16:22:00 +01:00 |
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alexmadison
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a411231628
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added some supplies
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2022-03-07 16:21:45 +01:00 |
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Michele
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ad318259a5
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continued registers.c
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2022-03-07 07:15:53 +01:00 |
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Michele
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932e967f3d
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encoder in register works
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2022-03-05 20:33:38 +01:00 |
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Michele
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aa67bd6168
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register simulates correctly up to the fake clock generation
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2022-03-05 20:28:50 +01:00 |
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Michele
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78a8f72d25
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register compiles
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2022-03-05 09:19:19 +01:00 |
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Michele
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7fe31f0ed8
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started testing the register_w (doesn't compile)
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2022-03-04 21:17:30 +01:00 |
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Michele
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c30a46d6d8
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I think the encoder2D compiles now
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2022-03-04 21:11:34 +01:00 |
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Michele
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b5fa707c4e
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forgot proc in defproc
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2022-03-04 19:04:11 +01:00 |
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Michele
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72ec59cbcf
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added flip flop from XFAB
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2022-03-04 19:02:34 +01:00 |
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Michele
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250f5bcc58
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Added A_2C2P_RB_X1 because the encoder needs it
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2022-03-04 19:02:12 +01:00 |
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alexmadison
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9b3bdc3f6c
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rejigged A cell in encoder2d
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2022-03-04 15:09:49 +01:00 |
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alexmadison
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a53110dda4
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renamed encoder to dualrail_encoder
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2022-03-04 14:53:14 +01:00 |
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alexmadison
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4a4c4eeb14
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merged encoder
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2022-03-04 14:27:38 +01:00 |
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alexmadison
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f55322bc7c
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encoder init
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2022-03-04 14:10:15 +01:00 |
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Michele
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18cf090b45
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-04 13:11:44 +01:00 |
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Michele
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e8fa8e43a6
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Changed FF in std. Started test (spoiler: is not working)
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2022-03-04 13:11:34 +01:00 |
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Greatorex
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828fccfb38
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-04 12:34:00 +01:00 |
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Greatorex
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1abcc9dc55
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Added stuff for line end pull U/D
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2022-03-04 12:33:49 +01:00 |
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Michele
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9c6a591dc7
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started registers
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2022-03-04 11:44:00 +01:00 |
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Michele
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b6c70f7f5e
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fixed vdd and vss in encoder sigbuf
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2022-03-04 11:43:49 +01:00 |
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Michele
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397c832b7b
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Added Flip Flop to std.act (still need to try it)
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2022-03-04 11:43:33 +01:00 |
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Michele
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15d3fd1b9b
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Added sigbuf_1output for signals that cannot have array outputs
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2022-03-03 19:23:13 +01:00 |
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Michele
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a4889ae844
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fixed conflict with Madison commit
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2022-03-03 17:54:29 +01:00 |
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Michele
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d64afd8c50
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-03 17:53:40 +01:00 |
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Michele
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ba096bf6b2
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wired up most of the stuff in encoder (missing dual rail tree)
Obv not simulated yet and not sure all wires are correct. still need to repass through them
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2022-03-03 17:52:42 +01:00 |
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alexmadison
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c8412606b3
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merged
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2022-03-03 17:10:16 +01:00 |
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alexmadison
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893f71db92
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AND grid init
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2022-03-03 17:09:00 +01:00 |