alexmadison
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6751e2807c
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comments
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2022-03-31 16:23:01 +02:00 |
alexmadison
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89b8dacd29
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changed line pull downs to be isochronic as fuk
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2022-03-31 16:19:20 +02:00 |
alexmadison
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6ecee7f0c7
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added comments
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2022-03-31 15:24:51 +02:00 |
alexmadison
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f1ae79cd5a
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added buffering of dualrail decoder output lines to pull downs
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2022-03-31 15:22:50 +02:00 |
alexmadison
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6dfc941993
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added Cel to buf out ack, so that ack can't be removed before the bufs output data is fully invalidated
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2022-03-31 15:10:47 +02:00 |
alexmadison
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1d5d4738a2
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cleaned up coders a bit
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2022-03-31 13:20:18 +02:00 |
alexmadison
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2e4cdd5029
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vastly improved lazy synapse handshakes
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2022-03-31 12:44:00 +02:00 |
alexmadison
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cd5d41d7f8
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synapse handshake unit tests working
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2022-03-31 11:23:51 +02:00 |
alexmadison
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e779ee55b9
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added delays to out req-ack buffers, seems to work
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2022-03-30 19:53:27 +02:00 |
alexmadison
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a53bd58e29
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added Ole dly4 as per hugh
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2022-03-30 16:50:05 +02:00 |
alexmadison
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21c78e4461
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fixed bug in delay fifo
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2022-03-30 15:47:01 +02:00 |
alexmadison
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4cbe8cb3d1
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XMerge branch 'dev' of ssh://git.web.rug.nl:222/bics/actlib_dataflow_neuro into dev
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2022-03-30 15:16:19 +02:00 |
alexmadison
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f9cdb2e914
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added pulldown2
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2022-03-30 15:16:15 +02:00 |
Greatorex
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e09b4a0f7e
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Merge branch 'dev' into HEAD
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2022-03-30 15:09:59 +02:00 |
Greatorex
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7db428b827
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register added again
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2022-03-30 15:04:35 +02:00 |
Greatorex
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ba17fc0d1b
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Auto stash before rebase of "origin/dev"
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2022-03-30 15:03:55 +02:00 |
alexmadison
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87f552b1d0
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decoder hs wip
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2022-03-30 14:06:14 +02:00 |
alexmadison
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cff6eba344
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decoder_2d_hs init
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2022-03-30 13:18:07 +02:00 |
alexmadison
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d10d78347c
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refactored decoder into decoder dualrail
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2022-03-30 11:01:21 +02:00 |
alexmadison
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1707f1043a
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renamed encoder inputs from x to inx
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2022-03-30 10:14:29 +02:00 |
alexmadison
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870da14ccd
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let delay fifos have N= 0, simplified nrn grids thusly
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2022-03-29 19:07:04 +02:00 |
alexmadison
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5e4e905960
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fixed minor bug in encoder, renamed nrn_hs
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2022-03-29 15:42:54 +02:00 |
alexmadison
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921145c450
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added buffering on out
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2022-03-29 14:57:20 +02:00 |
alexmadison
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28ea85b9ed
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reverted nrn handshake to 2c1n
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2022-03-29 11:24:42 +02:00 |
alexmadison
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8528ee12cd
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added cells needed for neuron grid
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2022-03-28 19:51:50 +02:00 |
alexmadison
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d395778a4a
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neuron 2d handshake fixes
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2022-03-28 19:51:03 +02:00 |
alexmadison
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fb127d55f5
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neuron handshake compiling, now testing
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2022-03-28 16:23:12 +02:00 |
alexmadison
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8cb6eddd37
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removed line pull up downs, moved to coders
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2022-03-28 16:22:51 +02:00 |
alexmadison
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8b44a11fd6
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added append, fixed bug in fifo
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2022-03-25 18:57:18 +01:00 |
alexmadison
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3587672e69
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qdi2bd ready for rev
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2022-03-25 17:15:03 +01:00 |
alexmadison
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9d6e74268f
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bd2qdi ole backseat reved
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2022-03-25 15:43:46 +01:00 |
alexmadison
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a42254a57b
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minor bug fix encoder2d
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2022-03-22 16:30:58 +01:00 |
Greatorex
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29d43b0a20
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-18 10:06:55 +01:00 |
Greatorex
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b9219f266f
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Encoder Simmed
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2022-03-18 10:06:43 +01:00 |
Michele
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04d12338b7
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continued register_rw
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2022-03-15 08:16:59 +01:00 |
M. Mastella
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edb0443c01
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Added new version of Register_rw (still not properly working)
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2022-03-14 17:15:27 +01:00 |
Michele
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cc2234a1b1
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moved the ack of the register
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2022-03-09 20:18:20 +01:00 |
Michele
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4dcd975554
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register_rw continued
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2022-03-09 20:02:41 +01:00 |
Michele
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6f1a970cfd
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register_rw (formerly register_rw_v2) compiles
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2022-03-09 16:44:44 +01:00 |
M. Mastella
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d2f643dc26
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-09 13:05:14 +01:00 |
M. Mastella
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c8ac3cf37d
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started register_v2 with reading and writing abilities
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2022-03-09 13:05:08 +01:00 |
Greatorex
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409fee54e8
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-08 18:49:07 +01:00 |
Greatorex
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9a9c2f7da5
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encoder sim still not working
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2022-03-08 18:49:04 +01:00 |
M. Mastella
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422a90ad71
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demux: cond.a has been now shorted to in.a
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2022-03-08 12:12:45 +01:00 |
alexmadison
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a78eec5777
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demux_td reviewed and supplies added
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2022-03-08 10:11:52 +01:00 |
M. Mastella
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0d3502bf00
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-07 16:36:05 +01:00 |
M. Mastella
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e49866323c
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register_write works
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2022-03-07 16:36:01 +01:00 |
alexmadison
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c3f0059bfa
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encoder2d compiling
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2022-03-07 16:22:00 +01:00 |
alexmadison
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a411231628
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added some supplies
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2022-03-07 16:21:45 +01:00 |
Michele
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ad318259a5
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continued registers.c
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2022-03-07 07:15:53 +01:00 |
Michele
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932e967f3d
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encoder in register works
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2022-03-05 20:33:38 +01:00 |
Michele
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aa67bd6168
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register simulates correctly up to the fake clock generation
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2022-03-05 20:28:50 +01:00 |
Michele
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78a8f72d25
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register compiles
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2022-03-05 09:19:19 +01:00 |
Michele
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7fe31f0ed8
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started testing the register_w (doesn't compile)
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2022-03-04 21:17:30 +01:00 |
Michele
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c30a46d6d8
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I think the encoder2D compiles now
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2022-03-04 21:11:34 +01:00 |
Michele
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b5fa707c4e
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forgot proc in defproc
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2022-03-04 19:04:11 +01:00 |
Michele
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72ec59cbcf
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added flip flop from XFAB
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2022-03-04 19:02:34 +01:00 |
Michele
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250f5bcc58
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Added A_2C2P_RB_X1 because the encoder needs it
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2022-03-04 19:02:12 +01:00 |
alexmadison
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9b3bdc3f6c
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rejigged A cell in encoder2d
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2022-03-04 15:09:49 +01:00 |
alexmadison
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a53110dda4
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renamed encoder to dualrail_encoder
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2022-03-04 14:53:14 +01:00 |
alexmadison
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4a4c4eeb14
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merged encoder
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2022-03-04 14:27:38 +01:00 |
alexmadison
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f55322bc7c
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encoder init
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2022-03-04 14:10:15 +01:00 |
Michele
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18cf090b45
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-04 13:11:44 +01:00 |
Michele
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e8fa8e43a6
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Changed FF in std. Started test (spoiler: is not working)
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2022-03-04 13:11:34 +01:00 |
Greatorex
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828fccfb38
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-04 12:34:00 +01:00 |
Greatorex
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1abcc9dc55
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Added stuff for line end pull U/D
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2022-03-04 12:33:49 +01:00 |
Michele
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9c6a591dc7
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started registers
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2022-03-04 11:44:00 +01:00 |
Michele
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b6c70f7f5e
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fixed vdd and vss in encoder sigbuf
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2022-03-04 11:43:49 +01:00 |
Michele
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397c832b7b
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Added Flip Flop to std.act (still need to try it)
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2022-03-04 11:43:33 +01:00 |
Michele
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15d3fd1b9b
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Added sigbuf_1output for signals that cannot have array outputs
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2022-03-03 19:23:13 +01:00 |
Michele
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a4889ae844
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fixed conflict with Madison commit
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2022-03-03 17:54:29 +01:00 |
Michele
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d64afd8c50
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-03 17:53:40 +01:00 |
Michele
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ba096bf6b2
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wired up most of the stuff in encoder (missing dual rail tree)
Obv not simulated yet and not sure all wires are correct. still need to repass through them
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2022-03-03 17:52:42 +01:00 |
alexmadison
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c8412606b3
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merged
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2022-03-03 17:10:16 +01:00 |
alexmadison
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893f71db92
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AND grid init
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2022-03-03 17:09:00 +01:00 |
alexmadison
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da5948f493
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added N=1 cases
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2022-03-03 17:05:56 +01:00 |
Michele
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0e9f2ae506
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started encoder on the coders.act
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2022-03-03 15:10:31 +01:00 |
Michele
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f7cd7006d0
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removed arbiter_tree from primitives because is already in coders
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2022-03-03 12:15:17 +01:00 |
Michele
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3e1b63c201
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continued handshaking tree, not finished
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2022-03-03 12:11:20 +01:00 |
Michele
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b49b9d98c3
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started arbiter tree
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2022-03-03 12:11:20 +01:00 |
alexmadison
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6fc3e4b99c
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removed arbiter tree
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2022-03-03 11:56:59 +01:00 |
alexmadison
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af52c688a3
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arbiter tree with arbiters, not tested
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2022-03-03 11:56:34 +01:00 |
alexmadison
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d0a2fff096
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arbiter init with or2s
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2022-03-03 10:52:29 +01:00 |
alexmadison
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9c27248e12
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decoder 2d dly init
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2022-03-02 15:55:26 +01:00 |
alexmadison
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3bba9fefa4
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made buf with dly sorry
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2022-03-02 15:48:54 +01:00 |
alexmadison
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31d2f35042
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i am a moron re dly cells
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2022-03-02 15:47:36 +01:00 |
alexmadison
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c61a570f80
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fixed wiring bug in prog delay
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2022-03-02 15:11:22 +01:00 |
alexmadison
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6bece2f459
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renamed gates in or tree
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2022-03-02 13:51:12 +01:00 |
alexmadison
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659cd2479c
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oops accidentally hit all trees
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2022-03-02 13:50:04 +01:00 |
alexmadison
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c5e582ff3e
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renamed vars in atree
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2022-03-02 13:48:57 +01:00 |
alexmadison
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e52ec9ed61
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renamed var in vtree for consciences
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2022-03-02 11:51:45 +01:00 |
alexmadison
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c580d21efe
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fixed supply in fifo_t
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2022-03-02 11:24:28 +01:00 |
alexmadison
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1b7e39bc00
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coders.act file init
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2022-03-02 09:48:41 +01:00 |
alexmadison
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8060051da0
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Merge branch 'dev' of ssh://git.web.rug.nl:222/bics/actlib_dataflow_neuro into dev
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2022-03-02 09:48:11 +01:00 |
alexmadison
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b456ea40fd
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changed delayprog to outin vs ya naming scheme
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2022-03-02 09:48:05 +01:00 |
Michele
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9f5bbc487d
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some more supplies added, need still to run all the codes
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2022-03-01 19:02:10 +01:00 |
Michele
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c99ed439a6
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added supply also to sigbuf in fifo
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2022-03-01 18:57:06 +01:00 |
Michele
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d507deba84
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-01 18:51:10 +01:00 |
Michele
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3d273b164d
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added power supply to sigbuf in fifo_t
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2022-03-01 18:51:06 +01:00 |
Greatorex
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b15d8c11e9
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Merge remote-tracking branch 'origin/dev' into dev
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2022-03-01 17:56:39 +01:00 |